[PATCH] D77065: [ARM][MVE] Add VHADD and VHSUB patterns

Sam Parker via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Mar 30 08:38:06 PDT 2020


samparker created this revision.
samparker added reviewers: dmgreen, simon_tatham, olista01, SjoerdMeijer.
Herald added subscribers: danielkiss, hiraditya, kristof.beyls.
Herald added a project: LLVM.

Add patterns, for two vector operands, that use a normal add node along with an arm vshr imm node.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D77065

Files:
  llvm/lib/Target/ARM/ARMInstrMVE.td
  llvm/test/CodeGen/Thumb2/mve-halving.ll

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