[PATCH] D76980: [LegalizeTypes] Add SoftenFloatRes/SoftenFloatOp functions for FREEZE

[Juneyoung Lee via Phabricator via llvm-commits]

aqjune created this revision.
aqjune added reviewers: bkramer, JamesNagurne, craig.topper, efriedma.
Herald added subscribers: llvm-commits, hiraditya.
Herald added a project: LLVM.
aqjune added a parent revision: D29014: [SelDag] Add FREEZE.
aqjune added a comment.

I only have a test for `SoftenFloatOp_FREEZE` though; is there a good reference for writing a test for `SoftenFloatRes_FREEZE`?


This adds SoftenFloatRes_FREEZE / SoftenFloatOp_FREEZE for FREEZE SelDag node.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D76980

Files:
  llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
  llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
  llvm/test/CodeGen/ARM/freeze-soften.ll


Index: llvm/test/CodeGen/ARM/freeze-soften.ll
===================================================================
--- /dev/null
+++ llvm/test/CodeGen/ARM/freeze-soften.ll
@@ -0,0 +1,16 @@
+; RUN: llc -mtriple=thumbv8m.main-none-eabi %s -o - | FileCheck %s
+
+; Check that freeze operations on floating types are successfully softened.
+
+; CHECK-LABEL: sitofp_f32_i32:
+; CHECK: bl __aeabi_i2f
+define float @sitofp_f32_i32(i32 %x) #0 {
+  %val = call float @llvm.experimental.constrained.sitofp.f32.i32(i32 %x, metadata !"round.tonearest", metadata !"fpexcept.strict") #0
+  %val.fr = freeze float %val
+  ret float %val.fr
+}
+
+attributes #0 = { strictfp }
+
+declare float @llvm.experimental.constrained.sitofp.f32.i32(i32, metadata, metadata)
+declare double @llvm.experimental.constrained.sitofp.f64.i32(i32, metadata, metadata)
Index: llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
===================================================================
--- llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
+++ llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
@@ -519,6 +519,7 @@
   SDValue SoftenFloatRes_FP_ROUND(SDNode *N);
   SDValue SoftenFloatRes_FPOW(SDNode *N);
   SDValue SoftenFloatRes_FPOWI(SDNode *N);
+  SDValue SoftenFloatRes_FREEZE(SDNode *N);
   SDValue SoftenFloatRes_FREM(SDNode *N);
   SDValue SoftenFloatRes_FRINT(SDNode *N);
   SDValue SoftenFloatRes_FROUND(SDNode *N);
@@ -540,6 +541,7 @@
   SDValue SoftenFloatOp_BR_CC(SDNode *N);
   SDValue SoftenFloatOp_FP_ROUND(SDNode *N);
   SDValue SoftenFloatOp_FP_TO_XINT(SDNode *N);
+  SDValue SoftenFloatOp_FREEZE(SDNode *N);
   SDValue SoftenFloatOp_LROUND(SDNode *N);
   SDValue SoftenFloatOp_LLROUND(SDNode *N);
   SDValue SoftenFloatOp_LRINT(SDNode *N);
Index: llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
===================================================================
--- llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
+++ llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
@@ -125,6 +125,7 @@
     case ISD::ATOMIC_SWAP: R = BitcastToInt_ATOMIC_SWAP(N); break;
     case ISD::SELECT:      R = SoftenFloatRes_SELECT(N); break;
     case ISD::SELECT_CC:   R = SoftenFloatRes_SELECT_CC(N); break;
+    case ISD::FREEZE:      R = SoftenFloatRes_FREEZE(N); break;
     case ISD::STRICT_SINT_TO_FP:
     case ISD::STRICT_UINT_TO_FP:
     case ISD::SINT_TO_FP:
@@ -184,6 +185,13 @@
   return BitConvertToInteger(N->getOperand(0));
 }
 
+SDValue DAGTypeLegalizer::SoftenFloatRes_FREEZE(SDNode *N) {
+  unsigned BitWidth = N->getOperand(0).getValueSizeInBits();
+  return DAG.getNode(ISD::FREEZE, SDLoc(N),
+                     EVT::getIntegerVT(*DAG.getContext(), BitWidth),
+                     N->getOperand(0));
+}
+
 SDValue DAGTypeLegalizer::SoftenFloatRes_MERGE_VALUES(SDNode *N,
                                                       unsigned ResNo) {
   SDValue Op = DisintegrateMERGE_VALUES(N, ResNo);
@@ -795,6 +803,7 @@
   case ISD::SETCC:       Res = SoftenFloatOp_SETCC(N); break;
   case ISD::STORE:       Res = SoftenFloatOp_STORE(N, OpNo); break;
   case ISD::FCOPYSIGN:   Res = SoftenFloatOp_FCOPYSIGN(N); break;
+  case ISD::FREEZE:      Res = SoftenFloatOp_FREEZE(N); break;
   }
 
   // If the result is null, the sub-method took care of registering results etc.
@@ -818,6 +827,12 @@
   return DAG.getNode(ISD::BITCAST, SDLoc(N), N->getValueType(0), Op0);
 }
 
+SDValue DAGTypeLegalizer::SoftenFloatOp_FREEZE(SDNode *N) {
+  SDValue Op0 = GetSoftenedFloat(N->getOperand(0));
+
+  return DAG.getNode(ISD::FREEZE, SDLoc(N), N->getValueType(0), Op0);
+}
+
 SDValue DAGTypeLegalizer::SoftenFloatOp_FP_ROUND(SDNode *N) {
   // We actually deal with the partially-softened FP_TO_FP16 node too, which
   // returns an i16 so doesn't meet the constraints necessary for FP_ROUND.


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