[PATCH] D76766: [ARM][LowOverheadLoops] DoubleWidthResult instructions canGenerateZeros

[Sam Parker via Phabricator via llvm-commits]

samparker marked 2 inline comments as done.
samparker added inline comments.


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Comment at: llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp:530
+  // Check for instructions which can write into a larger element size.
+  const MCInstrDesc &MCID = MI.getDesc();
+  uint64_t Flags = MCID.TSFlags;
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SjoerdMeijer wrote:
> nit: this is absolutely fine of course, but you do have a little helper function just below this function for the similar RetainsPreviousHalfElement MI description. Perhaps a bit more consistent to add this as a helper too, and that would nicely cluster these helpers.
Yeah, I had the same thought.


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Comment at: llvm/test/CodeGen/Thumb2/LowOverheadLoops/vaddv.mir:754
 
+  define hidden i32 @illegal_vmull_non_zero(i16* %x, i16* %y, i16* %z, i32 %n) {
+  entry:
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SjoerdMeijer wrote:
> Do we need to test some other opcodes too that have been marked as DoubleWidth? Like MVE_VSHLL, VMOVL, VQDMULL? Or is this perhaps already tested elsewhere?
I want to use the unit test to cover the opcodes, and this test was to check that the logic in the pass was reading the flags correctly.


Repository:
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  https://reviews.llvm.org/D76766/new/

https://reviews.llvm.org/D76766