[llvm] e2ef612 - [Alignment] Fix overaligning bug

[Guillaume Chatelet via llvm-commits]

Author: Guillaume Chatelet
Date: 2020-03-27T12:57:50Z
New Revision: e2ef6127d9f4794a1b7e8c3ec7769dfdf006ba56

URL: https://github.com/llvm/llvm-project/commit/e2ef6127d9f4794a1b7e8c3ec7769dfdf006ba56
DIFF: https://github.com/llvm/llvm-project/commit/e2ef6127d9f4794a1b7e8c3ec7769dfdf006ba56.diff

LOG: [Alignment] Fix overaligning bug

Summary:
This was discovered while converting to Align type.

See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html
See this patch for the introduction of the type: https://reviews.llvm.org/D64790

Reviewers: courbet

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D76914

Added: 
    

Modified: 
    llvm/lib/Target/X86/X86InstructionSelector.cpp
    llvm/test/CodeGen/X86/GlobalISel/select-fconstant.mir

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/X86/X86InstructionSelector.cpp b/llvm/lib/Target/X86/X86InstructionSelector.cpp
index 3f9d626ff912..dcacb650dc44 100644
--- a/llvm/lib/Target/X86/X86InstructionSelector.cpp
+++ b/llvm/lib/Target/X86/X86InstructionSelector.cpp
@@ -1435,7 +1435,7 @@ bool X86InstructionSelector::materializeFP(MachineInstr &I,
   const Register DstReg = I.getOperand(0).getReg();
   const LLT DstTy = MRI.getType(DstReg);
   const RegisterBank &RegBank = *RBI.getRegBank(DstReg, MRI, TRI);
-  unsigned Align = DstTy.getSizeInBits();
+  unsigned Align = DstTy.getSizeInBytes();
   const DebugLoc &DbgLoc = I.getDebugLoc();
 
   unsigned Opc = getLoadStoreOp(DstTy, RegBank, TargetOpcode::G_LOAD, Align);

diff  --git a/llvm/test/CodeGen/X86/GlobalISel/select-fconstant.mir b/llvm/test/CodeGen/X86/GlobalISel/select-fconstant.mir
index 47be0d593e82..216cd2c4143f 100644
--- a/llvm/test/CodeGen/X86/GlobalISel/select-fconstant.mir
+++ b/llvm/test/CodeGen/X86/GlobalISel/select-fconstant.mir
@@ -35,7 +35,7 @@ body:             |
     ; CHECK_NOPIC64: RET 0, implicit $xmm0
     ; CHECK_LARGE64-LABEL: name: test_float
     ; CHECK_LARGE64: [[MOV64ri:%[0-9]+]]:gr64 = MOV64ri %const.0
-    ; CHECK_LARGE64: [[MOVSSrm_alt:%[0-9]+]]:fr32 = MOVSSrm_alt [[MOV64ri]], 1, $noreg, 0, $noreg :: (load 8 from constant-pool, align 32)
+    ; CHECK_LARGE64: [[MOVSSrm_alt:%[0-9]+]]:fr32 = MOVSSrm_alt [[MOV64ri]], 1, $noreg, 0, $noreg :: (load 8 from constant-pool, align 4)
     ; CHECK_LARGE64: [[COPY:%[0-9]+]]:vr128 = COPY [[MOVSSrm_alt]]
     ; CHECK_LARGE64: $xmm0 = COPY [[COPY]]
     ; CHECK_LARGE64: RET 0, implicit $xmm0
@@ -82,7 +82,7 @@ body:             |
     ; CHECK_NOPIC64: RET 0, implicit $xmm0
     ; CHECK_LARGE64-LABEL: name: test_double
     ; CHECK_LARGE64: [[MOV64ri:%[0-9]+]]:gr64 = MOV64ri %const.0
-    ; CHECK_LARGE64: [[MOVSDrm_alt:%[0-9]+]]:fr64 = MOVSDrm_alt [[MOV64ri]], 1, $noreg, 0, $noreg :: (load 8 from constant-pool, align 64)
+    ; CHECK_LARGE64: [[MOVSDrm_alt:%[0-9]+]]:fr64 = MOVSDrm_alt [[MOV64ri]], 1, $noreg, 0, $noreg :: (load 8 from constant-pool)
     ; CHECK_LARGE64: [[COPY:%[0-9]+]]:vr128 = COPY [[MOVSDrm_alt]]
     ; CHECK_LARGE64: $xmm0 = COPY [[COPY]]
     ; CHECK_LARGE64: RET 0, implicit $xmm0