[llvm] 9002db0 - Roll otherwise unused subexpressions into an assertion

[David Blaikie via llvm-commits]

Author: David Blaikie
Date: 2020-03-26T11:32:33-07:00
New Revision: 9002db05a2f0d12681214fad3c96f8d497f2b852

URL: https://github.com/llvm/llvm-project/commit/9002db05a2f0d12681214fad3c96f8d497f2b852
DIFF: https://github.com/llvm/llvm-project/commit/9002db05a2f0d12681214fad3c96f8d497f2b852.diff

LOG: Roll otherwise unused subexpressions into an assertion

Added: 
    

Modified: 
    llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp b/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
index 01fd8483e5c1..0f67af9ceeca 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
@@ -2243,12 +2243,8 @@ bool AMDGPULegalizerInfo::legalizeFFloor(MachineInstr &MI,
 bool AMDGPULegalizerInfo::legalizeBuildVector(
   MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B) const {
   Register Dst = MI.getOperand(0).getReg();
-  LLT DstTy = MRI.getType(Dst);
   const LLT S32 = LLT::scalar(32);
-  const LLT V2S16 = LLT::vector(2, 16);
-  (void)DstTy;
-  (void)V2S16;
-  assert(DstTy == V2S16);
+  assert(MRI.getType(Dst) == LLT::vector(2, 16));
 
   Register Src0 = MI.getOperand(1).getReg();
   Register Src1 = MI.getOperand(2).getReg();