[llvm] 4673699 - [PowerPC] Remove the repeated definition for some InstAlias for mtspr/mfspr
Kang Zhang via llvm-commits
llvm-commits at lists.llvm.org
Thu Mar 26 02:59:05 PDT 2020
Author: Kang Zhang
Date: 2020-03-26T09:58:30Z
New Revision: 4673699a470b6d34bd2c34fb563dad710670aa11
URL: https://github.com/llvm/llvm-project/commit/4673699a470b6d34bd2c34fb563dad710670aa11
DIFF: https://github.com/llvm/llvm-project/commit/4673699a470b6d34bd2c34fb563dad710670aa11.diff
LOG: [PowerPC] Remove the repeated definition for some InstAlias for mtspr/mfspr
Summary:
Below InstAlias have been redefined, this patch is to remove the repeated
definition.
mtdec/mfdec mtsdr1/mfsdr1 mtsrr0/mfsrr0 mtsrr1/mfsrr1 mtasr
Reviewed By: nemanjai, steven.zhang
Differential Revision: https://reviews.llvm.org/D75821
Added:
Modified:
llvm/lib/Target/PowerPC/PPCInstrInfo.td
llvm/test/MC/Disassembler/PowerPC/ppc64-encoding-bookIII.txt
llvm/test/MC/PowerPC/ppc64-encoding-bookIII.s
llvm/test/MC/PowerPC/ppc64-encoding-ext.s
Removed:
################################################################################
diff --git a/llvm/lib/Target/PowerPC/PPCInstrInfo.td b/llvm/lib/Target/PowerPC/PPCInstrInfo.td
index fc5b26d21481..180826b0fa8e 100644
--- a/llvm/lib/Target/PowerPC/PPCInstrInfo.td
+++ b/llvm/lib/Target/PowerPC/PPCInstrInfo.td
@@ -4614,19 +4614,6 @@ def : InstAlias<"mfdccr $Rx", (MFSPR gprc:$Rx, 1018)>, Requires<[IsPPC4xx]>;
def : InstAlias<"mticcr $Rx", (MTSPR 1019, gprc:$Rx)>, Requires<[IsPPC4xx]>;
def : InstAlias<"mficcr $Rx", (MFSPR gprc:$Rx, 1019)>, Requires<[IsPPC4xx]>;
-def : InstAlias<"mtasr $RS", (MTSPR 280, gprc:$RS)>;
-
-def : InstAlias<"mfdec $RT", (MFSPR gprc:$RT, 22)>;
-def : InstAlias<"mtdec $RT", (MTSPR 22, gprc:$RT)>;
-
-def : InstAlias<"mfsdr1 $RT", (MFSPR gprc:$RT, 25)>;
-def : InstAlias<"mtsdr1 $RT", (MTSPR 25, gprc:$RT)>;
-
-def : InstAlias<"mfsrr0 $RT", (MFSPR gprc:$RT, 26)>;
-def : InstAlias<"mfsrr1 $RT", (MFSPR gprc:$RT, 27)>;
-def : InstAlias<"mtsrr0 $RT", (MTSPR 26, gprc:$RT)>;
-def : InstAlias<"mtsrr1 $RT", (MTSPR 27, gprc:$RT)>;
-
def : InstAlias<"tlbie $RB", (TLBIE R0, gprc:$RB)>;
diff --git a/llvm/test/MC/Disassembler/PowerPC/ppc64-encoding-bookIII.txt b/llvm/test/MC/Disassembler/PowerPC/ppc64-encoding-bookIII.txt
index ae8efcf211fc..1f5df65179f9 100644
--- a/llvm/test/MC/Disassembler/PowerPC/ppc64-encoding-bookIII.txt
+++ b/llvm/test/MC/Disassembler/PowerPC/ppc64-encoding-bookIII.txt
@@ -57,34 +57,34 @@
# CHECK: mtspr 275, 4
0x7c 0x93 0x43 0xa6
-# CHECK: mtspr 280, 4
+# CHECK: mtasr 4
0x7c 0x98 0x43 0xa6
-# CHECK: mfspr 4, 22
+# CHECK: mfdec 4
0x7c 0x96 0x02 0xa6
-# CHECK: mtspr 22, 4
+# CHECK: mtdec 4
0x7c 0x96 0x03 0xa6
# CHECK: mfpvr 4
0x7c 0x9f 0x42 0xa6
-# CHECK: mfspr 4, 25
+# CHECK: mfsdr1 4
0x7c 0x99 0x02 0xa6
-# CHECK: mtspr 25, 4
+# CHECK: mtsdr1 4
0x7c 0x99 0x03 0xa6
-# CHECK: mfspr 4, 26
+# CHECK: mfsrr0 4
0x7c 0x9a 0x02 0xa6
-# CHECK: mtspr 26, 4
+# CHECK: mtsrr0 4
0x7c 0x9a 0x03 0xa6
-# CHECK: mfspr 4, 27
+# CHECK: mfsrr1 4
0x7c 0x9b 0x02 0xa6
-# CHECK: mtspr 27, 4
+# CHECK: mtsrr1 4
0x7c 0x9b 0x03 0xa6
# CHECK: slbie 4
diff --git a/llvm/test/MC/PowerPC/ppc64-encoding-bookIII.s b/llvm/test/MC/PowerPC/ppc64-encoding-bookIII.s
index 9592f425dce3..503001aff085 100644
--- a/llvm/test/MC/PowerPC/ppc64-encoding-bookIII.s
+++ b/llvm/test/MC/PowerPC/ppc64-encoding-bookIII.s
@@ -90,44 +90,44 @@
# CHECK-LE: mtspr 263, 4 # encoding: [0xa6,0x43,0x87,0x7c]
mtsprg7 %r4
-# CHECK-BE: mtspr 280, 4 # encoding: [0x7c,0x98,0x43,0xa6]
-# CHECK-LE: mtspr 280, 4 # encoding: [0xa6,0x43,0x98,0x7c]
+# CHECK-BE: mtasr 4 # encoding: [0x7c,0x98,0x43,0xa6]
+# CHECK-LE: mtasr 4 # encoding: [0xa6,0x43,0x98,0x7c]
mtasr %r4
-# CHECK-BE: mfspr 4, 22 # encoding: [0x7c,0x96,0x02,0xa6]
-# CHECK-LE: mfspr 4, 22 # encoding: [0xa6,0x02,0x96,0x7c]
+# CHECK-BE: mfdec 4 # encoding: [0x7c,0x96,0x02,0xa6]
+# CHECK-LE: mfdec 4 # encoding: [0xa6,0x02,0x96,0x7c]
mfdec %r4
-# CHECK-BE: mtspr 22, 4 # encoding: [0x7c,0x96,0x03,0xa6]
-# CHECK-LE: mtspr 22, 4 # encoding: [0xa6,0x03,0x96,0x7c]
+# CHECK-BE: mtdec 4 # encoding: [0x7c,0x96,0x03,0xa6]
+# CHECK-LE: mtdec 4 # encoding: [0xa6,0x03,0x96,0x7c]
mtdec %r4
# CHECK-BE: mfpvr 4 # encoding: [0x7c,0x9f,0x42,0xa6]
# CHECK-LE: mfpvr 4 # encoding: [0xa6,0x42,0x9f,0x7c]
mfpvr %r4
-# CHECK-BE: mfspr 4, 25 # encoding: [0x7c,0x99,0x02,0xa6]
-# CHECK-LE: mfspr 4, 25 # encoding: [0xa6,0x02,0x99,0x7c]
+# CHECK-BE: mfsdr1 4 # encoding: [0x7c,0x99,0x02,0xa6]
+# CHECK-LE: mfsdr1 4 # encoding: [0xa6,0x02,0x99,0x7c]
mfsdr1 %r4
-# CHECK-BE: mtspr 25, 4 # encoding: [0x7c,0x99,0x03,0xa6]
-# CHECK-LE: mtspr 25, 4 # encoding: [0xa6,0x03,0x99,0x7c]
+# CHECK-BE: mtsdr1 4 # encoding: [0x7c,0x99,0x03,0xa6]
+# CHECK-LE: mtsdr1 4 # encoding: [0xa6,0x03,0x99,0x7c]
mtsdr1 %r4
-# CHECK-BE: mfspr 4, 26 # encoding: [0x7c,0x9a,0x02,0xa6]
-# CHECK-LE: mfspr 4, 26 # encoding: [0xa6,0x02,0x9a,0x7c]
+# CHECK-BE: mfsrr0 4 # encoding: [0x7c,0x9a,0x02,0xa6]
+# CHECK-LE: mfsrr0 4 # encoding: [0xa6,0x02,0x9a,0x7c]
mfsrr0 %r4
-# CHECK-BE: mtspr 26, 4 # encoding: [0x7c,0x9a,0x03,0xa6]
-# CHECK-LE: mtspr 26, 4 # encoding: [0xa6,0x03,0x9a,0x7c]
+# CHECK-BE: mtsrr0 4 # encoding: [0x7c,0x9a,0x03,0xa6]
+# CHECK-LE: mtsrr0 4 # encoding: [0xa6,0x03,0x9a,0x7c]
mtsrr0 %r4
-# CHECK-BE: mfspr 4, 27 # encoding: [0x7c,0x9b,0x02,0xa6]
-# CHECK-LE: mfspr 4, 27 # encoding: [0xa6,0x02,0x9b,0x7c]
+# CHECK-BE: mfsrr1 4 # encoding: [0x7c,0x9b,0x02,0xa6]
+# CHECK-LE: mfsrr1 4 # encoding: [0xa6,0x02,0x9b,0x7c]
mfsrr1 %r4
-# CHECK-BE: mtspr 27, 4 # encoding: [0x7c,0x9b,0x03,0xa6]
-# CHECK-LE: mtspr 27, 4 # encoding: [0xa6,0x03,0x9b,0x7c]
+# CHECK-BE: mtsrr1 4 # encoding: [0x7c,0x9b,0x03,0xa6]
+# CHECK-LE: mtsrr1 4 # encoding: [0xa6,0x03,0x9b,0x7c]
mtsrr1 %r4
# CHECK-BE: slbie 4 # encoding: [0x7c,0x00,0x23,0x64]
diff --git a/llvm/test/MC/PowerPC/ppc64-encoding-ext.s b/llvm/test/MC/PowerPC/ppc64-encoding-ext.s
index 0b7bc927c63f..892c1eceef16 100644
--- a/llvm/test/MC/PowerPC/ppc64-encoding-ext.s
+++ b/llvm/test/MC/PowerPC/ppc64-encoding-ext.s
@@ -3443,29 +3443,29 @@
# CHECK-BE: mfdar 2 # encoding: [0x7c,0x53,0x02,0xa6]
# CHECK-LE: mfdar 2 # encoding: [0xa6,0x02,0x53,0x7c]
mfdar 2
-# CHECK-BE: mtspr 22, 2 # encoding: [0x7c,0x56,0x03,0xa6]
-# CHECK-LE: mtspr 22, 2 # encoding: [0xa6,0x03,0x56,0x7c]
+# CHECK-BE: mtdec 2 # encoding: [0x7c,0x56,0x03,0xa6]
+# CHECK-LE: mtdec 2 # encoding: [0xa6,0x03,0x56,0x7c]
mtdec 2
-# CHECK-BE: mfspr 2, 22 # encoding: [0x7c,0x56,0x02,0xa6]
-# CHECK-LE: mfspr 2, 22 # encoding: [0xa6,0x02,0x56,0x7c]
+# CHECK-BE: mfdec 2 # encoding: [0x7c,0x56,0x02,0xa6]
+# CHECK-LE: mfdec 2 # encoding: [0xa6,0x02,0x56,0x7c]
mfdec 2
-# CHECK-BE: mtspr 25, 2 # encoding: [0x7c,0x59,0x03,0xa6]
-# CHECK-LE: mtspr 25, 2 # encoding: [0xa6,0x03,0x59,0x7c]
+# CHECK-BE: mtsdr1 2 # encoding: [0x7c,0x59,0x03,0xa6]
+# CHECK-LE: mtsdr1 2 # encoding: [0xa6,0x03,0x59,0x7c]
mtsdr1 2
-# CHECK-BE: mfspr 2, 25 # encoding: [0x7c,0x59,0x02,0xa6]
-# CHECK-LE: mfspr 2, 25 # encoding: [0xa6,0x02,0x59,0x7c]
+# CHECK-BE: mfsdr1 2 # encoding: [0x7c,0x59,0x02,0xa6]
+# CHECK-LE: mfsdr1 2 # encoding: [0xa6,0x02,0x59,0x7c]
mfsdr1 2
-# CHECK-BE: mtspr 26, 2 # encoding: [0x7c,0x5a,0x03,0xa6]
-# CHECK-LE: mtspr 26, 2 # encoding: [0xa6,0x03,0x5a,0x7c]
+# CHECK-BE: mtsrr0 2 # encoding: [0x7c,0x5a,0x03,0xa6]
+# CHECK-LE: mtsrr0 2 # encoding: [0xa6,0x03,0x5a,0x7c]
mtsrr0 2
-# CHECK-BE: mfspr 2, 26 # encoding: [0x7c,0x5a,0x02,0xa6]
-# CHECK-LE: mfspr 2, 26 # encoding: [0xa6,0x02,0x5a,0x7c]
+# CHECK-BE: mfsrr0 2 # encoding: [0x7c,0x5a,0x02,0xa6]
+# CHECK-LE: mfsrr0 2 # encoding: [0xa6,0x02,0x5a,0x7c]
mfsrr0 2
-# CHECK-BE: mtspr 27, 2 # encoding: [0x7c,0x5b,0x03,0xa6]
-# CHECK-LE: mtspr 27, 2 # encoding: [0xa6,0x03,0x5b,0x7c]
+# CHECK-BE: mtsrr1 2 # encoding: [0x7c,0x5b,0x03,0xa6]
+# CHECK-LE: mtsrr1 2 # encoding: [0xa6,0x03,0x5b,0x7c]
mtsrr1 2
-# CHECK-BE: mfspr 2, 27 # encoding: [0x7c,0x5b,0x02,0xa6]
-# CHECK-LE: mfspr 2, 27 # encoding: [0xa6,0x02,0x5b,0x7c]
+# CHECK-BE: mfsrr1 2 # encoding: [0x7c,0x5b,0x02,0xa6]
+# CHECK-LE: mfsrr1 2 # encoding: [0xa6,0x02,0x5b,0x7c]
mfsrr1 2
# CHECK-BE: mtcfar 2 # encoding: [0x7c,0x5c,0x03,0xa6]
# CHECK-LE: mtcfar 2 # encoding: [0xa6,0x03,0x5c,0x7c]
@@ -3636,8 +3636,8 @@
# CHECK-BE: mfasr 2 # encoding: [0x7c,0x58,0x42,0xa6]
# CHECK-LE: mfasr 2 # encoding: [0xa6,0x42,0x58,0x7c]
mfasr 2
-# CHECK-BE: mtspr 280, 2 # encoding: [0x7c,0x58,0x43,0xa6]
-# CHECK-LE: mtspr 280, 2 # encoding: [0xa6,0x43,0x58,0x7c]
+# CHECK-BE: mtasr 2 # encoding: [0x7c,0x58,0x43,0xa6]
+# CHECK-LE: mtasr 2 # encoding: [0xa6,0x43,0x58,0x7c]
mtasr 2
# Load and Store Caching Inhibited Instructions
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