[PATCH] D76567: AMDGPU: Implement getMemcpyLoopLoweringType
    Matt Arsenault via Phabricator via llvm-commits 
    llvm-commits at lists.llvm.org
       
    Wed Mar 25 12:59:36 PDT 2020
    
    
  
arsenm marked 2 inline comments as done.
arsenm added inline comments.
================
Comment at: llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp:332
+    // introduce them.
+    if (MinAlign == 2)
+      return Type::getInt8Ty(Context);
----------------
foad wrote:
> `<=`? You can't do unaligned dword (or multi-dword) accesses, can you?
Yes, you can on anything remotely new. It's also not critical to get this exactly right, since the loads will still be legalized later.
================
Comment at: llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp:349-351
+  uint64_t Size = ConstLen->getZExtValue();
+  if (Size >= 16)
+    return VectorType::get(Type::getInt32Ty(Context), 4);
----------------
foad wrote:
> Don't all these (multi-)dword cases need to be guarded by `MinAlign >= 4`?
No, unaligned access is supposed to be enabled by default on targets that support it. I didn't bother trying to worry about what's best without the support. We also really need some microbenchmarks to make precise decisions here (although that will probably never happen)
CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D76567/new/
https://reviews.llvm.org/D76567
    
    
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