[PATCH] D76740: [ARM] MVE VMULL patterns

[Dave Green via Phabricator via llvm-commits]

dmgreen created this revision.
dmgreen added reviewers: samparker, SjoerdMeijer, simon_tatham, ostannard.
Herald added subscribers: hiraditya, kristof.beyls.

This adds MVE vmull patterns, which are conceptually the same as mul(vmovl, vmovl), and so the tablegen patterns follow the same structure.

For i8 and i16 this is simple enough, but in the i32 version the multiply (in 64bits) is illegal, meaning we need to catch the pattern earlier in a dag fold. Because bitcasts are involved in the zext versions and the patterns are a little different in little and big endian. I have only added little endian support in this patch.


https://reviews.llvm.org/D76740

Files:
  llvm/lib/Target/ARM/ARMISelLowering.cpp
  llvm/lib/Target/ARM/ARMInstrInfo.td
  llvm/lib/Target/ARM/ARMInstrMVE.td
  llvm/lib/Target/ARM/ARMInstrNEON.td
  llvm/test/CodeGen/Thumb2/mve-vecreduce-mla.ll
  llvm/test/CodeGen/Thumb2/mve-vmull.ll

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