[llvm] ea64ee0 - [Alignment][NFC] Deprecate ensureMaxAlignment
Guillaume Chatelet via llvm-commits
llvm-commits at lists.llvm.org
Mon Mar 23 03:44:06 PDT 2020
Author: Guillaume Chatelet
Date: 2020-03-23T11:31:33+01:00
New Revision: ea64ee0edb27607fc04d287809099f02fce50315
URL: https://github.com/llvm/llvm-project/commit/ea64ee0edb27607fc04d287809099f02fce50315
DIFF: https://github.com/llvm/llvm-project/commit/ea64ee0edb27607fc04d287809099f02fce50315.diff
LOG: [Alignment][NFC] Deprecate ensureMaxAlignment
Summary:
This is patch is part of a series to introduce an Alignment type.
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html
See this patch for the introduction of the type: https://reviews.llvm.org/D64790
Reviewers: courbet
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D76368
Added:
Modified:
llvm/include/llvm/CodeGen/CallingConvLower.h
llvm/include/llvm/CodeGen/MachineFrameInfo.h
llvm/include/llvm/CodeGen/TargetRegisterInfo.h
llvm/include/llvm/IR/Function.h
llvm/lib/CodeGen/MIRParser/MIRParser.cpp
llvm/lib/CodeGen/MachineFunction.cpp
llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
llvm/lib/Target/X86/X86FrameLowering.cpp
Removed:
################################################################################
diff --git a/llvm/include/llvm/CodeGen/CallingConvLower.h b/llvm/include/llvm/CodeGen/CallingConvLower.h
index a30ca638ee6d..c4ecd843bd0b 100644
--- a/llvm/include/llvm/CodeGen/CallingConvLower.h
+++ b/llvm/include/llvm/CodeGen/CallingConvLower.h
@@ -435,7 +435,7 @@ class CCState {
void ensureMaxAlignment(Align Alignment) {
if (!AnalyzingMustTailForwardedRegs)
- MF.getFrameInfo().ensureMaxAlignment(Alignment.value());
+ MF.getFrameInfo().ensureMaxAlignment(Alignment);
}
/// Version of AllocateStack with extra register to be shadowed.
diff --git a/llvm/include/llvm/CodeGen/MachineFrameInfo.h b/llvm/include/llvm/CodeGen/MachineFrameInfo.h
index 384b206fc220..03811bc5145c 100644
--- a/llvm/include/llvm/CodeGen/MachineFrameInfo.h
+++ b/llvm/include/llvm/CodeGen/MachineFrameInfo.h
@@ -484,7 +484,7 @@ class MachineFrameInfo {
// Only ensure max alignment for the default stack.
if (getStackID(ObjectIdx) == 0)
- ensureMaxAlignment(Align);
+ ensureMaxAlignment(assumeAligned(Align));
}
/// setObjectAlignment - Change the alignment of the specified stack object.
@@ -594,7 +594,8 @@ class MachineFrameInfo {
/// Make sure the function is at least Align bytes aligned.
void ensureMaxAlignment(Align Alignment);
/// FIXME: Remove this once transition to Align is over.
- inline void ensureMaxAlignment(unsigned Align) {
+ LLVM_ATTRIBUTE_DEPRECATED(inline void ensureMaxAlignment(unsigned Align),
+ "Use the version that uses Align instead") {
ensureMaxAlignment(assumeAligned(Align));
}
diff --git a/llvm/include/llvm/CodeGen/TargetRegisterInfo.h b/llvm/include/llvm/CodeGen/TargetRegisterInfo.h
index 658e3263559a..07aaddd47f44 100644
--- a/llvm/include/llvm/CodeGen/TargetRegisterInfo.h
+++ b/llvm/include/llvm/CodeGen/TargetRegisterInfo.h
@@ -285,6 +285,12 @@ class TargetRegisterInfo : public MCRegisterInfo {
return getRegClassInfo(RC).SpillAlignment / 8;
}
+ /// Return the minimum required alignment in bytes for a spill slot for
+ /// a register of this class.
+ Align getSpillAlign(const TargetRegisterClass &RC) const {
+ return Align(getRegClassInfo(RC).SpillAlignment / 8);
+ }
+
/// Return true if the given TargetRegisterClass has the ValueType T.
bool isTypeLegalForClass(const TargetRegisterClass &RC, MVT T) const {
for (auto I = legalclasstypes_begin(RC); *I != MVT::Other; ++I)
diff --git a/llvm/include/llvm/IR/Function.h b/llvm/include/llvm/IR/Function.h
index d9cbcc63fa62..2e3ea1400d9a 100644
--- a/llvm/include/llvm/IR/Function.h
+++ b/llvm/include/llvm/IR/Function.h
@@ -349,6 +349,13 @@ class Function : public GlobalObject, public ilist_node<Function> {
return 0;
}
+ /// Return the stack alignment for the function.
+ MaybeAlign getFnStackAlign() const {
+ if (!hasFnAttribute(Attribute::StackAlignment))
+ return None;
+ return AttributeSets.getStackAlignment(AttributeList::FunctionIndex);
+ }
+
/// hasGC/getGC/setGC/clearGC - The name of the garbage collection algorithm
/// to use during code generation.
bool hasGC() const {
diff --git a/llvm/lib/CodeGen/MIRParser/MIRParser.cpp b/llvm/lib/CodeGen/MIRParser/MIRParser.cpp
index 199d077ac66e..cad0a8d0899a 100644
--- a/llvm/lib/CodeGen/MIRParser/MIRParser.cpp
+++ b/llvm/lib/CodeGen/MIRParser/MIRParser.cpp
@@ -654,7 +654,7 @@ bool MIRParserImpl::initializeFrameInfo(PerFunctionMIParsingState &PFS,
MFI.setStackSize(YamlMFI.StackSize);
MFI.setOffsetAdjustment(YamlMFI.OffsetAdjustment);
if (YamlMFI.MaxAlignment)
- MFI.ensureMaxAlignment(YamlMFI.MaxAlignment);
+ MFI.ensureMaxAlignment(Align(YamlMFI.MaxAlignment));
MFI.setAdjustsStack(YamlMFI.AdjustsStack);
MFI.setHasCalls(YamlMFI.HasCalls);
if (YamlMFI.MaxCallFrameSize != ~0u)
diff --git a/llvm/lib/CodeGen/MachineFunction.cpp b/llvm/lib/CodeGen/MachineFunction.cpp
index 76a1bd9f75af..781ddc9bd639 100644
--- a/llvm/lib/CodeGen/MachineFunction.cpp
+++ b/llvm/lib/CodeGen/MachineFunction.cpp
@@ -172,7 +172,7 @@ void MachineFunction::init() {
F.hasFnAttribute(Attribute::StackAlignment));
if (F.hasFnAttribute(Attribute::StackAlignment))
- FrameInfo->ensureMaxAlignment(F.getFnStackAlignment());
+ FrameInfo->ensureMaxAlignment(*F.getFnStackAlign());
ConstantPool = new (Allocator) MachineConstantPool(getDataLayout());
Alignment = STI->getTargetLowering()->getMinFunctionAlignment();
diff --git a/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp b/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
index 2e7a65ba0a0d..5248dc807368 100644
--- a/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
@@ -432,7 +432,7 @@ HexagonTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
DAG.getCopyFromReg(Chain, dl, HRI.getStackRegister(), PtrVT);
bool NeedsArgAlign = false;
- unsigned LargestAlignSeen = 0;
+ Align LargestAlignSeen;
// Walk the register/memloc assignments, inserting copies/loads.
for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) {
CCValAssign &VA = ArgLocs[i];
@@ -469,8 +469,8 @@ HexagonTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
StackPtr.getValueType());
MemAddr = DAG.getNode(ISD::ADD, dl, MVT::i32, StackPtr, MemAddr);
if (ArgAlign)
- LargestAlignSeen = std::max(LargestAlignSeen,
- (unsigned)VA.getLocVT().getStoreSizeInBits() >> 3);
+ LargestAlignSeen = std::max(
+ LargestAlignSeen, Align(VA.getLocVT().getStoreSizeInBits() / 8));
if (Flags.isByVal()) {
// The argument is a struct passed by value. According to LLVM, "Arg"
// is a pointer.
@@ -493,7 +493,7 @@ HexagonTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
if (NeedsArgAlign && Subtarget.hasV60Ops()) {
LLVM_DEBUG(dbgs() << "Function needs byte stack align due to call args\n");
- unsigned VecAlign = HRI.getSpillAlignment(Hexagon::HvxVRRegClass);
+ Align VecAlign(HRI.getSpillAlignment(Hexagon::HvxVRRegClass));
LargestAlignSeen = std::max(LargestAlignSeen, VecAlign);
MFI.ensureMaxAlignment(LargestAlignSeen);
}
diff --git a/llvm/lib/Target/X86/X86FrameLowering.cpp b/llvm/lib/Target/X86/X86FrameLowering.cpp
index 4949d2f42c8b..d9f87d76a078 100644
--- a/llvm/lib/Target/X86/X86FrameLowering.cpp
+++ b/llvm/lib/Target/X86/X86FrameLowering.cpp
@@ -2229,16 +2229,16 @@ bool X86FrameLowering::assignCalleeSavedSpillSlots(
const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg, VT);
unsigned Size = TRI->getSpillSize(*RC);
- unsigned Align = TRI->getSpillAlignment(*RC);
+ Align Alignment = TRI->getSpillAlign(*RC);
// ensure alignment
assert(SpillSlotOffset < 0 && "SpillSlotOffset should always < 0 on X86");
- SpillSlotOffset = -alignTo(-SpillSlotOffset, Align);
+ SpillSlotOffset = -alignTo(-SpillSlotOffset, Alignment);
// spill into slot
SpillSlotOffset -= Size;
int SlotIndex = MFI.CreateFixedSpillStackObject(Size, SpillSlotOffset);
CSI[i - 1].setFrameIdx(SlotIndex);
- MFI.ensureMaxAlignment(Align);
+ MFI.ensureMaxAlignment(Alignment);
// Save the start offset and size of XMM in stack frame for funclets.
if (X86::VR128RegClass.contains(Reg)) {
More information about the llvm-commits
mailing list