[PATCH] D74318: AMDGPU/GlobalISel: Handle image atomics

Jay Foad via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Mar 19 09:45:58 PDT 2020


foad added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp:1188
+    if (BaseOpcode->AtomicX2) {
+      assert(MI.getOperand(3).getReg() == AMDGPU::NoRegister);
+
----------------
If I rebase this patch (plus some of your others...) on current master, this assertion fails during testing. Any idea why?
```
(gdb) up 4
#4  0x0000000003a8cc76 in llvm::AMDGPUInstructionSelector::selectImageIntrinsic (this=0x7851850, MI=..., Intr=0x150cd70 <llvm::AMDGPU::ImageDimIntrinsicTable+192>) at /home/jayfoad2/git/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp:1284
1284	      assert(MI.getOperand(3).getReg() == AMDGPU::NoRegister);
(gdb) call MI.dump()
  %14:vgpr_32(s32) = G_AMDGPU_INTRIN_IMAGE_LOAD intrinsic(@llvm.amdgcn.image.atomic.cmpswap.1d), %1:vgpr(s32), %2:vgpr(s32), %3:vgpr(s32), %0:sgpr(<8 x s32>), 0, 0 :: (volatile dereferenceable load store 4 on custom "TargetCustom8")
```


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D74318/new/

https://reviews.llvm.org/D74318





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