[llvm] 4d8a720 - [NFC] Simplify test

[Piotr Sobczak via llvm-commits]

Author: Piotr Sobczak
Date: 2020-03-19T14:29:57+01:00
New Revision: 4d8a72027706883a14f8ea0b9e0986c6e44da496

URL: https://github.com/llvm/llvm-project/commit/4d8a72027706883a14f8ea0b9e0986c6e44da496
DIFF: https://github.com/llvm/llvm-project/commit/4d8a72027706883a14f8ea0b9e0986c6e44da496.diff

LOG: [NFC] Simplify test

Remove extra preheader block as there is no value in keeping it.

Added: 
    

Modified: 
    llvm/test/CodeGen/AMDGPU/multi-divergent-exit-region.ll

Removed: 
    


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diff  --git a/llvm/test/CodeGen/AMDGPU/multi-divergent-exit-region.ll b/llvm/test/CodeGen/AMDGPU/multi-divergent-exit-region.ll
index c09d18e104f7..d473146d1cdd 100644
--- a/llvm/test/CodeGen/AMDGPU/multi-divergent-exit-region.ll
+++ b/llvm/test/CodeGen/AMDGPU/multi-divergent-exit-region.ll
@@ -729,15 +729,18 @@ bb5:                                              ; preds = %bb3
 
 ; IR: [[FLOW]]:
 ; IR-NEXT: phi
-; IR-NEXT: br i1 [[CND2:%.*]], label %[[PREHEADER:.*]], label %[[FLOW2:.*]]
+; IR-NEXT: br i1 [[CND2:%.*]], label %[[LOOP:.*]], label %UnifiedReturnBlock
 
-; IR: [[FLOW2]]:
-; IR-NEXT: br label %UnifiedReturnBlock
+; IR: [[LOOP]]:
+; IR-NEXT: br i1 false, label %[[FLOW1:.*]], label %[[LOOP]]
 
 ; IR: [[EXP]]:
 ; IR-NEXT: call void @llvm.amdgcn.exp.compr.v2f16(i32 immarg 0, i32 immarg 15, <2 x half> <half 0xH3C00, half 0xH0000>, <2 x half> <half 0xH0000, half 0xH3C00>, i1 immarg false, i1 immarg true)
 ; IR-NEXT: br label %[[FLOW]]
 
+; IR: [[FLOW1]]:
+; IR-NEXT: br label %UnifiedReturnBlock
+
 ; IR: UnifiedReturnBlock:
 ; IR-NEXT: call void @llvm.amdgcn.exp.f32(i32 9, i32 0, float undef, float undef, float undef, float undef, i1 true, i1 true)
 ; IR-NEXT: ret void
@@ -745,13 +748,10 @@ bb5:                                              ; preds = %bb3
 define amdgpu_ps void @uniformly_reached_export(float inreg %tmp25) {
 .entry:
   %tmp26 = fcmp olt float %tmp25, 0.000000e+00
-  br i1 %tmp26, label %.preheader.1, label %bb27
-
-.preheader.1:                                     ; preds = %.entry
-  br label %bb
+  br i1 %tmp26, label %loop, label %bb27
 
-bb:                                               ; preds = %bb, %.preheader.1
-  br label %bb
+loop:                                               ; preds = %loop, %.entry
+  br label %loop
 
 bb27:                                             ; preds = %.entry
   call void @llvm.amdgcn.exp.compr.v2f16(i32 immarg 0, i32 immarg 15, <2 x half> <half 0xH3C00, half 0xH0000>, <2 x half> <half 0xH0000, half 0xH3C00>, i1 immarg true, i1 immarg true)