[llvm] 47ce140 - [InstSimplify] Add missing vector OR test to show lack of DemandedElts support

[Simon Pilgrim via llvm-commits]

Author: Simon Pilgrim
Date: 2020-03-18T20:24:14Z
New Revision: 47ce1406c8e602f462a3901eedc13269104639cb

URL: https://github.com/llvm/llvm-project/commit/47ce1406c8e602f462a3901eedc13269104639cb
DIFF: https://github.com/llvm/llvm-project/commit/47ce1406c8e602f462a3901eedc13269104639cb.diff

LOG: [InstSimplify] Add missing vector OR test to show lack of DemandedElts support

Added: 
    

Modified: 
    llvm/test/Transforms/InstSimplify/or.ll

Removed: 
    


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diff  --git a/llvm/test/Transforms/InstSimplify/or.ll b/llvm/test/Transforms/InstSimplify/or.ll
index 2dabb038bdcd..af301f118d77 100644
--- a/llvm/test/Transforms/InstSimplify/or.ll
+++ b/llvm/test/Transforms/InstSimplify/or.ll
@@ -110,6 +110,23 @@ define i8 @test11(i8 %A) {
   ret i8 %E
 }
 
+define i8 @test11v(<2 x i8> %A) {
+; CHECK-LABEL: @test11v(
+; CHECK-NEXT:    [[B:%.*]] = or <2 x i8> [[A:%.*]], <i8 -2, i8 0>
+; CHECK-NEXT:    [[CV:%.*]] = xor <2 x i8> [[B]], <i8 13, i8 13>
+; CHECK-NEXT:    [[C:%.*]] = extractelement <2 x i8> [[CV]], i32 0
+; CHECK-NEXT:    [[D:%.*]] = or i8 [[C]], 1
+; CHECK-NEXT:    [[E:%.*]] = xor i8 [[D]], 12
+; CHECK-NEXT:    ret i8 [[E]]
+;
+  %B = or <2 x i8> %A, <i8 -2, i8 0>
+  %CV = xor <2 x i8> %B, <i8 13, i8 13>
+  %C = extractelement <2 x i8> %CV, i32 0
+  %D = or i8 %C, 1
+  %E = xor i8 %D, 12
+  ret i8 %E
+}
+
 ; Test the case where integer BitWidth <= 64 && BitWidth % 2 != 0.
 ; If we have: ((V + N) & C1) | (V & C2)
 ; .. and C2 = ~C1 and C2 is 0+1+ and (N & C2) == 0