[PATCH] D71831: [PowerPC] Exploit the rldicl + rldicl when and with mask

[qshanz via Phabricator via llvm-commits]

steven.zhang marked 3 inline comments as done.
steven.zhang added inline comments.


================
Comment at: llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp:4451
+  if (isUInt<16>(Imm64))
+    return false;
+
----------------
shchenz wrote:
> `andis.` in .td handles 0xABCD0000 u32imm, will this makes this kind imm worse?
No. It will be caught by single rlwinm if it is the pattern that this patch matches.


================
Comment at: llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp:4474
+  }
+
+  // We can do special handling for pattern like this.
----------------
steven.zhang wrote:
> shchenz wrote:
> > I personally think the logic for the special case is a little hard to follow.
> > I guess you want to convert the following imm: 0x00ffffffffff00ff,
> > 
> > can we first treat it as imm' 0xffffffffffff00ff? and we can call normal case like above, then we get
> > ```
> > Val = SDValue(CurDAG->getMachineNode(PPC::RLDICL, Loc, MVT::i64, Val,
> >                                          getI64Imm(ME + 1, Loc),
> >                                          getI64Imm((MB + 63 - ME) & 63, Loc)),
> > 
> > SDValue Ops[] = {Val, getI64Imm(63 - ME, Loc), getI64Imm(0, Loc)};
> > CurDAG->SelectNodeTo(N, PPC::RLDICL, MVT::i64, Ops);
> > ```
> > Notice that the second `rldicl` for above normal case has no clear operation, so its mb is 0,  can we add the clear for the highest 8 bits here?
> > Make a call for above normal case and then clear the highest bits in the second `rldicl`?
> No. The pattern is: 0x00fff00ff000.  The idea is to calculate the position of [MB1, ME1] for fff, and [MB2, ME2] for ff. Then, use two rotate clear instructions to do the calculation, 
In fact, both works. The pattern is 0x00fff00fff. Update the patch to make it more clear.


================
Comment at: llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp:4481
+  MB = countLeadingZeros(Imm64);
+  ME = 63 - countTrailingZeros(Imm64);
+  if (ME != 63)
----------------
steven.zhang wrote:
> shchenz wrote:
> > check last bit is 1? Is it too complicated to call countTrailingZeros? 
> The last bit doesn't necessary to be 1. We need to get the number of trailing 0's.
Good point. In fact, we don't need the check here as the isRunOfOnes64 will check it for us. 


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D71831/new/

https://reviews.llvm.org/D71831