[PATCH] D76253: [AMDGPU] Print DWARF register numbers in AMDGPUInstPrinter
Tony Tye via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Mar 16 16:57:36 PDT 2020
t-tye accepted this revision.
t-tye added a comment.
This revision is now accepted and ready to land.
Minor suggestion in comment.
================
Comment at: llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp:37
+ // wave32/wave64 where using the physical register name is ambiguous: if we
+ // write e.g. `.cfi_undefined s0` we lose information about the wavefront
+ // size which we need to encode the register in the final DWARF. Ideally we
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v0 would be a better example than s0 as the vector registers have wave32 and wave64 DWARF versions, but the scalar registers are the same for both modes.
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https://reviews.llvm.org/D76253
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