[PATCH] D75863: [AIX] Implement by-val caller arguments in a single register

[Chris Bowler via Phabricator via llvm-commits]

cebowleratibm planned changes to this revision.
cebowleratibm marked 3 inline comments as done.
cebowleratibm added a comment.

1. Split byval cc tests into a separate file.
2. Use ZEXTLOAD



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Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:7125
+        }
+        SDValue Load = DAG.getExtLoad(ISD::EXTLOAD, dl, PtrVT, Chain, LoadAddr,
+                                      MachinePointerInfo(), VT);
----------------
sfertile wrote:
> IIUC EXTLOAD is safe for the first load because it will be left justified in the register after the shift,  but the later loads need the upper bits defined to zero because we are ORing them into those shifted bits. 
Good catch.  Using ZEXTLOAD improved the codegen to use rotate/mask inserts to assemble the byval in register.  See the test updates on the next revision.


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  https://reviews.llvm.org/D75863/new/

https://reviews.llvm.org/D75863