[PATCH] D76158: Add inline assembly load hardening mitigation for Load Value Injection (LVI) on X86

Scott Constable via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Mar 13 14:01:30 PDT 2020


sconstab created this revision.
sconstab added reviewers: craig.topper, andrew.w.kaylor, chandlerc, zbrid, george.burgess.iv.
Herald added subscribers: jfb, hiraditya.
sconstab added parent revisions: D75934: Add Indirect Thunk Support to X86 to mitigate Load Value Injection (LVI) [2/5], D75936: Add a Pass to X86 that builds a Condensed CFG for Load Value Injection (LVI) Gadgets [4/5], D75937: Add Support to X86 for Load Hardening to Mitigate Load Value Injection (LVI) [5/5], D75935: Add RET-hardening Support to X86 to mitigate Load Value Injection (LVI) [3/5].

Added code to `X86AsmParser::emitInstruction()` to add an LFENCE after each instruction that may load.

FIXME: Need to add warnings for instructions that cannot be hardened automatically. Examples include:

- `RET`
- `JMP/CALL [mem]`
- `REP* CMPS`
- `REP* SCAS`


https://reviews.llvm.org/D76158

Files:
  llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
  llvm/test/CodeGen/X86/lvi-hardening-inline-asm.ll

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