[PATCH] D75889: AMDGPU: Use V_MAC_F32 for fmad.ftz

[Stanislav Mekhanoshin via Phabricator via llvm-commits]

rampitec added a comment.

In D75889#1915375 <https://reviews.llvm.org/D75889#1915375>, @arsenm wrote:

> In D75889#1915361 <https://reviews.llvm.org/D75889#1915361>, @rampitec wrote:
>
> > It was used in the div expansion for some non obvious reason. As far as I know it means 0.0 * x = 0.0, but I am not sure it is needed in this case.
> >  Please run PSDB on this change, if it passes then LGTM.
>
>
> It’s used in the div expansion because we want it regardless of the denormal mode. My confusion is for the f16 case, where the instruction was renamed or changed for some reason


In GFX8, the opcodes below would write their result as:  { 16’h0, result[15:0] }

MAD_F16
MAD_U16
MAD_I16
FMA_F16
DIV_FIXUP_F16
INTERP_P2_F16

GFX9 adds the “OPSEL” field to VOP3 (which was all zeros in GFX8), and the behavior of those instructions changes to: { previous_gpr_value[31:16], result[15:0] } when used with VOP3. VOP1/VOP2 will write zero to unused bits unless SDWA specifies otherwise, and VOP1/VOP2 ops encoded as VOP3 will write zero.
In order to support apps written for GFX8, the opcodes above will be renamed with the word “legacy” added:

MAD_LEGACY_F16
MAD_LEGACY_U16
MAD_LEGACY_I16
FMA_LEGACY_F16
DIV_FIXUP_LEGACY_F16
INTERP_P2_LEGACY_F16

New opcodes with the names of the original opcodes have been created which support this new “preserve” behavior. Also, all new 16-bit opcodes for GFX9 support the new “preserve” behavior.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D75889/new/

https://reviews.llvm.org/D75889