[PATCH] D75145: [PassManager] adjust VectorCombine placement

Sanjay Patel via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Mar 6 11:02:04 PST 2020


spatel added a comment.

In D75145#1909968 <https://reviews.llvm.org/D75145#1909968>, @lebedev.ri wrote:

> .. but while i have completely misreading the bugreport, i still apparently correctly identified the problem, and provided a fix (D75757 <https://reviews.llvm.org/D75757>).


I'm still trying to step through how this affects SCEV (haven't looked at SCEV much before). Are you seeing that D75757 <https://reviews.llvm.org/D75757> solves the ARM codegen regression, or do we still need to fix something in SCEV and/or the later passes?
@dmgreen - can you describe what we're seeing in the final output? Ie, what asm diff should we focus on, and was the code before this patch ideal?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D75145/new/

https://reviews.llvm.org/D75145





More information about the llvm-commits mailing list