[llvm] 71e2ca6 - [llvm-objdump] -d: print `00000000 <foo>:` instead of `00000000 foo:`
Fangrui Song via llvm-commits
llvm-commits at lists.llvm.org
Thu Mar 5 18:06:53 PST 2020
Author: Fangrui Song
Date: 2020-03-05T18:05:28-08:00
New Revision: 71e2ca6e32105b35aeadeab25010e8f999c47c23
URL: https://github.com/llvm/llvm-project/commit/71e2ca6e32105b35aeadeab25010e8f999c47c23
DIFF: https://github.com/llvm/llvm-project/commit/71e2ca6e32105b35aeadeab25010e8f999c47c23.diff
LOG: [llvm-objdump] -d: print `00000000 <foo>:` instead of `00000000 foo:`
The new behavior matches GNU objdump. A pair of angle brackets makes tests slightly easier.
`.foo:` is not unique and thus cannot be used in a `CHECK-LABEL:` directive.
Without `-LABEL`, the CHECK line can match the `Disassembly of section`
line and causes the next `CHECK-NEXT:` to fail.
```
Disassembly of section .foo:
0000000000001634 .foo:
```
Bdragon: <> has metalinguistic connotation. it just "feels right"
Reviewed By: rupprecht
Differential Revision: https://reviews.llvm.org/D75713
Added:
Modified:
lld/test/COFF/arm64-thunks.s
lld/test/COFF/armnt-branch24t.test
lld/test/COFF/autoimport-refptr.s
lld/test/COFF/autoimport-x86.s
lld/test/COFF/imports.test
lld/test/COFF/lto-comdat.ll
lld/test/COFF/lto.ll
lld/test/COFF/mixed-resource-obj.yaml
lld/test/ELF/aarch64-call26-thunk.s
lld/test/ELF/aarch64-condb-reloc.s
lld/test/ELF/aarch64-copy.s
lld/test/ELF/aarch64-cortex-a53-843419-address.s
lld/test/ELF/aarch64-cortex-a53-843419-large.s
lld/test/ELF/aarch64-cortex-a53-843419-large2.s
lld/test/ELF/aarch64-cortex-a53-843419-recognize.s
lld/test/ELF/aarch64-cortex-a53-843419-thunk.s
lld/test/ELF/aarch64-cortex-a53-843419-tlsrelax.s
lld/test/ELF/aarch64-feature-bti.s
lld/test/ELF/aarch64-feature-btipac.s
lld/test/ELF/aarch64-feature-pac.s
lld/test/ELF/aarch64-fpic-got.s
lld/test/ELF/aarch64-gnu-ifunc-address.s
lld/test/ELF/aarch64-gnu-ifunc-nonpreemptable.s
lld/test/ELF/aarch64-gnu-ifunc-plt.s
lld/test/ELF/aarch64-gnu-ifunc.s
lld/test/ELF/aarch64-gnu-ifunc2.s
lld/test/ELF/aarch64-ifunc-bti.s
lld/test/ELF/aarch64-jump26-thunk.s
lld/test/ELF/aarch64-plt.s
lld/test/ELF/aarch64-relocs.s
lld/test/ELF/aarch64-thunk-pi.s
lld/test/ELF/aarch64-thunk-script.s
lld/test/ELF/aarch64-thunk-section-location.s
lld/test/ELF/aarch64-tls-gdie.s
lld/test/ELF/aarch64-tls-gdle.s
lld/test/ELF/aarch64-tls-ie.s
lld/test/ELF/aarch64-tls-iele.s
lld/test/ELF/aarch64-tls-le.s
lld/test/ELF/aarch64-tlsld-ldst.s
lld/test/ELF/aarch64-tstbr14-reloc.s
lld/test/ELF/aarch64-undefined-weak.s
lld/test/ELF/allow-multiple-definition.s
lld/test/ELF/arm-bl-v6-inrange.s
lld/test/ELF/arm-bl-v6.s
lld/test/ELF/arm-blx.s
lld/test/ELF/arm-branch-rangethunk.s
lld/test/ELF/arm-branch-undef-weak-plt-thunk.s
lld/test/ELF/arm-branch.s
lld/test/ELF/arm-copy.s
lld/test/ELF/arm-exidx-canunwind.s
lld/test/ELF/arm-exidx-gc.s
lld/test/ELF/arm-exidx-order.s
lld/test/ELF/arm-extreme-range-pi-thunk.s
lld/test/ELF/arm-fix-cortex-a8-blx.s
lld/test/ELF/arm-fix-cortex-a8-nopatch.s
lld/test/ELF/arm-fix-cortex-a8-plt.s
lld/test/ELF/arm-fix-cortex-a8-recognize.s
lld/test/ELF/arm-fix-cortex-a8-thunk-align.s
lld/test/ELF/arm-fix-cortex-a8-thunk.s
lld/test/ELF/arm-force-pi-thunk.s
lld/test/ELF/arm-fpic-got.s
lld/test/ELF/arm-gnu-ifunc-plt.s
lld/test/ELF/arm-gnu-ifunc.s
lld/test/ELF/arm-got-relative.s
lld/test/ELF/arm-icf-exidx.s
lld/test/ELF/arm-long-thunk-converge.s
lld/test/ELF/arm-plt-reloc.s
lld/test/ELF/arm-sbrel32.s
lld/test/ELF/arm-target1.s
lld/test/ELF/arm-thumb-adr.s
lld/test/ELF/arm-thumb-blx.s
lld/test/ELF/arm-thumb-branch.s
lld/test/ELF/arm-thumb-condbranch-thunk.s
lld/test/ELF/arm-thumb-interwork-abs.s
lld/test/ELF/arm-thumb-interwork-notfunc.s
lld/test/ELF/arm-thumb-interwork-shared.s
lld/test/ELF/arm-thumb-interwork-thunk-v5.s
lld/test/ELF/arm-thumb-interwork-thunk.s
lld/test/ELF/arm-thumb-ldrlit.s
lld/test/ELF/arm-thumb-mix-range-thunk-os.s
lld/test/ELF/arm-thumb-narrow-branch-check.s
lld/test/ELF/arm-thumb-no-undefined-thunk.s
lld/test/ELF/arm-thumb-plt-range-thunk-os.s
lld/test/ELF/arm-thumb-plt-reloc.s
lld/test/ELF/arm-thumb-range-thunk-os.s
lld/test/ELF/arm-thumb-thunk-empty-pass.s
lld/test/ELF/arm-thumb-thunk-v6m.s
lld/test/ELF/arm-thumb-undefined-weak-narrow.test
lld/test/ELF/arm-thumb2-adr.s
lld/test/ELF/arm-thumb2-ldrlit.s
lld/test/ELF/arm-thunk-edgecase.s
lld/test/ELF/arm-thunk-largesection.s
lld/test/ELF/arm-thunk-linkerscript-dotexpr.s
lld/test/ELF/arm-thunk-linkerscript-large.s
lld/test/ELF/arm-thunk-linkerscript-orphan.s
lld/test/ELF/arm-thunk-linkerscript-sort.s
lld/test/ELF/arm-thunk-linkerscript.s
lld/test/ELF/arm-thunk-many-passes.s
lld/test/ELF/arm-thunk-multipass-plt.s
lld/test/ELF/arm-thunk-multipass.s
lld/test/ELF/arm-thunk-nosuitable.s
lld/test/ELF/arm-thunk-re-add.s
lld/test/ELF/arm-tls-gd32.s
lld/test/ELF/arm-tls-ie32.s
lld/test/ELF/arm-tls-ldm32.s
lld/test/ELF/arm-tls-le32.s
lld/test/ELF/arm-undefined-weak.s
lld/test/ELF/basic-avr.s
lld/test/ELF/canonical-plt-pcrel.s
lld/test/ELF/comdat.s
lld/test/ELF/defsym.s
lld/test/ELF/eh-frame-hdr.s
lld/test/ELF/ehframe-relocation.s
lld/test/ELF/gdb-index.s
lld/test/ELF/gnu-ifunc-i386.s
lld/test/ELF/gnu-ifunc-noplt-i386.s
lld/test/ELF/gnu-ifunc-noplt.s
lld/test/ELF/gnu-ifunc-plt-i386.s
lld/test/ELF/gnu-ifunc-plt.s
lld/test/ELF/gnu-ifunc-shared.s
lld/test/ELF/gnu-ifunc.s
lld/test/ELF/got-i386.s
lld/test/ELF/got.s
lld/test/ELF/got32-i386.s
lld/test/ELF/got32x-i386.s
lld/test/ELF/hexagon-plt.s
lld/test/ELF/i386-feature-cet.s
lld/test/ELF/i386-gotpc.s
lld/test/ELF/i386-plt.s
lld/test/ELF/i386-relax-reloc.s
lld/test/ELF/i386-reloc-large-addend.s
lld/test/ELF/i386-reloc-range.s
lld/test/ELF/i386-retpoline-nopic-linkerscript.s
lld/test/ELF/i386-retpoline-nopic.s
lld/test/ELF/i386-retpoline-pic-linkerscript.s
lld/test/ELF/i386-retpoline-pic.s
lld/test/ELF/i386-tls-dynamic.s
lld/test/ELF/i386-tls-gdiele.s
lld/test/ELF/i386-tls-ie-shared.s
lld/test/ELF/i386-tls-le.s
lld/test/ELF/i386-tls-opt-iele-nopic.s
lld/test/ELF/i386-tls-opt.s
lld/test/ELF/linkerscript/excludefile.s
lld/test/ELF/linkerscript/non-absolute.s
lld/test/ELF/local-got-pie.s
lld/test/ELF/local-got-shared.s
lld/test/ELF/local-got.s
lld/test/ELF/lto/codemodel.ll
lld/test/ELF/lto/defsym.ll
lld/test/ELF/lto/linker-script-symbols-ipo.ll
lld/test/ELF/lto/weakodr-visibility.ll
lld/test/ELF/lto/wrap-2.ll
lld/test/ELF/merge.s
lld/test/ELF/mips-26-mask.s
lld/test/ELF/mips-26.s
lld/test/ELF/mips-64-disp.s
lld/test/ELF/mips-64-got.s
lld/test/ELF/mips-64-rels.s
lld/test/ELF/mips-call-hilo.s
lld/test/ELF/mips-call16.s
lld/test/ELF/mips-got-hilo.s
lld/test/ELF/mips-got16-relocatable.s
lld/test/ELF/mips-got16.s
lld/test/ELF/mips-gp-disp.s
lld/test/ELF/mips-gp-local.s
lld/test/ELF/mips-higher-highest.s
lld/test/ELF/mips-hilo-gp-disp.s
lld/test/ELF/mips-hilo-hi-only.s
lld/test/ELF/mips-hilo.s
lld/test/ELF/mips-jalr-non-functions.s
lld/test/ELF/mips-micro-cross-calls.s
lld/test/ELF/mips-micro-plt.s
lld/test/ELF/mips-micro-relocs.s
lld/test/ELF/mips-micro-thunks.s
lld/test/ELF/mips-micror6-relocs.s
lld/test/ELF/mips-n32-rels.s
lld/test/ELF/mips-npic-call-pic-os.s
lld/test/ELF/mips-npic-call-pic-script.s
lld/test/ELF/mips-npic-call-pic.s
lld/test/ELF/mips-pc-relocs.s
lld/test/ELF/mips-plt-n32.s
lld/test/ELF/mips-plt-n64.s
lld/test/ELF/mips-plt-r6.s
lld/test/ELF/mips-tls-64.s
lld/test/ELF/mips-tls-hilo.s
lld/test/ELF/mips-tls.s
lld/test/ELF/mips-xgot-order.s
lld/test/ELF/msp430.s
lld/test/ELF/non-abs-reloc.s
lld/test/ELF/non-alloc-link-order-gc.s
lld/test/ELF/ppc32-call-stub-nopic.s
lld/test/ELF/ppc32-call-stub-pic.s
lld/test/ELF/ppc32-canonical-plt.s
lld/test/ELF/ppc32-ifunc-nonpreemptible-nopic.s
lld/test/ELF/ppc32-ifunc-nonpreemptible-pic.s
lld/test/ELF/ppc32-local-branch.s
lld/test/ELF/ppc32-long-thunk.s
lld/test/ELF/ppc32-weak-undef-call.s
lld/test/ELF/ppc64-bsymbolic-toc-restore.s
lld/test/ELF/ppc64-call-reach.s
lld/test/ELF/ppc64-dtprel.s
lld/test/ELF/ppc64-func-entry-points.s
lld/test/ELF/ppc64-ifunc.s
lld/test/ELF/ppc64-local-dynamic.s
lld/test/ELF/ppc64-local-exec-tls.s
lld/test/ELF/ppc64-long-branch-init.s
lld/test/ELF/ppc64-long-branch-pi.s
lld/test/ELF/ppc64-long-branch.s
lld/test/ELF/ppc64-plt-stub.s
lld/test/ELF/ppc64-tls-ie.s
lld/test/ELF/ppc64-tls-ld-le.s
lld/test/ELF/ppc64-toc-addis-nop.s
lld/test/ELF/ppc64-toc-rel.s
lld/test/ELF/ppc64-toc-restore-recursive-call.s
lld/test/ELF/ppc64-toc-restore.s
lld/test/ELF/pr34660.s
lld/test/ELF/pre_init_fini_array.s
lld/test/ELF/pre_init_fini_array_missing.s
lld/test/ELF/relocatable-symbols.s
lld/test/ELF/relocatable.s
lld/test/ELF/relocation-absolute.s
lld/test/ELF/relocation-b-aarch64.test
lld/test/ELF/relocation-copy-i686.s
lld/test/ELF/relocation-copy.s
lld/test/ELF/relocation-i686.s
lld/test/ELF/relocation.s
lld/test/ELF/riscv-ifunc-nonpreemptible.s
lld/test/ELF/riscv-plt.s
lld/test/ELF/riscv-undefined-weak.s
lld/test/ELF/startstop-gccollect.s
lld/test/ELF/startstop.s
lld/test/ELF/tls-opt.s
lld/test/ELF/tls.s
lld/test/ELF/weak-undef-got-pie.s
lld/test/ELF/wrap-no-real.s
lld/test/ELF/wrap-plt.s
lld/test/ELF/wrap.s
lld/test/ELF/x86-64-feature-cet.s
lld/test/ELF/x86-64-gotpc-relax-nopic.s
lld/test/ELF/x86-64-gotpc-relax-und-dso.s
lld/test/ELF/x86-64-gotpc-relax.s
lld/test/ELF/x86-64-plt.s
lld/test/ELF/x86-64-reloc-gotpc64.s
lld/test/ELF/x86-64-reloc-size-shared.s
lld/test/ELF/x86-64-reloc-size.s
lld/test/ELF/x86-64-retpoline-linkerscript.s
lld/test/ELF/x86-64-retpoline-znow-linkerscript.s
lld/test/ELF/x86-64-retpoline-znow-static-iplt.s
lld/test/ELF/x86-64-retpoline-znow.s
lld/test/ELF/x86-64-retpoline.s
lld/test/ELF/x86-64-split-stack-prologue-adjust-shared.s
lld/test/ELF/x86-64-split-stack-prologue-adjust-success.s
lld/test/ELF/x86-64-tls-dynamic.s
lld/test/ELF/x86-64-tls-gd-got.s
lld/test/ELF/x86-64-tls-gdie.s
lld/test/ELF/x86-64-tls-ie-opt-local.s
lld/test/ELF/x86-64-tls-ie.s
lld/test/ELF/x86-64-tls-opt-noplt.s
llvm/test/CodeGen/AArch64/arm64-simplest-elf.ll
llvm/test/CodeGen/AArch64/callbr-asm-obj-file.ll
llvm/test/CodeGen/AArch64/inlineasm-ldr-pseudo.ll
llvm/test/CodeGen/AArch64/space.ll
llvm/test/CodeGen/AMDGPU/nop-data.ll
llvm/test/CodeGen/AMDGPU/s_code_end.ll
llvm/test/CodeGen/ARM/Windows/trivial-gnu-object.ll
llvm/test/CodeGen/ARM/inlineasm-ldr-pseudo.ll
llvm/test/CodeGen/ARM/struct_byval_arm_t1_t2.ll
llvm/test/CodeGen/ARM/thumb1-varalloc.ll
llvm/test/CodeGen/ARM/wrong-t2stmia-size-opt.ll
llvm/test/CodeGen/BPF/objdump_cond_op.ll
llvm/test/CodeGen/BPF/objdump_cond_op_2.ll
llvm/test/CodeGen/BPF/objdump_two_funcs.ll
llvm/test/CodeGen/Hexagon/S3_2op.ll
llvm/test/CodeGen/Hexagon/vrcmpys.ll
llvm/test/CodeGen/Mips/compactbranches/no-beqzc-bnezc.ll
llvm/test/CodeGen/Mips/dsp-spill-reload.ll
llvm/test/CodeGen/Mips/micromips-b-range.ll
llvm/test/CodeGen/Mips/micromips-sw.ll
llvm/test/CodeGen/Mips/unaligned-memops-mapping.mir
llvm/test/CodeGen/PowerPC/aix-indirect-call.ll
llvm/test/CodeGen/PowerPC/aix-return55.ll
llvm/test/CodeGen/PowerPC/aix-user-defined-memcpy.ll
llvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-const.ll
llvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-str.ll
llvm/test/CodeGen/PowerPC/aix-xcoff-reloc.ll
llvm/test/CodeGen/PowerPC/aix-xcoff-rodata.ll
llvm/test/CodeGen/PowerPC/aix-xcoff-textdisassembly.ll
llvm/test/CodeGen/RISCV/compress-float.ll
llvm/test/CodeGen/RISCV/compress-inline-asm.ll
llvm/test/CodeGen/RISCV/compress.ll
llvm/test/CodeGen/RISCV/option-norelax.ll
llvm/test/CodeGen/RISCV/option-norvc.ll
llvm/test/CodeGen/RISCV/option-relax.ll
llvm/test/CodeGen/RISCV/option-rvc.ll
llvm/test/CodeGen/Thumb/large-stack.ll
llvm/test/CodeGen/X86/2014-08-29-CompactUnwind.ll
llvm/test/CodeGen/X86/callbr-asm-obj-file.ll
llvm/test/CodeGen/X86/patchable-prologue.ll
llvm/test/DebugInfo/RISCV/dwarf-riscv-relocs.ll
llvm/test/LTO/Resolution/X86/asm-output.ll
llvm/test/LTO/Resolution/X86/not-prevailing-alias.ll
llvm/test/LTO/Resolution/X86/not-prevailing-variables.ll
llvm/test/LTO/Resolution/X86/not-prevailing.ll
llvm/test/LTO/X86/codemodel-1.ll
llvm/test/LTO/X86/codemodel-2.ll
llvm/test/LTO/X86/llvm-lto-output.ll
llvm/test/MC/AArch64/label-arithmetic-elf.s
llvm/test/MC/AMDGPU/labels-branch-gfx9.s
llvm/test/MC/AMDGPU/labels-branch.s
llvm/test/MC/ARM/arm-macho-calls.s
llvm/test/MC/ARM/coff-relocations.s
llvm/test/MC/ARM/elf-movt.s
llvm/test/MC/ARM/sub-expr-imm.s
llvm/test/MC/AVR/relocations-abs.s
llvm/test/MC/BPF/insn-unit.s
llvm/test/MC/COFF/cv-inline-linetable-unlikely.s
llvm/test/MC/COFF/cv-inline-linetable.s
llvm/test/MC/COFF/cv-loc-unreachable-2.s
llvm/test/MC/COFF/cv-loc-unreachable.s
llvm/test/MC/ELF/relax-arith.s
llvm/test/MC/ELF/relax-arith2.s
llvm/test/MC/ELF/relax-arith3.s
llvm/test/MC/ELF/relax-arith4.s
llvm/test/MC/Hexagon/missing_label.s
llvm/test/MC/Mips/cpsetup.s
llvm/test/MC/Mips/higher-highest-addressing.s
llvm/test/MC/Mips/instr-analysis.s
llvm/test/MC/Mips/micromips-jump-pc-region.s
llvm/test/MC/Mips/mips-jump-pc-region.s
llvm/test/MC/Mips/nacl-mask.s
llvm/test/MC/Mips/set-defined-symbol.s
llvm/test/MC/Mips/sext_64_32.ll
llvm/test/MC/PowerPC/ppc64-dq-expr.s
llvm/test/MC/PowerPC/ppc64-prefix-align.s
llvm/test/MC/RISCV/option-mix.s
llvm/test/MC/Sparc/sparc-tls-relocations.s
llvm/test/MC/SystemZ/directive-insn.s
llvm/test/MC/WebAssembly/objdump.s
llvm/test/MC/X86/AlignedBundling/labeloffset.s
llvm/test/MC/X86/AlignedBundling/nesting.s
llvm/test/MC/X86/align-branch-32-1a.s
llvm/test/MC/X86/align-branch-64-1a.s
llvm/test/MC/X86/align-branch-64-1b.s
llvm/test/MC/X86/align-branch-64-1c.s
llvm/test/MC/X86/align-branch-64-1d.s
llvm/test/MC/X86/align-branch-64-2a.s
llvm/test/MC/X86/align-branch-64-2b.s
llvm/test/MC/X86/align-branch-64-2c.s
llvm/test/MC/X86/align-branch-64-3a.s
llvm/test/MC/X86/align-branch-64-4a.s
llvm/test/MC/X86/align-branch-64-5a.s
llvm/test/MC/X86/align-branch-64-6a.s
llvm/test/MC/X86/align-branch-64-7a.s
llvm/test/MC/X86/align-branch-64-negative.s
llvm/test/MC/X86/align-branch-64.s
llvm/test/MC/X86/align-via-relaxation.s
llvm/test/MC/X86/code16-32-64.s
llvm/test/MC/X86/disassemble-zeroes.s
llvm/test/Object/AMDGPU/objdump.s
llvm/test/Object/Mips/feature.test
llvm/test/Object/Mips/objdump-micro-mips.test
llvm/test/Object/X86/objdump-disassembly-inline-relocations.test
llvm/test/Object/X86/objdump-label.test
llvm/test/tools/llvm-objdump/AArch64/elf-aarch64-mapping-symbols.test
llvm/test/tools/llvm-objdump/AArch64/macho-zerofill.s
llvm/test/tools/llvm-objdump/AArch64/plt.test
llvm/test/tools/llvm-objdump/AMDGPU/source-lines.ll
llvm/test/tools/llvm-objdump/ARM/unknown-instr.test
llvm/test/tools/llvm-objdump/Hexagon/source-interleave-hexagon.ll
llvm/test/tools/llvm-objdump/PowerPC/branch-offset.s
llvm/test/tools/llvm-objdump/X86/adjust-vma.test
llvm/test/tools/llvm-objdump/X86/coff-disassemble-export.test
llvm/test/tools/llvm-objdump/X86/demangle.s
llvm/test/tools/llvm-objdump/X86/disassemble-functions-mangling.test
llvm/test/tools/llvm-objdump/X86/disassemble-functions.test
llvm/test/tools/llvm-objdump/X86/disassemble-implied-by-disassemble-functions.test
llvm/test/tools/llvm-objdump/X86/disassemble-invalid-byte-sequences.test
llvm/test/tools/llvm-objdump/X86/disassemble-no-symbol-at-section-start.test
llvm/test/tools/llvm-objdump/X86/disassemble-section-name.s
llvm/test/tools/llvm-objdump/X86/disassemble-text.test
llvm/test/tools/llvm-objdump/X86/disassemble-zeroes-relocations.test
llvm/test/tools/llvm-objdump/X86/elf-disassemble-bss.test
llvm/test/tools/llvm-objdump/X86/elf-disassemble-dynamic-symbols.test
llvm/test/tools/llvm-objdump/X86/elf-disassemble-no-symtab.test
llvm/test/tools/llvm-objdump/X86/elf-disassemble-symbol-labels-exec.test
llvm/test/tools/llvm-objdump/X86/elf-disassemble-symbol-labels-rel.test
llvm/test/tools/llvm-objdump/X86/elf-disassemble-symbol-references.yaml
llvm/test/tools/llvm-objdump/X86/elf-disassemble.test
llvm/test/tools/llvm-objdump/X86/function-sections-line-numbers.s
llvm/test/tools/llvm-objdump/X86/out-of-section-sym.test
llvm/test/tools/llvm-objdump/X86/plt.test
llvm/test/tools/llvm-objdump/X86/print-symbol-addr.s
llvm/test/tools/llvm-objdump/X86/section-filter-relocs.test
llvm/test/tools/llvm-objdump/X86/source-interleave-function-from-debug.test
llvm/test/tools/llvm-objdump/X86/source-interleave-invalid-source.test
llvm/test/tools/llvm-objdump/X86/source-interleave-missing-source.test
llvm/test/tools/llvm-objdump/X86/source-interleave-no-debug-info.test
llvm/test/tools/llvm-objdump/X86/source-interleave-relative-paths.test
llvm/test/tools/llvm-objdump/X86/source-interleave-same-line-different-file.test
llvm/test/tools/llvm-objdump/X86/source-interleave-x86_64.test
llvm/test/tools/llvm-objdump/X86/start-stop-address-relocatable-object.test
llvm/test/tools/llvm-objdump/X86/start-stop-address.test
llvm/test/tools/llvm-objdump/embedded-source.test
llvm/test/tools/llvm-objdump/xcoff-disassemble-all.test
llvm/tools/llvm-objdump/llvm-objdump.cpp
Removed:
################################################################################
diff --git a/lld/test/COFF/arm64-thunks.s b/lld/test/COFF/arm64-thunks.s
index eb71241d4199..2638f7bacb19 100644
--- a/lld/test/COFF/arm64-thunks.s
+++ b/lld/test/COFF/arm64-thunks.s
@@ -26,7 +26,7 @@ func1:
func2:
ret
-// DISASM: 0000000140001000 .text:
+// DISASM: 0000000140001000 <.text>:
// DISASM: 140001000: 40 00 00 36 tbz w0, #0, #8 <.text+0x8>
// DISASM: 140001004: c0 03 5f d6 ret
// DISASM: 140001008: 50 00 00 90 adrp x16, #32768
diff --git a/lld/test/COFF/armnt-branch24t.test b/lld/test/COFF/armnt-branch24t.test
index c98df6e0dc9a..b049cdae4fd6 100644
--- a/lld/test/COFF/armnt-branch24t.test
+++ b/lld/test/COFF/armnt-branch24t.test
@@ -14,7 +14,7 @@
# AFTER: Disassembly of section .text:
# AFTER-EMPTY:
-# AFTER: .text:
+# AFTER: <.text>:
# AFTER: 1000: 70 47 bx lr
# AFTER: 1002: 00 bf nop
# AFTER: 1004: 20 20 movs r0, #32
diff --git a/lld/test/COFF/autoimport-refptr.s b/lld/test/COFF/autoimport-refptr.s
index f5616512434b..20717cd258ac 100644
--- a/lld/test/COFF/autoimport-refptr.s
+++ b/lld/test/COFF/autoimport-refptr.s
@@ -20,7 +20,7 @@
# DISASM: Disassembly of section .text:
# DISASM-EMPTY:
-# DISASM: .text:
+# DISASM: <.text>:
# Relative offset at 0x1002 pointing at the IAT at 0x2060
# DISASM: 140001000: 48 8b 05 59 10 00 00 movq 4185(%rip), %rax
# DISASM: 140001007: 8b 00 movl (%rax), %eax
diff --git a/lld/test/COFF/autoimport-x86.s b/lld/test/COFF/autoimport-x86.s
index 9e0ae1ead189..8e4301d8f381 100644
--- a/lld/test/COFF/autoimport-x86.s
+++ b/lld/test/COFF/autoimport-x86.s
@@ -21,7 +21,7 @@
# DISASM: Disassembly of section .text:
# DISASM-EMPTY:
-# DISASM: main:
+# DISASM: <main>:
# Relative offset at 0x1002 pointing at the IAT at 0x2080.
# DISASM: 140001000: 8b 05 7a 10 00 00 movl 4218(%rip), %eax
# DISASM: 140001006: c3 retq
diff --git a/lld/test/COFF/imports.test b/lld/test/COFF/imports.test
index 7fc66823a6c5..a3dbb86ec96c 100644
--- a/lld/test/COFF/imports.test
+++ b/lld/test/COFF/imports.test
@@ -13,7 +13,7 @@
TEXT: Disassembly of section .text:
TEXT-EMPTY:
-TEXT-NEXT: .text:
+TEXT-NEXT: <.text>:
TEXT-NEXT: subq $40, %rsp
TEXT-NEXT: movq $0, %rcx
TEXT-NEXT: leaq 8180(%rip), %rdx
diff --git a/lld/test/COFF/lto-comdat.ll b/lld/test/COFF/lto-comdat.ll
index cf5a137ff508..ca7fa2554651 100644
--- a/lld/test/COFF/lto-comdat.ll
+++ b/lld/test/COFF/lto-comdat.ll
@@ -43,14 +43,14 @@
; HEADERS-11: AddressOfEntryPoint: 0x1000
; TEXT-11: Disassembly of section .text:
; TEXT-11-EMPTY:
-; TEXT-11-NEXT: .text:
+; TEXT-11-NEXT: <.text>:
; TEXT-11-NEXT: xorl %eax, %eax
; TEXT-11-NEXT: retq
; HEADERS-01: AddressOfEntryPoint: 0x1000
; TEXT-01: Disassembly of section .text:
; TEXT-01-EMPTY:
-; TEXT-01-NEXT: .text:
+; TEXT-01-NEXT: <.text>:
; TEXT-01-NEXT: subq $40, %rsp
; TEXT-01-NEXT: callq 23
; TEXT-01-NEXT: callq 18
@@ -68,7 +68,7 @@
; HEADERS-10: AddressOfEntryPoint: 0x1020
; TEXT-10: Disassembly of section .text:
; TEXT-10-EMPTY:
-; TEXT-10-NEXT: .text:
+; TEXT-10-NEXT: <.text>:
; TEXT-10-NEXT: subq $40, %rsp
; TEXT-10-NEXT: callq 55
; TEXT-10-NEXT: nop
diff --git a/lld/test/COFF/lto.ll b/lld/test/COFF/lto.ll
index 7c61f1cf5bfc..5a8b621303bf 100644
--- a/lld/test/COFF/lto.ll
+++ b/lld/test/COFF/lto.ll
@@ -35,7 +35,7 @@
; HEADERS-11: AddressOfEntryPoint: 0x1000
; TEXT-11: Disassembly of section .text:
; TEXT-11-EMPTY:
-; TEXT-11-NEXT: .text:
+; TEXT-11-NEXT: <.text>:
; TEXT-11-NEXT: xorl %eax, %eax
; TEXT-11-NEXT: retq
; TEXT-11-NEXT: int3
@@ -57,7 +57,7 @@
; HEADERS-01: AddressOfEntryPoint: 0x1000
; TEXT-01: Disassembly of section .text:
; TEXT-01-EMPTY:
-; TEXT-01-NEXT: .text:
+; TEXT-01-NEXT: <.text>:
; TEXT-01-NEXT: subq $40, %rsp
; TEXT-01-NEXT: callq 23
; TEXT-01-NEXT: xorl %eax, %eax
@@ -84,7 +84,7 @@
; HEADERS-10: AddressOfEntryPoint: 0x1020
; TEXT-10: Disassembly of section .text:
; TEXT-10-EMPTY:
-; TEXT-10-NEXT: .text:
+; TEXT-10-NEXT: <.text>:
; TEXT-10-NEXT: retq
; TEXT-10-NEXT: nop
; TEXT-10-NEXT: nop
diff --git a/lld/test/COFF/mixed-resource-obj.yaml b/lld/test/COFF/mixed-resource-obj.yaml
index 8e122b504f01..74f3bb2a3500 100644
--- a/lld/test/COFF/mixed-resource-obj.yaml
+++ b/lld/test/COFF/mixed-resource-obj.yaml
@@ -13,8 +13,7 @@
# CHECK-RESOURCES: Resources [
# CHECK-RESOURCES-NEXT: Total Number of Resources: 2
-# CHECK-DISASM: Disassembly of section .text:
-# CHECK-DISASM: .text:
+# CHECK-DISASM: <.text>:
# CHECK-DISASM-NEXT: movl $42, %eax
# CHECK-DISASM-NEXT: retq
diff --git a/lld/test/ELF/aarch64-call26-thunk.s b/lld/test/ELF/aarch64-call26-thunk.s
index 043b5fc1cf9c..d41a68dd5e21 100644
--- a/lld/test/ELF/aarch64-call26-thunk.s
+++ b/lld/test/ELF/aarch64-call26-thunk.s
@@ -11,12 +11,12 @@ _start:
// CHECK: Disassembly of section .text:
// CHECK-EMPTY:
-// CHECK-NEXT: _start:
+// CHECK-NEXT: <_start>:
// CHECK-NEXT: 210120: bl #4
-// CHECK: __AArch64AbsLongThunk_big:
+// CHECK: <__AArch64AbsLongThunk_big>:
// CHECK-NEXT: 210124: ldr x16, #8
// CHECK-NEXT: 210128: br x16
-// CHECK: $d:
+// CHECK: <$d>:
// CHECK-NEXT: 21012c: 00 00 00 00 .word 0x00000000
// CHECK-NEXT: 210130: 10 00 00 00 .word 0x00000010
diff --git a/lld/test/ELF/aarch64-condb-reloc.s b/lld/test/ELF/aarch64-condb-reloc.s
index 50e0c8a35597..c0ca56360b5e 100644
--- a/lld/test/ELF/aarch64-condb-reloc.s
+++ b/lld/test/ELF/aarch64-condb-reloc.s
@@ -12,19 +12,19 @@
# 0x1102c - 16 = 0x1101c
# CHECK: Disassembly of section .text:
# CHECK-EMPTY:
-# CHECK-NEXT: _foo:
+# CHECK-NEXT: <_foo>:
# CHECK-NEXT: 210120: nop
# CHECK-NEXT: 210124: nop
# CHECK-NEXT: 210128: nop
# CHECK-NEXT: 21012c: nop
-# CHECK: _bar:
+# CHECK: <_bar>:
# CHECK-NEXT: 210130: nop
# CHECK-NEXT: 210134: nop
# CHECK-NEXT: 210138: nop
-# CHECK: _dah:
+# CHECK: <_dah>:
# CHECK-NEXT: 21013c: nop
# CHECK-NEXT: 210140: nop
-# CHECK: _start:
+# CHECK: <_start>:
# CHECK-NEXT: 210144: b.eq #-36 <_foo>
# CHECK-NEXT: 210148: b.eq #-24 <_bar>
# CHECK-NEXT: 21014c: b.eq #-16 <_dah>
@@ -55,26 +55,26 @@
#DSO: Disassembly of section .text:
#DSO-EMPTY:
-#DSO-NEXT: _foo:
+#DSO-NEXT: <_foo>:
#DSO-NEXT: 10338: nop
#DSO-NEXT: 1033c: nop
#DSO-NEXT: 10340: nop
#DSO-NEXT: 10344: nop
-#DSO: _bar:
+#DSO: <_bar>:
#DSO-NEXT: 10348: nop
#DSO-NEXT: 1034c: nop
#DSO-NEXT: 10350: nop
-#DSO: _dah:
+#DSO: <_dah>:
#DSO-NEXT: 10354: nop
#DSO-NEXT: 10358: nop
-#DSO: _start:
+#DSO: <_start>:
#DSO-NEXT: 1035c: b.eq #52 <_foo at plt>
#DSO-NEXT: 10360: b.eq #64 <_bar at plt>
#DSO-NEXT: 10364: b.eq #76 <_dah at plt>
#DSO-EMPTY:
#DSO-NEXT: Disassembly of section .plt:
#DSO-EMPTY:
-#DSO-NEXT: .plt:
+#DSO-NEXT: <.plt>:
#DSO-NEXT: 10370: stp x16, x30, [sp, #-16]!
#DSO-NEXT: 10374: adrp x16, #131072
#DSO-NEXT: 10378: ldr x17, [x16, #1152]
@@ -84,19 +84,19 @@
#DSO-NEXT: 10388: nop
#DSO-NEXT: 1038c: nop
#DSO-EMPTY:
-#DSO-NEXT: _foo at plt:
+#DSO-NEXT: <_foo at plt>:
#DSO-NEXT: 10390: adrp x16, #131072
#DSO-NEXT: 10394: ldr x17, [x16, #1160]
#DSO-NEXT: 10398: add x16, x16, #1160
#DSO-NEXT: 1039c: br x17
#DSO-EMPTY:
-#DSO-NEXT: _bar at plt:
+#DSO-NEXT: <_bar at plt>:
#DSO-NEXT: 103a0: adrp x16, #131072
#DSO-NEXT: 103a4: ldr x17, [x16, #1168]
#DSO-NEXT: 103a8: add x16, x16, #1168
#DSO-NEXT: 103ac: br x17
#DSO-EMPTY:
-#DSO-NEXT: _dah at plt:
+#DSO-NEXT: <_dah at plt>:
#DSO-NEXT: 103b0: adrp x16, #131072
#DSO-NEXT: 103b4: ldr x17, [x16, #1176]
#DSO-NEXT: 103b8: add x16, x16, #1176
diff --git a/lld/test/ELF/aarch64-copy.s b/lld/test/ELF/aarch64-copy.s
index 4b47c94babf0..f3ef6b1de0fc 100644
--- a/lld/test/ELF/aarch64-copy.s
+++ b/lld/test/ELF/aarch64-copy.s
@@ -63,7 +63,7 @@ _start:
// CODE: Disassembly of section .text:
// CODE-EMPTY:
-// CODE-NEXT: _start:
+// CODE-NEXT: <_start>:
// S + A - P = 0x2303f0 + 0 - 0x21031c = 131284
// CODE-NEXT: 21031c: adr x1, #131284
// Page(S + A) - Page(P) = Page(0x230400) - Page(0x210320) = 131072
diff --git a/lld/test/ELF/aarch64-cortex-a53-843419-address.s b/lld/test/ELF/aarch64-cortex-a53-843419-address.s
index 6c1f04d49fa1..ebbaf01642e0 100644
--- a/lld/test/ELF/aarch64-cortex-a53-843419-address.s
+++ b/lld/test/ELF/aarch64-cortex-a53-843419-address.s
@@ -37,7 +37,7 @@
// - We can ignore erratum sequences in multiple literal data ranges.
// CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at FF8 in unpatched output.
-// CHECK: t3_ff8_ldr:
+// CHECK: <t3_ff8_ldr>:
// CHECK-NEXT: ff8: 20 00 00 d0 adrp x0, #24576
// CHECK-NEXT: ffc: 21 00 40 f9 ldr x1, [x1]
// CHECK-NEXT: 1000: f9 0f 00 14 b #16356
@@ -59,7 +59,7 @@ t3_ff8_ldr:
.local $x.999
$x.999:
// CHECK-PRINT-NEXT: detected cortex-a53-843419 erratum sequence starting at 1FFC in unpatched output.
-// CHECK: t3_ffc_ldrsimd:
+// CHECK: <t3_ffc_ldrsimd>:
// CHECK-NEXT: 1ffc: 20 00 00 b0 adrp x0, #20480
// CHECK-NEXT: 2000: 21 00 40 bd ldr s1, [x1]
// CHECK-NEXT: 2004: fa 0b 00 14 b #12264
@@ -96,7 +96,7 @@ t3_ff8_ldralldata:
// Check that we can recognise the erratum sequence post literal data.
// CHECK-PRINT-NEXT: detected cortex-a53-843419 erratum sequence starting at 3FF8 in unpatched output.
-// CHECK: t3_ffc_ldr:
+// CHECK: <t3_ffc_ldr>:
// CHECK-NEXT: 3ff8: 00 00 00 f0 adrp x0, #12288
// CHECK-NEXT: 3ffc: 21 00 40 f9 ldr x1, [x1]
// CHECK-NEXT: 4000: fd 03 00 14 b #4084
@@ -110,13 +110,13 @@ t3_ff8_ldralldata:
ldr x0, [x0, :got_lo12:dat]
ret
-// CHECK: __CortexA53843419_1000:
+// CHECK: <__CortexA53843419_1000>:
// CHECK-NEXT: 4fe4: 00 0c 40 f9 ldr x0, [x0, #24]
// CHECK-NEXT: 4fe8: 07 f0 ff 17 b #-16356
-// CHECK: __CortexA53843419_2004:
+// CHECK: <__CortexA53843419_2004>:
// CHECK-NEXT: 4fec: 02 0c 40 f9 ldr x2, [x0, #24]
// CHECK-NEXT: 4ff0: 06 f4 ff 17 b #-12264
-// CHECK: __CortexA53843419_4000:
+// CHECK: <__CortexA53843419_4000>:
// CHECK-NEXT: 4ff4: 00 0c 40 f9 ldr x0, [x0, #24]
// CHECK-NEXT: 4ff8: 03 fc ff 17 b #-4084
@@ -128,7 +128,7 @@ t3_ff8_ldralldata:
// InputSectionDescription.
// CHECK-PRINT-NEXT: detected cortex-a53-843419 erratum sequence starting at 4FFC in unpatched output
-// CHECK: t3_ffc_str:
+// CHECK: <t3_ffc_str>:
// CHECK-NEXT: 4ffc: 00 00 00 d0 adrp x0, #8192
// CHECK-NEXT: 5000: 21 00 00 f9 str x1, [x1]
// CHECK-NEXT: 5004: fb 03 00 14 b #4076
@@ -144,7 +144,7 @@ t3_ffc_str:
ret
.space 4096 - 28
-// CHECK: __CortexA53843419_5004:
+// CHECK: <__CortexA53843419_5004>:
// CHECK-NEXT: 5ff0: 00 0c 40 f9 ldr x0, [x0, #24]
// CHECK-NEXT: 5ff4: 05 fc ff 17 b #-4076
@@ -153,7 +153,7 @@ t3_ffc_str:
// InputSectionDescription.
//CHECK-PRINT-NEXT: detected cortex-a53-843419 erratum sequence starting at 5FF8 in unpatched output
-// CHECK: t3_ff8_str:
+// CHECK: <t3_ff8_str>:
// CHECK-NEXT: 5ff8: 00 00 00 b0 adrp x0, #4096
// CHECK-NEXT: 5ffc: 21 00 00 f9 str x1, [x1]
// CHECK-NEXT: 6000: 03 00 00 14 b #12
@@ -172,7 +172,7 @@ t3_ff8_str:
_start:
ret
-// CHECK: __CortexA53843419_6000:
+// CHECK: <__CortexA53843419_6000>:
// CHECK-NEXT: 600c: 00 0c 40 f9 ldr x0, [x0, #24]
// CHECK-NEXT: 6010: fd ff ff 17 b #-12
diff --git a/lld/test/ELF/aarch64-cortex-a53-843419-large.s b/lld/test/ELF/aarch64-cortex-a53-843419-large.s
index a39b2103115d..8d13e36a391c 100644
--- a/lld/test/ELF/aarch64-cortex-a53-843419-large.s
+++ b/lld/test/ELF/aarch64-cortex-a53-843419-large.s
@@ -12,12 +12,12 @@
// the maximum branch range. Both range extension thunks and patches are
// required.
-// CHECK1: __AArch64AbsLongThunk_need_thunk_after_patch:
+// CHECK1: <__AArch64AbsLongThunk_need_thunk_after_patch>:
// CHECK1-NEXT: 210000: 50 00 00 58 ldr x16, #8
// CHECK1-NEXT: 210004: 00 02 1f d6 br x16
-// CHECK1: $d:
+// CHECK1: <$d>:
// CHECK1-NEXT: 210008: 0c 10 21 08 .word 0x0821100c
-
+
.section .text.01, "ax", %progbits
.balign 4096
.globl _start
@@ -28,7 +28,7 @@ _start:
.section .text.02, "ax", %progbits
.space 4096 - 12
-// CHECK2: _start:
+// CHECK2: <_start>:
// CHECK2-NEXT: 211000: 00 fc ff 97 bl #-4096
// Expect patch on pass 1
@@ -41,7 +41,7 @@ t3_ff8_ldr:
ldr x0, [x0, :got_lo12:dat]
ret
-// CHECK3: t3_ff8_ldr:
+// CHECK3: <t3_ff8_ldr>:
// CHECK3-NEXT: 211ff8: e0 00 04 f0 adrp x0, #134344704
// CHECK3-NEXT: 211ffc: 21 00 40 f9 ldr x1, [x1]
// CHECK3-NEXT: 212000: 02 08 80 15 b #100671496
@@ -62,7 +62,7 @@ t3_ff8_str:
str x0, [x0, :got_lo12:dat]
ret
-// CHECK4: t3_ff8_str:
+// CHECK4: <t3_ff8_str>:
// CHECK4-NEXT: 4213ff8: e0 00 02 b0 adrp x0, #67227648
// CHECK4-NEXT: 4213ffc: 21 00 40 f9 ldr x1, [x1]
// CHECK4-NEXT: 4214000: 04 00 80 14 b #33554448
@@ -71,10 +71,10 @@ t3_ff8_str:
.section .text.06, "ax", %progbits
.space 32 * 1024 * 1024
-// CHECK5: __CortexA53843419_211000:
+// CHECK5: <__CortexA53843419_211000>:
// CHECK5-NEXT: 6214008: 00 00 40 f9 ldr x0, [x0]
// CHECK5-NEXT: 621400c: fe f7 7f 16 b #-100671496
-// CHECK5: __CortexA53843419_4213000:
+// CHECK5: <__CortexA53843419_4213000>:
// CHECK5-NEXT: 6214010: 00 00 00 f9 str x0, [x0]
// CHECK5-NEXT: 6214014: fc ff 7f 17 b #-33554448
@@ -87,7 +87,7 @@ t3_ff8_str:
need_thunk_after_patch:
ret
-// CHECK6: need_thunk_after_patch:
+// CHECK6: <need_thunk_after_patch>:
// CHECK6-NEXT: 821100c: c0 03 5f d6 ret
// Will need a patch on pass 2
@@ -101,12 +101,12 @@ t3_ffc_ldr:
ldr x0, [x0, :got_lo12:dat]
ret
-// CHECK7: t3_ffc_ldr:
+// CHECK7: <t3_ffc_ldr>:
// CHECK7-NEXT: 8211ffc: e0 00 00 f0 adrp x0, #126976
// CHECK7-NEXT: 8212000: 21 00 40 f9 ldr x1, [x1]
// CHECK7-NEXT: 8212004: 02 00 00 14 b #8
// CHECK7-NEXT: 8212008: c0 03 5f d6 ret
-// CHECK7: __CortexA53843419_8212004:
+// CHECK7: <__CortexA53843419_8212004>:
// CHECK7-NEXT: 821200c: 00 00 40 f9 ldr x0, [x0]
// CHECK7-NEXT: 8212010: fe ff ff 17 b #-8
diff --git a/lld/test/ELF/aarch64-cortex-a53-843419-large2.s b/lld/test/ELF/aarch64-cortex-a53-843419-large2.s
index fdb8a445e004..db0d5f23378b 100644
--- a/lld/test/ELF/aarch64-cortex-a53-843419-large2.s
+++ b/lld/test/ELF/aarch64-cortex-a53-843419-large2.s
@@ -8,7 +8,7 @@
.space 4096 - 8
adrp x0, thunk
ldr x1, [x1, #0]
-// CHECK: thunk:
+// CHECK: <thunk>:
// CHECK-NEXT: b #67108872 <__CortexA53843419_8001000>
thunk:
ldr x0, [x0, :got_lo12:thunk]
diff --git a/lld/test/ELF/aarch64-cortex-a53-843419-recognize.s b/lld/test/ELF/aarch64-cortex-a53-843419-recognize.s
index 25e864f8e607..0933b1aac16e 100644
--- a/lld/test/ELF/aarch64-cortex-a53-843419-recognize.s
+++ b/lld/test/ELF/aarch64-cortex-a53-843419-recognize.s
@@ -29,13 +29,13 @@
// - Load or store for instruction 4.
// CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 211FF8 in unpatched output.
-// CHECK: t3_ff8_ldr:
+// CHECK: <t3_ff8_ldr>:
// CHECK-NEXT: 211ff8: 60 02 00 f0 adrp x0, #323584
// CHECK-NEXT: 211ffc: 21 00 40 f9 ldr x1, [x1]
// CHECK-FIX: 212000: 03 c8 00 14 b #204812
// CHECK-NOFIX: 212000: 00 00 40 f9 ldr x0, [x0]
// CHECK-NEXT: 212004: c0 03 5f d6 ret
-// CHECK-RELOCATABLE: t3_ff8_ldr:
+// CHECK-RELOCATABLE: <t3_ff8_ldr>:
// CHECK-RELOCATABLE-NEXT: ff8: 00 00 00 90 adrp x0, #0
// CHECK-RELOCATABLE-NEXT: ffc: 21 00 40 f9 ldr x1, [x1]
// CHECK-RELOCATABLE-NEXT: 1000: 00 00 40 f9 ldr x0, [x0]
@@ -53,7 +53,7 @@ t3_ff8_ldr:
ret
// CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 213FF8 in unpatched output.
-// CHECK: t3_ff8_ldrsimd:
+// CHECK: <t3_ff8_ldrsimd>:
// CHECK-NEXT: 213ff8: 60 02 00 b0 adrp x0, #315392
// CHECK-NEXT: 213ffc: 21 00 40 bd ldr s1, [x1]
// CHECK-FIX: 214000: 05 c0 00 14 b #196628
@@ -71,7 +71,7 @@ t3_ff8_ldrsimd:
ret
// CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 215FFC in unpatched output.
-// CHECK: t3_ffc_ldrpost:
+// CHECK: <t3_ffc_ldrpost>:
// CHECK-NEXT: 215ffc: 40 02 00 f0 adrp x0, #307200
// CHECK-NEXT: 216000: 21 84 40 bc ldr s1, [x1], #8
// CHECK-FIX: 216004: 06 b8 00 14 b #188440
@@ -89,7 +89,7 @@ t3_ffc_ldrpost:
ret
// CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 217FF8 in unpatched output.
-// CHECK: t3_ff8_strpre:
+// CHECK: <t3_ff8_strpre>:
// CHECK-NEXT: 217ff8: 40 02 00 b0 adrp x0, #299008
// CHECK-NEXT: 217ffc: 21 8c 00 bc str s1, [x1, #8]!
// CHECK-FIX: 218000: 09 b0 00 14 b #180260
@@ -107,7 +107,7 @@ t3_ff8_strpre:
ret
// CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 219FFC in unpatched output.
-// CHECK: t3_ffc_str:
+// CHECK: <t3_ffc_str>:
// CHECK-NEXT: 219ffc: 3c 02 00 f0 adrp x28, #290816
// CHECK-NEXT: 21a000: 42 00 00 f9 str x2, [x2]
// CHECK-FIX: 21a004: 0a a8 00 14 b #172072
@@ -125,7 +125,7 @@ t3_ffc_str:
ret
// CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 21BFFC in unpatched output.
-// CHECK: t3_ffc_strsimd:
+// CHECK: <t3_ffc_strsimd>:
// CHECK-NEXT: 21bffc: 3c 02 00 b0 adrp x28, #282624
// CHECK-NEXT: 21c000: 44 00 00 b9 str w4, [x2]
// CHECK-FIX: 21c004: 0c a0 00 14 b #163888
@@ -143,7 +143,7 @@ t3_ffc_strsimd:
ret
// CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 21DFF8 in unpatched output.
-// CHECK: t3_ff8_ldrunpriv:
+// CHECK: <t3_ff8_ldrunpriv>:
// CHECK-NEXT: 21dff8: 1d 02 00 f0 adrp x29, #274432
// CHECK-NEXT: 21dffc: 41 08 40 38 ldtrb w1, [x2]
// CHECK-FIX: 21e000: 0f 98 00 14 b #155708
@@ -161,7 +161,7 @@ t3_ff8_ldrunpriv:
ret
// CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 21FFFC in unpatched output.
-// CHECK: t3_ffc_ldur:
+// CHECK: <t3_ffc_ldur>:
// CHECK-NEXT: 21fffc: 1d 02 00 b0 adrp x29, #266240
// CHECK-NEXT: 220000: 42 40 40 b8 ldur w2, [x2, #4]
// CHECK-FIX: 220004: 10 90 00 14 b #147520
@@ -178,7 +178,7 @@ t3_ffc_ldur:
ret
// CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 221FFC in unpatched output.
-// CHECK: t3_ffc_sturh:
+// CHECK: <t3_ffc_sturh>:
// CHECK-NEXT: 221ffc: f2 01 00 f0 adrp x18, #258048
// CHECK-NEXT: 222000: 43 40 00 78 sturh w3, [x2, #4]
// CHECK-FIX: 222004: 12 88 00 14 b #139336
@@ -196,7 +196,7 @@ t3_ffc_sturh:
ret
// CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 223FF8 in unpatched output.
-// CHECK: t3_ff8_literal:
+// CHECK: <t3_ff8_literal>:
// CHECK-NEXT: 223ff8: f2 01 00 b0 adrp x18, #249856
// CHECK-NEXT: 223ffc: e3 ff ff 58 ldr x3, #-4
// CHECK-FIX: 224000: 15 80 00 14 b #131156
@@ -214,7 +214,7 @@ t3_ff8_literal:
ret
// CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 225FFC in unpatched output.
-// CHECK: t3_ffc_register:
+// CHECK: <t3_ffc_register>:
// CHECK-NEXT: 225ffc: cf 01 00 f0 adrp x15, #241664
// CHECK-NEXT: 226000: 43 68 61 f8 ldr x3, [x2, x1]
// CHECK-FIX: 226004: 16 78 00 14 b #122968
@@ -232,7 +232,7 @@ t3_ffc_register:
ret
// CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 227FF8 in unpatched output.
-// CHECK: t3_ff8_stp:
+// CHECK: <t3_ff8_stp>:
// CHECK-NEXT: 227ff8: d0 01 00 b0 adrp x16, #233472
// CHECK-NEXT: 227ffc: 61 08 00 a9 stp x1, x2, [x3]
// CHECK-FIX: 228000: 19 70 00 14 b #114788
@@ -250,7 +250,7 @@ t3_ff8_stp:
ret
// CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 229FFC in unpatched output.
-// CHECK: t3_ffc_stnp:
+// CHECK: <t3_ffc_stnp>:
// CHECK-NEXT: 229ffc: a7 01 00 f0 adrp x7, #225280
// CHECK-NEXT: 22a000: 61 08 00 a8 stnp x1, x2, [x3]
// CHECK-FIX: 22a004: 1a 68 00 14 b #106600
@@ -268,7 +268,7 @@ t3_ffc_stnp:
ret
// CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 22BFFC in unpatched output.
-// CHECK: t3_ffc_st1singlepost:
+// CHECK: <t3_ffc_st1singlepost>:
// CHECK-NEXT: 22bffc: b7 01 00 b0 adrp x23, #217088
// CHECK-NEXT: 22c000: 20 04 82 0d st1 { v0.b }[1], [x1], x2
// CHECK-FIX: 22c004: 1c 60 00 14 b #98416
@@ -286,7 +286,7 @@ t3_ffc_st1singlepost:
ret
// CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 22DFF8 in unpatched output.
-// CHECK: t3_ff8_st1multiple:
+// CHECK: <t3_ff8_st1multiple>:
// CHECK-NEXT: 22dff8: 97 01 00 f0 adrp x23, #208896
// CHECK-NEXT: 22dffc: 20 a0 00 4c st1 { v0.16b, v1.16b }, [x1]
// CHECK-FIX: 22e000: 1f 58 00 14 b #90236
@@ -304,7 +304,7 @@ t3_ff8_st1multiple:
ret
// CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 22FFF8 in unpatched output.
-// CHECK: t4_ff8_ldr:
+// CHECK: <t4_ff8_ldr>:
// CHECK-NEXT: 22fff8: 80 01 00 b0 adrp x0, #200704
// CHECK-NEXT: 22fffc: 21 00 40 f9 ldr x1, [x1]
// CHECK-NEXT: 230000: 42 00 00 8b add x2, x2, x0
@@ -324,7 +324,7 @@ t4_ff8_ldr:
ret
// CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 231FFC in unpatched output.
-// CHECK: t4_ffc_str:
+// CHECK: <t4_ffc_str>:
// CHECK-NEXT: 231ffc: 7c 01 00 f0 adrp x28, #192512
// CHECK-NEXT: 232000: 42 00 00 f9 str x2, [x2]
// CHECK-NEXT: 232004: 20 00 02 cb sub x0, x1, x2
@@ -344,7 +344,7 @@ t4_ffc_str:
ret
// CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 233FF8 in unpatched output.
-// CHECK: t4_ff8_stp:
+// CHECK: <t4_ff8_stp>:
// CHECK-NEXT: 233ff8: 70 01 00 b0 adrp x16, #184320
// CHECK-NEXT: 233ffc: 61 08 00 a9 stp x1, x2, [x3]
// CHECK-NEXT: 234000: 03 7e 10 9b mul x3, x16, x16
@@ -364,7 +364,7 @@ t4_ff8_stp:
ret
// CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 235FF8 in unpatched output.
-// CHECK: t4_ff8_stppre:
+// CHECK: <t4_ff8_stppre>:
// CHECK-NEXT: 235ff8: 50 01 00 f0 adrp x16, #176128
// CHECK-NEXT: 235ffc: 61 08 81 a9 stp x1, x2, [x3, #16]!
// CHECK-NEXT: 236000: 03 7e 10 9b mul x3, x16, x16
@@ -384,7 +384,7 @@ t4_ff8_stppre:
ret
// CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 237FF8 in unpatched output.
-// CHECK: t4_ff8_stppost:
+// CHECK: <t4_ff8_stppost>:
// CHECK-NEXT: 237ff8: 50 01 00 b0 adrp x16, #167936
// CHECK-NEXT: 237ffc: 61 08 81 a8 stp x1, x2, [x3], #16
// CHECK-NEXT: 238000: 03 7e 10 9b mul x3, x16, x16
@@ -404,7 +404,7 @@ t4_ff8_stppost:
ret
// CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 239FFC in unpatched output.
-// CHECK: t4_ffc_stpsimd:
+// CHECK: <t4_ffc_stpsimd>:
// CHECK-NEXT: 239ffc: 30 01 00 f0 adrp x16, #159744
// CHECK-NEXT: 23a000: 61 08 00 ad stp q1, q2, [x3]
// CHECK-NEXT: 23a004: 03 7e 10 9b mul x3, x16, x16
@@ -424,7 +424,7 @@ t4_ffc_stpsimd:
ret
// CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 23BFFC in unpatched output.
-// CHECK: t4_ffc_stnp:
+// CHECK: <t4_ffc_stnp>:
// CHECK-NEXT: 23bffc: 27 01 00 b0 adrp x7, #151552
// CHECK-NEXT: 23c000: 61 08 00 a8 stnp x1, x2, [x3]
// CHECK-NEXT: 23c004: 1f 20 03 d5 nop
@@ -444,7 +444,7 @@ t4_ffc_stnp:
ret
// CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 23DFFC in unpatched output.
-// CHECK: t4_ffc_st1:
+// CHECK: <t4_ffc_st1>:
// CHECK-NEXT: 23dffc: 18 01 00 f0 adrp x24, #143360
// CHECK-NEXT: 23e000: 20 80 00 4d st1 { v0.s }[2], [x1]
// CHECK-NEXT: 23e004: f6 06 40 f9 ldr x22, [x23, #8]
@@ -464,7 +464,7 @@ t4_ffc_st1:
ret
// CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 23FFF8 in unpatched output.
-// CHECK: t3_ff8_ldr_once:
+// CHECK: <t3_ff8_ldr_once>:
// CHECK-NEXT: 23fff8: 00 01 00 b0 adrp x0, #135168
// CHECK-NEXT: 23fffc: 20 70 82 4c st1 { v0.16b }, [x1], x2
// CHECK-FIX: 240000: 31 10 00 14 b #16580
@@ -484,7 +484,7 @@ t3_ff8_ldr_once:
ret
// CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 241FF8 in unpatched output.
-// CHECK: t3_ff8_ldxr:
+// CHECK: <t3_ff8_ldxr>:
// CHECK-NEXT: 241ff8: e0 00 00 f0 adrp x0, #126976
// CHECK-NEXT: 241ffc: 03 7c 5f c8 ldxr x3, [x0]
// CHECK-FIX: 242000: 33 08 00 14 b #8396
@@ -504,7 +504,7 @@ t3_ff8_ldxr:
ret
// CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 243FF8 in unpatched output.
-// CHECK: t3_ff8_stxr:
+// CHECK: <t3_ff8_stxr>:
// CHECK-NEXT: 243ff8: e0 00 00 b0 adrp x0, #118784
// CHECK-NEXT: 243ffc: 03 7c 04 c8 stxr w4, x3, [x0]
// CHECK-FIX: 244000: 35 00 00 14 b #212
@@ -529,82 +529,82 @@ t3_ff8_stxr:
_start:
ret
-// CHECK-FIX: __CortexA53843419_212000:
+// CHECK-FIX: <__CortexA53843419_212000>:
// CHECK-FIX-NEXT: 24400c: 00 00 40 f9 ldr x0, [x0]
// CHECK-FIX-NEXT: 244010: fd 37 ff 17 b #-204812
-// CHECK-FIX: __CortexA53843419_214000:
+// CHECK-FIX: <__CortexA53843419_214000>:
// CHECK-FIX-NEXT: 244014: 02 04 40 f9 ldr x2, [x0, #8]
// CHECK-FIX-NEXT: 244018: fb 3f ff 17 b #-196628
-// CHECK-FIX: __CortexA53843419_216004:
+// CHECK-FIX: <__CortexA53843419_216004>:
// CHECK-FIX-NEXT: 24401c: 03 08 40 f9 ldr x3, [x0, #16]
// CHECK-FIX-NEXT: 244020: fa 47 ff 17 b #-188440
-// CHECK-FIX: __CortexA53843419_218000:
+// CHECK-FIX: <__CortexA53843419_218000>:
// CHECK-FIX-NEXT: 244024: 02 0c 40 f9 ldr x2, [x0, #24]
// CHECK-FIX-NEXT: 244028: f7 4f ff 17 b #-180260
-// CHECK-FIX: __CortexA53843419_21A004:
+// CHECK-FIX: <__CortexA53843419_21A004>:
// CHECK-FIX-NEXT: 24402c: 9c 13 00 f9 str x28, [x28, #32]
// CHECK-FIX-NEXT: 244030: f6 57 ff 17 b #-172072
-// CHECK-FIX: __CortexA53843419_21C004:
+// CHECK-FIX: <__CortexA53843419_21C004>:
// CHECK-FIX-NEXT: 244034: 84 17 00 f9 str x4, [x28, #40]
// CHECK-FIX-NEXT: 244038: f4 5f ff 17 b #-163888
-// CHECK-FIX: __CortexA53843419_21E000:
+// CHECK-FIX: <__CortexA53843419_21E000>:
// CHECK-FIX-NEXT: 24403c: bd 03 40 f9 ldr x29, [x29]
// CHECK-FIX-NEXT: 244040: f1 67 ff 17 b #-155708
-// CHECK-FIX: __CortexA53843419_220004:
+// CHECK-FIX: <__CortexA53843419_220004>:
// CHECK-FIX-NEXT: 244044: bd 07 40 f9 ldr x29, [x29, #8]
// CHECK-FIX-NEXT: 244048: f0 6f ff 17 b #-147520
-// CHECK-FIX: __CortexA53843419_222004:
+// CHECK-FIX: <__CortexA53843419_222004>:
// CHECK-FIX-NEXT: 24404c: 41 0a 40 f9 ldr x1, [x18, #16]
// CHECK-FIX-NEXT: 244050: ee 77 ff 17 b #-139336
-// CHECK-FIX: __CortexA53843419_224000:
+// CHECK-FIX: <__CortexA53843419_224000>:
// CHECK-FIX-NEXT: 244054: 52 0e 40 f9 ldr x18, [x18, #24]
// CHECK-FIX-NEXT: 244058: eb 7f ff 17 b #-131156
-// CHECK-FIX: __CortexA53843419_226004:
+// CHECK-FIX: <__CortexA53843419_226004>:
// CHECK-FIX-NEXT: 24405c: ea 11 40 f9 ldr x10, [x15, #32]
// CHECK-FIX-NEXT: 244060: ea 87 ff 17 b #-122968
-// CHECK-FIX: __CortexA53843419_228000:
+// CHECK-FIX: <__CortexA53843419_228000>:
// CHECK-FIX-NEXT: 244064: 0d 16 40 f9 ldr x13, [x16, #40]
// CHECK-FIX-NEXT: 244068: e7 8f ff 17 b #-114788
-// CHECK-FIX: __CortexA53843419_22A004:
+// CHECK-FIX: <__CortexA53843419_22A004>:
// CHECK-FIX-NEXT: 24406c: e9 0c 40 f9 ldr x9, [x7, #24]
// CHECK-FIX-NEXT: 244070: e6 97 ff 17 b #-106600
-// CHECK-FIX: __CortexA53843419_22C004:
+// CHECK-FIX: <__CortexA53843419_22C004>:
// CHECK-FIX-NEXT: 244074: f6 12 40 f9 ldr x22, [x23, #32]
// CHECK-FIX-NEXT: 244078: e4 9f ff 17 b #-98416
-// CHECK-FIX: __CortexA53843419_22E000:
+// CHECK-FIX: <__CortexA53843419_22E000>:
// CHECK-FIX-NEXT: 24407c: f8 16 40 f9 ldr x24, [x23, #40]
// CHECK-FIX-NEXT: 244080: e1 a7 ff 17 b #-90236
-// CHECK-FIX: __CortexA53843419_230004:
+// CHECK-FIX: <__CortexA53843419_230004>:
// CHECK-FIX-NEXT: 244084: 02 00 40 f9 ldr x2, [x0]
// CHECK-FIX-NEXT: 244088: e0 af ff 17 b #-82048
-// CHECK-FIX: __CortexA53843419_232008:
+// CHECK-FIX: <__CortexA53843419_232008>:
// CHECK-FIX-NEXT: 24408c: 9b 07 00 f9 str x27, [x28, #8]
// CHECK-FIX-NEXT: 244090: df b7 ff 17 b #-73860
-// CHECK-FIX: __CortexA53843419_234004:
+// CHECK-FIX: <__CortexA53843419_234004>:
// CHECK-FIX-NEXT: 244094: 0e 0a 40 f9 ldr x14, [x16, #16]
// CHECK-FIX-NEXT: 244098: dc bf ff 17 b #-65680
-// CHECK-FIX: __CortexA53843419_236004:
+// CHECK-FIX: <__CortexA53843419_236004>:
// CHECK-FIX-NEXT: 24409c: 0e 06 40 f9 ldr x14, [x16, #8]
// CHECK-FIX-NEXT: 2440a0: da c7 ff 17 b #-57496
-// CHECK-FIX: __CortexA53843419_238004:
+// CHECK-FIX: <__CortexA53843419_238004>:
// CHECK-FIX-NEXT: 2440a4: 0e 06 40 f9 ldr x14, [x16, #8]
// CHECK-FIX-NEXT: 2440a8: d8 cf ff 17 b #-49312
-// CHECK-FIX: __CortexA53843419_23A008:
+// CHECK-FIX: <__CortexA53843419_23A008>:
// CHECK-FIX-NEXT: 2440ac: 0e 06 40 f9 ldr x14, [x16, #8]
// CHECK-FIX-NEXT: 2440b0: d7 d7 ff 17 b #-41124
-// CHECK-FIX: __CortexA53843419_23C008:
+// CHECK-FIX: <__CortexA53843419_23C008>:
// CHECK-FIX-NEXT: 2440b4: ea 00 40 f9 ldr x10, [x7]
// CHECK-FIX-NEXT: 2440b8: d5 df ff 17 b #-32940
-// CHECK-FIX: __CortexA53843419_23E008:
+// CHECK-FIX: <__CortexA53843419_23E008>:
// CHECK-FIX-NEXT: 2440bc: 18 ff 3f f9 str x24, [x24, #32760]
// CHECK-FIX-NEXT: 2440c0: d3 e7 ff 17 b #-24756
-// CHECK-FIX: __CortexA53843419_240000:
+// CHECK-FIX: <__CortexA53843419_240000>:
// CHECK-FIX-NEXT: 2440c4: 01 08 40 f9 ldr x1, [x0, #16]
// CHECK-FIX-NEXT: 2440c8: cf ef ff 17 b #-16580
-// CHECK-FIX: __CortexA53843419_242000:
+// CHECK-FIX: <__CortexA53843419_242000>:
// CHECK-FIX-NEXT: 2440cc: 01 08 40 f9 ldr x1, [x0, #16]
// CHECK-FIX-NEXT: 2440d0: cd f7 ff 17 b #-8396
-// CHECK-FIX: __CortexA53843419_244000:
+// CHECK-FIX: <__CortexA53843419_244000>:
// CHECK-FIX-NEXT: 2440d4: 01 08 40 f9 ldr x1, [x0, #16]
// CHECK-FIX-NEXT: 2440d8: cb ff ff 17 b #-212
.data
diff --git a/lld/test/ELF/aarch64-cortex-a53-843419-thunk.s b/lld/test/ELF/aarch64-cortex-a53-843419-thunk.s
index 2242757d09b4..4e449b7fd787 100644
--- a/lld/test/ELF/aarch64-cortex-a53-843419-thunk.s
+++ b/lld/test/ELF/aarch64-cortex-a53-843419-thunk.s
@@ -38,12 +38,12 @@ t3_ff8_ldr:
ret
// CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 10FF8 in unpatched output.
-// CHECK: 0000000000010ff8 t3_ff8_ldr:
+// CHECK: 0000000000010ff8 <t3_ff8_ldr>:
// CHECK-NEXT: adrp x0, #134217728
// CHECK-NEXT: ldr x1, [x1]
// CHECK-NEXT: b #8
// CHECK-NEXT: ret
-// CHECK: 0000000000011008 __CortexA53843419_11000:
+// CHECK: 0000000000011008 <__CortexA53843419_11000>:
// CHECK-NEXT: ldr x0, [x0, #8]
// CHECK-NEXT: b #-8
.section .text.04, "ax", %progbits
diff --git a/lld/test/ELF/aarch64-cortex-a53-843419-tlsrelax.s b/lld/test/ELF/aarch64-cortex-a53-843419-tlsrelax.s
index b12c0c667d1e..b7e4121646ff 100644
--- a/lld/test/ELF/aarch64-cortex-a53-843419-tlsrelax.s
+++ b/lld/test/ELF/aarch64-cortex-a53-843419-tlsrelax.s
@@ -23,7 +23,7 @@ _start:
ldr x1, [x0, #:gottprel_lo12:v]
ret
-// CHECK: _start:
+// CHECK: <_start>:
// CHECK-NEXT: 211ff8: 41 d0 3b d5 mrs x1, TPIDR_EL0
// CHECK-NEXT: 211ffc: 00 00 a0 d2 movz x0, #0, lsl #16
// CHECK-NEXT: 212000: 01 02 80 f2 movk x1, #16
diff --git a/lld/test/ELF/aarch64-feature-bti.s b/lld/test/ELF/aarch64-feature-bti.s
index e1a7f516c135..6b4520791f2a 100644
--- a/lld/test/ELF/aarch64-feature-bti.s
+++ b/lld/test/ELF/aarch64-feature-bti.s
@@ -16,11 +16,11 @@
# NOBTIDYN-NOT: 0x0000000070000001 (AARCH64_BTI_PLT)
# NOBTIDYN-NOT: 0x0000000070000003 (AARCH64_PAC_PLT)
-# NOBTI: 00000000000102b8 func2:
+# NOBTI: 00000000000102b8 <func2>:
# NOBTI-NEXT: 102b8: bl #56 <func3 at plt>
# NOBTI-NEXT: 102bc: ret
# NOBTI: Disassembly of section .plt:
-# NOBTI: 00000000000102d0 .plt:
+# NOBTI: 00000000000102d0 <.plt>:
# NOBTI-NEXT: 102d0: stp x16, x30, [sp, #-16]!
# NOBTI-NEXT: 102d4: adrp x16, #131072
# NOBTI-NEXT: 102d8: ldr x17, [x16, #960]
@@ -29,7 +29,7 @@
# NOBTI-NEXT: 102e4: nop
# NOBTI-NEXT: 102e8: nop
# NOBTI-NEXT: 102ec: nop
-# NOBTI: 00000000000102f0 func3 at plt:
+# NOBTI: 00000000000102f0 <func3 at plt>:
# NOBTI-NEXT: 102f0: adrp x16, #131072
# NOBTI-NEXT: 102f4: ldr x17, [x16, #968]
# NOBTI-NEXT: 102f8: add x16, x16, #968
@@ -55,13 +55,13 @@
# BTIDYN: 0x0000000070000001 (AARCH64_BTI_PLT)
# BTIDYN-NOT: 0x0000000070000003 (AARCH64_PAC_PLT)
-# BTISO: 0000000000010348 func2:
+# BTISO: 0000000000010348 <func2>:
# BTISO-NEXT: 10348: bl #56 <func3 at plt>
# BTISO-NEXT: ret
-# BTISO: 0000000000010350 func3:
+# BTISO: 0000000000010350 <func3>:
# BTISO-NEXT: 10350: ret
# BTISO: Disassembly of section .plt:
-# BTISO: 0000000000010360 .plt:
+# BTISO: 0000000000010360 <.plt>:
# BTISO-NEXT: 10360: bti c
# BTISO-NEXT: stp x16, x30, [sp, #-16]!
# BTISO-NEXT: adrp x16, #131072
@@ -70,7 +70,7 @@
# BTISO-NEXT: br x17
# BTISO-NEXT: nop
# BTISO-NEXT: nop
-# BTISO: 0000000000010380 func3 at plt:
+# BTISO: 0000000000010380 <func3 at plt>:
# BTISO-NEXT: 10380: adrp x16, #131072
# BTISO-NEXT: ldr x17, [x16, #1144]
# BTISO-NEXT: add x16, x16, #1144
@@ -91,11 +91,11 @@
# RUN: llvm-objdump -d -mattr=+bti --no-show-raw-insn %t.exe | FileCheck --check-prefix=EXECBTI %s
# EXECBTI: Disassembly of section .text:
-# EXECBTI: 0000000000210348 func1:
+# EXECBTI: 0000000000210348 <func1>:
# EXECBTI-NEXT: 210348: bl #40 <func2 at plt>
# EXECBTI-NEXT: ret
# EXECBTI: Disassembly of section .plt:
-# EXECBTI: 0000000000210350 .plt:
+# EXECBTI: 0000000000210350 <.plt>:
# EXECBTI-NEXT: 210350: bti c
# EXECBTI-NEXT: stp x16, x30, [sp, #-16]!
# EXECBTI-NEXT: adrp x16, #131072
@@ -104,7 +104,7 @@
# EXECBTI-NEXT: br x17
# EXECBTI-NEXT: nop
# EXECBTI-NEXT: nop
-# EXECBTI: 0000000000210370 func2 at plt:
+# EXECBTI: 0000000000210370 <func2 at plt>:
# EXECBTI-NEXT: 210370: bti c
# EXECBTI-NEXT: adrp x16, #131072
# EXECBTI-NEXT: ldr x17, [x16, #1168]
@@ -119,11 +119,11 @@
# RUN: llvm-objdump -d -mattr=+bti --no-show-raw-insn %tpie.exe | FileCheck --check-prefix=PIE %s
# PIE: Disassembly of section .text:
-# PIE: 0000000000010348 func1:
+# PIE: 0000000000010348 <func1>:
# PIE-NEXT: 10348: bl #40 <func2 at plt>
# PIE-NEXT: ret
# PIE: Disassembly of section .plt:
-# PIE: 0000000000010350 .plt:
+# PIE: 0000000000010350 <.plt>:
# PIE-NEXT: 10350: bti c
# PIE-NEXT: stp x16, x30, [sp, #-16]!
# PIE-NEXT: adrp x16, #131072
@@ -132,7 +132,7 @@
# PIE-NEXT: br x17
# PIE-NEXT: nop
# PIE-NEXT: nop
-# PIE: 0000000000010370 func2 at plt:
+# PIE: 0000000000010370 <func2 at plt>:
# PIE-NEXT: 10370: bti c
# PIE-NEXT: adrp x16, #131072
# PIE-NEXT: ldr x17, [x16, #1168]
@@ -148,13 +148,13 @@
# RUN: llvm-objdump -d -mattr=+bti --no-show-raw-insn %tnobti.exe | FileCheck --check-prefix=NOEX %s
# NOEX: Disassembly of section .text:
-# NOEX: 00000000002102e0 func1:
+# NOEX: 00000000002102e0 <func1>:
# NOEX-NEXT: 2102e0: bl #48 <func2 at plt>
# NOEX-NEXT: ret
-# NOEX: 00000000002102e8 func3:
+# NOEX: 00000000002102e8 <func3>:
# NOEX-NEXT: 2102e8: ret
# NOEX: Disassembly of section .plt:
-# NOEX: 00000000002102f0 .plt:
+# NOEX: 00000000002102f0 <.plt>:
# NOEX-NEXT: 2102f0: stp x16, x30, [sp, #-16]!
# NOEX-NEXT: adrp x16, #131072
# NOEX-NEXT: ldr x17, [x16, #1024]
@@ -163,7 +163,7 @@
# NOEX-NEXT: nop
# NOEX-NEXT: nop
# NOEX-NEXT: nop
-# NOEX: 0000000000210310 func2 at plt:
+# NOEX: 0000000000210310 <func2 at plt>:
# NOEX-NEXT: 210310: adrp x16, #131072
# NOEX-NEXT: ldr x17, [x16, #1032]
# NOEX-NEXT: add x16, x16, #1032
@@ -182,13 +182,13 @@
# RUN: llvm-objdump -d -mattr=+bti --no-show-raw-insn %tforcebti.exe | FileCheck --check-prefix=FORCE %s
# FORCE: Disassembly of section .text:
-# FORCE: 0000000000210370 func1:
+# FORCE: 0000000000210370 <func1>:
# FORCE-NEXT: 210370: bl #48 <func2 at plt>
# FORCE-NEXT: ret
-# FORCE: 0000000000210378 func3:
+# FORCE: 0000000000210378 <func3>:
# FORCE-NEXT: 210378: ret
# FORCE: Disassembly of section .plt:
-# FORCE: 0000000000210380 .plt:
+# FORCE: 0000000000210380 <.plt>:
# FORCE-NEXT: 210380: bti c
# FORCE-NEXT: stp x16, x30, [sp, #-16]!
# FORCE-NEXT: adrp x16, #131072
@@ -197,7 +197,7 @@
# FORCE-NEXT: br x17
# FORCE-NEXT: nop
# FORCE-NEXT: nop
-# FORCE: 00000000002103a0 func2 at plt:
+# FORCE: 00000000002103a0 <func2 at plt>:
# FORCE-NEXT: 2103a0: bti c
# FORCE-NEXT: adrp x16, #131072
# FORCE-NEXT: ldr x17, [x16, #1200]
diff --git a/lld/test/ELF/aarch64-feature-btipac.s b/lld/test/ELF/aarch64-feature-btipac.s
index f41412cd3ccd..708e336b0add 100644
--- a/lld/test/ELF/aarch64-feature-btipac.s
+++ b/lld/test/ELF/aarch64-feature-btipac.s
@@ -15,13 +15,13 @@
# RUN: llvm-readelf --dynamic-table %t.so | FileCheck --check-prefix BTIPACDYN %s
# BTIPACSO: Disassembly of section .text:
-# BTIPACSO: 0000000000010348 func2:
+# BTIPACSO: 0000000000010348 <func2>:
# BTIPACSO-NEXT: 10348: bl #56 <func3 at plt>
# BTIPACSO-NEXT: ret
-# BTIPACSO: 0000000000010350 func3:
+# BTIPACSO: 0000000000010350 <func3>:
# BTIPACSO-NEXT: 10350: ret
# BTIPACSO: Disassembly of section .plt:
-# BTIPACSO: 0000000000010360 .plt:
+# BTIPACSO: 0000000000010360 <.plt>:
# BTIPACSO-NEXT: 10360: bti c
# BTIPACSO-NEXT: stp x16, x30, [sp, #-16]!
# BTIPACSO-NEXT: adrp x16, #131072
@@ -30,7 +30,7 @@
# BTIPACSO-NEXT: br x17
# BTIPACSO-NEXT: nop
# BTIPACSO-NEXT: nop
-# BTIPACSO: 0000000000010380 func3 at plt:
+# BTIPACSO: 0000000000010380 <func3 at plt>:
# BTIPACSO-NEXT: 10380: adrp x16, #131072
# BTIPACSO-NEXT: ldr x17, [x16, #1144]
# BTIPACSO-NEXT: add x16, x16, #1144
@@ -51,14 +51,14 @@
# RUN: llvm-readelf --dynamic-table %t.exe | FileCheck --check-prefix BTIPACDYNEX %s
# BTIPACEX: Disassembly of section .text:
-# BTIPACEX: 0000000000210370 func1:
+# BTIPACEX: 0000000000210370 <func1>:
# BTIPACEX-NEXT: 210370: bl #48 <func2 at plt>
# BTIPACEX-NEXT: ret
# BTIPACEX-NEXT: ret
-# BTIPACEX: 000000000021037c func3:
+# BTIPACEX: 000000000021037c <func3>:
# BTIPACEX-NEXT: 21037c: ret
# BTIPACEX: Disassembly of section .plt:
-# BTIPACEX: 0000000000210380 .plt:
+# BTIPACEX: 0000000000210380 <.plt>:
# BTIPACEX-NEXT: 210380: bti c
# BTIPACEX-NEXT: stp x16, x30, [sp, #-16]!
# BTIPACEX-NEXT: adrp x16, #131072
@@ -67,7 +67,7 @@
# BTIPACEX-NEXT: br x17
# BTIPACEX-NEXT: nop
# BTIPACEX-NEXT: nop
-# BTIPACEX: 00000000002103a0 func2 at plt:
+# BTIPACEX: 00000000002103a0 <func2 at plt>:
# BTIPACEX-NEXT: 2103a0: bti c
# BTIPACEX-NEXT: adrp x16, #131072
# BTIPACEX-NEXT: ldr x17, [x16, #1200]
@@ -84,14 +84,14 @@
# RUN: llvm-readelf --dynamic-table %t.exe | FileCheck --check-prefix=NODYN %s
# EX: Disassembly of section .text:
-# EX: 00000000002102e0 func1:
+# EX: 00000000002102e0 <func1>:
# EX-NEXT: 2102e0: bl #48 <func2 at plt>
# EX-NEXT: ret
# EX-NEXT: ret
-# EX: 00000000002102ec func3:
+# EX: 00000000002102ec <func3>:
# EX-NEXT: 2102ec: ret
# EX: Disassembly of section .plt:
-# EX: 00000000002102f0 .plt:
+# EX: 00000000002102f0 <.plt>:
# EX-NEXT: 2102f0: stp x16, x30, [sp, #-16]!
# EX-NEXT: adrp x16, #131072
# EX-NEXT: ldr x17, [x16, #1024]
@@ -100,7 +100,7 @@
# EX-NEXT: nop
# EX-NEXT: nop
# EX-NEXT: nop
-# EX: 0000000000210310 func2 at plt:
+# EX: 0000000000210310 <func2 at plt>:
# EX: 210310: adrp x16, #131072
# EX-NEXT: ldr x17, [x16, #1032]
# EX-NEXT: add x16, x16, #1032
@@ -145,14 +145,14 @@ func1:
ret
# BTIPACEX2: Disassembly of section .text:
-# BTIPACEX2: 0000000000210370 func1:
+# BTIPACEX2: 0000000000210370 <func1>:
# BTIPACEX2-NEXT: 210370: bl #48 <func2 at plt>
# BTIPACEX2-NEXT: ret
# BTIPACEX2-NEXT: ret
-# BTIPACEX2: 000000000021037c func3:
+# BTIPACEX2: 000000000021037c <func3>:
# BTIPACEX2-NEXT: 21037c: ret
# BTIPACEX2: Disassembly of section .plt:
-# BTIPACEX2: 0000000000210380 .plt:
+# BTIPACEX2: 0000000000210380 <.plt>:
# BTIPACEX2-NEXT: 210380: bti c
# BTIPACEX2-NEXT: stp x16, x30, [sp, #-16]!
# BTIPACEX2-NEXT: adrp x16, #131072
@@ -161,7 +161,7 @@ func1:
# BTIPACEX2-NEXT: br x17
# BTIPACEX2-NEXT: nop
# BTIPACEX2-NEXT: nop
-# BTIPACEX2: 00000000002103a0 func2 at plt:
+# BTIPACEX2: 00000000002103a0 <func2 at plt>:
# BTIPACEX2-NEXT: 2103a0: bti c
# BTIPACEX2-NEXT: adrp x16, #131072
# BTIPACEX2-NEXT: ldr x17, [x16, #1216]
diff --git a/lld/test/ELF/aarch64-feature-pac.s b/lld/test/ELF/aarch64-feature-pac.s
index 9dd6129396f6..e75cc7025cd4 100644
--- a/lld/test/ELF/aarch64-feature-pac.s
+++ b/lld/test/ELF/aarch64-feature-pac.s
@@ -13,11 +13,11 @@
# RUN: llvm-readelf -x .got.plt %tno.so | FileCheck --check-prefix SOGOTPLT %s
# RUN: llvm-readelf --dynamic-table %tno.so | FileCheck --check-prefix NOPACDYN %s
-# NOPAC: 00000000000102b8 func2:
+# NOPAC: 00000000000102b8 <func2>:
# NOPAC-NEXT: 102b8: bl #56 <func3 at plt>
# NOPAC-NEXT: ret
# NOPAC: Disassembly of section .plt:
-# NOPAC: 00000000000102d0 .plt:
+# NOPAC: 00000000000102d0 <.plt>:
# NOPAC-NEXT: 102d0: stp x16, x30, [sp, #-16]!
# NOPAC-NEXT: adrp x16, #131072
# NOPAC-NEXT: ldr x17, [x16, #960]
@@ -26,7 +26,7 @@
# NOPAC-NEXT: nop
# NOPAC-NEXT: nop
# NOPAC-NEXT: nop
-# NOPAC: 00000000000102f0 func3 at plt:
+# NOPAC: 00000000000102f0 <func3 at plt>:
# NOPAC-NEXT: 102f0: adrp x16, #131072
# NOPAC-NEXT: ldr x17, [x16, #968]
# NOPAC-NEXT: add x16, x16, #968
@@ -46,13 +46,13 @@
# RUN: llvm-readelf --dynamic-table %t.so | FileCheck --check-prefix PACDYN %s
## PAC has no effect on PLT[0], for PLT[N].
-# PACSO: 0000000000010348 func2:
+# PACSO: 0000000000010348 <func2>:
# PACSO-NEXT: 10348: bl #56 <func3 at plt>
# PACSO-NEXT: ret
-# PACSO: 0000000000010350 func3:
+# PACSO: 0000000000010350 <func3>:
# PACSO-NEXT: 10350: ret
# PACSO: Disassembly of section .plt:
-# PACSO: 0000000000010360 .plt:
+# PACSO: 0000000000010360 <.plt>:
# PACSO-NEXT: 10360: stp x16, x30, [sp, #-16]!
# PACSO-NEXT: adrp x16, #131072
# PACSO-NEXT: ldr x17, [x16, #1120]
@@ -61,7 +61,7 @@
# PACSO-NEXT: nop
# PACSO-NEXT: nop
# PACSO-NEXT: nop
-# PACSO: 0000000000010380 func3 at plt:
+# PACSO: 0000000000010380 <func3 at plt>:
# PACSO-NEXT: 10380: adrp x16, #131072
# PACSO-NEXT: ldr x17, [x16, #1128]
# PACSO-NEXT: add x16, x16, #1128
@@ -87,13 +87,13 @@
# RUN: llvm-objdump -d -mattr=+v8.3a --no-show-raw-insn %tpacplt.exe | FileCheck --check-prefix PACPLT %s
# PACPLT: Disassembly of section .text:
-# PACPLT: 0000000000210370 func1:
+# PACPLT: 0000000000210370 <func1>:
# PACPLT-NEXT: 210370: bl #48 <func2 at plt>
# PACPLT-NEXT: ret
-# PACPLT: 0000000000210378 func3:
+# PACPLT: 0000000000210378 <func3>:
# PACPLT-NEXT: 210378: ret
# PACPLT: Disassembly of section .plt:
-# PACPLT: 0000000000210380 .plt:
+# PACPLT: 0000000000210380 <.plt>:
# PACPLT-NEXT: 210380: stp x16, x30, [sp, #-16]!
# PACPLT-NEXT: adrp x16, #131072
# PACPLT-NEXT: ldr x17, [x16, #1192]
@@ -102,7 +102,7 @@
# PACPLT-NEXT: nop
# PACPLT-NEXT: nop
# PACPLT-NEXT: nop
-# PACPLT: 00000000002103a0 func2 at plt:
+# PACPLT: 00000000002103a0 <func2 at plt>:
# PACPLT-NEXT: 2103a0: adrp x16, #131072
# PACPLT-NEXT: ldr x17, [x16, #1200]
# PACPLT-NEXT: add x16, x16, #1200
diff --git a/lld/test/ELF/aarch64-fpic-got.s b/lld/test/ELF/aarch64-fpic-got.s
index d6e80b1276b5..4f46cea9c6ee 100644
--- a/lld/test/ELF/aarch64-fpic-got.s
+++ b/lld/test/ELF/aarch64-fpic-got.s
@@ -16,7 +16,7 @@
## page(0x220320) - page(0x210000) = 65536
## page(0x220320) & 0xff8 = 800
-# DIS: _start:
+# DIS: <_start>:
# DIS-NEXT: 210258: adrp x0, #65536
# DIS-NEXT: 21025c: ldr x0, [x0, #800]
diff --git a/lld/test/ELF/aarch64-gnu-ifunc-address.s b/lld/test/ELF/aarch64-gnu-ifunc-address.s
index a1e289cdeaf6..36c3f5a3bd28 100644
--- a/lld/test/ELF/aarch64-gnu-ifunc-address.s
+++ b/lld/test/ELF/aarch64-gnu-ifunc-address.s
@@ -20,7 +20,7 @@ main:
adrp x8, :got:myfunc
ldr x8, [x8, :got_lo12:myfunc]
ret
-# CHECK: 0000000000010284 main:
+# CHECK: 0000000000010284 <main>:
## myfunc's got entry = page(0x20330)-page(0x10284) + 0x330 = 65536 + 816
# CHECK-NEXT: 10284: adrp x8, #65536
# CHECK-NEXT: 10288: ldr x8, [x8, #816]
@@ -28,7 +28,7 @@ main:
# CHECK: Disassembly of section .got:
# CHECK-EMPTY:
-# CHECK-NEXT: 0000000000020330 .got:
+# CHECK-NEXT: 0000000000020330 <.got>:
# CHECK-RELOCS: Relocations [
# CHECK-RELOCS-NEXT: Section {{.*}} .rela.dyn {
diff --git a/lld/test/ELF/aarch64-gnu-ifunc-nonpreemptable.s b/lld/test/ELF/aarch64-gnu-ifunc-nonpreemptable.s
index f5de65e6fd1c..31b826c8b580 100644
--- a/lld/test/ELF/aarch64-gnu-ifunc-nonpreemptable.s
+++ b/lld/test/ELF/aarch64-gnu-ifunc-nonpreemptable.s
@@ -30,16 +30,16 @@ main:
ret
## The address of myfunc is the address of the PLT entry for myfunc.
-# PDE: myfunc_resolver:
+# PDE: <myfunc_resolver>:
# PDE-NEXT: 210170: ret
-# PDE: main:
+# PDE: <main>:
# PDE-NEXT: 210174: adrp x8, #0
# PDE-NEXT: 210178: add x8, x8, #384
# PDE-NEXT: 21017c: ret
# PDE-EMPTY:
# PDE-NEXT: Disassembly of section .iplt:
# PDE-EMPTY:
-# PDE-NEXT: myfunc:
+# PDE-NEXT: <myfunc>:
## page(.got.plt) - page(0x210010) = 65536
# PDE-NEXT: 210180: adrp x16, #65536
# PDE-NEXT: 210184: ldr x17, [x16, #400]
@@ -52,16 +52,16 @@ main:
# PDE-RELOC-NEXT: 0x220190 R_AARCH64_IRELATIVE - 0x210170
# PDE-RELOC-NEXT: }
-# PIE: myfunc_resolver:
+# PIE: <myfunc_resolver>:
# PIE-NEXT: 10260: ret
-# PIE: main:
+# PIE: <main>:
# PIE-NEXT: 10264: adrp x8, #0
# PIE-NEXT: 10268: add x8, x8, #624
# PIE-NEXT: 1026c: ret
# PIE-EMPTY:
# PIE-NEXT: Disassembly of section .iplt:
# PIE-EMPTY:
-# PIE-NEXT: myfunc:
+# PIE-NEXT: <myfunc>:
# PIE-NEXT: 10270: adrp x16, #131072
# PIE-NEXT: 10274: ldr x17, [x16, #880]
# PIE-NEXT: 10278: add x16, x16, #880
diff --git a/lld/test/ELF/aarch64-gnu-ifunc-plt.s b/lld/test/ELF/aarch64-gnu-ifunc-plt.s
index d1a8eba40a95..f65183fa02e7 100644
--- a/lld/test/ELF/aarch64-gnu-ifunc-plt.s
+++ b/lld/test/ELF/aarch64-gnu-ifunc-plt.s
@@ -34,11 +34,11 @@
// Check that a PLT header is written and the ifunc entries appear last
// DISASM: Disassembly of section .text:
// DISASM-EMPTY:
-// DISASM-NEXT: foo:
+// DISASM-NEXT: <foo>:
// DISASM-NEXT: 2102d8: ret
-// DISASM: bar:
+// DISASM: <bar>:
// DISASM-NEXT: 2102dc: ret
-// DISASM: _start:
+// DISASM: <_start>:
// DISASM-NEXT: 2102e0: bl #80 <zed2+0x210330>
// DISASM-NEXT: 2102e4: bl #92 <zed2+0x210340>
// DISASM-NEXT: 2102e8: bl #40 <bar2 at plt>
@@ -46,7 +46,7 @@
// DISASM-EMPTY:
// DISASM-NEXT: Disassembly of section .plt:
// DISASM-EMPTY:
-// DISASM-NEXT: .plt:
+// DISASM-NEXT: <.plt>:
// DISASM-NEXT: 2102f0: stp x16, x30, [sp, #-16]!
// DISASM-NEXT: 2102f4: adrp x16, #131072
// DISASM-NEXT: 2102f8: ldr x17, [x16, #1104]
@@ -56,13 +56,13 @@
// DISASM-NEXT: 210308: nop
// DISASM-NEXT: 21030c: nop
// DISASM-EMPTY:
-// DISASM-NEXT: bar2 at plt:
+// DISASM-NEXT: <bar2 at plt>:
// DISASM-NEXT: 210310: adrp x16, #131072
// DISASM-NEXT: 210314: ldr x17, [x16, #1112]
// DISASM-NEXT: 210318: add x16, x16, #1112
// DISASM-NEXT: 21031c: br x17
// DISASM-EMPTY:
-// DISASM-NEXT: zed2 at plt:
+// DISASM-NEXT: <zed2 at plt>:
// DISASM-NEXT: 210320: adrp x16, #131072
// DISASM-NEXT: 210324: ldr x17, [x16, #1120]
// DISASM-NEXT: 210328: add x16, x16, #1120
@@ -70,7 +70,7 @@
// DISASM-EMPTY:
// DISASM-NEXT: Disassembly of section .iplt:
// DISASM-EMPTY:
-// DISASM-NEXT: .iplt:
+// DISASM-NEXT: <.iplt>:
// DISASM-NEXT: 210330: adrp x16, #131072
// DISASM-NEXT: 210334: ldr x17, [x16, #1128]
// DISASM-NEXT: 210338: add x16, x16, #1128
diff --git a/lld/test/ELF/aarch64-gnu-ifunc.s b/lld/test/ELF/aarch64-gnu-ifunc.s
index ec2f3d4ac8f8..d38feca96b42 100644
--- a/lld/test/ELF/aarch64-gnu-ifunc.s
+++ b/lld/test/ELF/aarch64-gnu-ifunc.s
@@ -101,11 +101,11 @@
// DISASM: Disassembly of section .text:
// DISASM-EMPTY:
-// DISASM-NEXT: foo:
+// DISASM-NEXT: <foo>:
// DISASM-NEXT: 210188: ret
-// DISASM: bar:
+// DISASM: <bar>:
// DISASM-NEXT: 21018c: ret
-// DISASM: _start:
+// DISASM: <_start>:
// DISASM-NEXT: 210190: bl #16
// DISASM-NEXT: 210194: bl #28
// DISASM-NEXT: 210198: add x2, x2, #344
@@ -113,7 +113,7 @@
// DISASM-EMPTY:
// DISASM-NEXT: Disassembly of section .iplt:
// DISASM-EMPTY:
-// DISASM-NEXT: .iplt:
+// DISASM-NEXT: <.iplt>:
// DISASM-NEXT: 2101a0: adrp x16, #65536
// DISASM-NEXT: 2101a4: ldr x17, [x16, #448]
// DISASM-NEXT: 2101a8: add x16, x16, #448
diff --git a/lld/test/ELF/aarch64-gnu-ifunc2.s b/lld/test/ELF/aarch64-gnu-ifunc2.s
index 6e02e09c82a8..89b7625858c1 100644
--- a/lld/test/ELF/aarch64-gnu-ifunc2.s
+++ b/lld/test/ELF/aarch64-gnu-ifunc2.s
@@ -7,10 +7,10 @@
# CHECK: Disassembly of section .text:
# CHECK-EMPTY:
-# CHECK-NEXT: myfunc:
+# CHECK-NEXT: <myfunc>:
# CHECK-NEXT: 210170:
-# CHECK: main:
+# CHECK: <main>:
# .got.plt - page(0x210174) = 0x220190 - 0x210000 = 0x10190
# CHECK-NEXT: 210174: adrp x8, #0x10000
# CHECK-NEXT: 210178: ldr x8, [x8, #0x190]
@@ -18,7 +18,7 @@
# CHECK: Disassembly of section .iplt:
# CHECK-EMPTY:
-# CHECK-NEXT: .iplt:
+# CHECK-NEXT: <.iplt>:
# .got.plt - page(0x210180) = 0x220190 - 0x210000 = 0x10190
# CHECK-NEXT: 210180: adrp x16, #0x10000
# CHECK-NEXT: 210184: ldr x17, [x16, #0x190]
diff --git a/lld/test/ELF/aarch64-ifunc-bti.s b/lld/test/ELF/aarch64-ifunc-bti.s
index 936d3967d846..cb32d95198f8 100644
--- a/lld/test/ELF/aarch64-ifunc-bti.s
+++ b/lld/test/ELF/aarch64-ifunc-bti.s
@@ -11,7 +11,7 @@
# we must use bti c.
# CHECK: Disassembly of section .plt:
-# CHECK: 0000000000010380 .plt:
+# CHECK: 0000000000010380 <.plt>:
# CHECK-NEXT: 10380: bti c
# CHECK-NEXT: stp x16, x30, [sp, #-16]!
# CHECK-NEXT: adrp x16, #131072
@@ -20,7 +20,7 @@
# CHECK-NEXT: br x17
# CHECK-NEXT: nop
# CHECK-NEXT: nop
-# CHECK: 00000000000103a0 func1 at plt:
+# CHECK: 00000000000103a0 <func1 at plt>:
# CHECK-NEXT: 103a0: bti c
# CHECK-NEXT: adrp x16, #131072
# CHECK-NEXT: ldr x17, [x16, #1280]
@@ -30,7 +30,7 @@
# CHECK-EMPTY:
# CHECK: Disassembly of section .iplt:
# CHECK-EMPTY:
-# CHECK-NEXT: 00000000000103c0 myfunc:
+# CHECK-NEXT: 00000000000103c0 <myfunc>:
# CHECK-NEXT: 103c0: bti c
# CHECK-NEXT: adrp x16, #131072
# CHECK-NEXT: ldr x17, [x16, #1288]
diff --git a/lld/test/ELF/aarch64-jump26-thunk.s b/lld/test/ELF/aarch64-jump26-thunk.s
index 38883b0aa327..6fe05893332b 100644
--- a/lld/test/ELF/aarch64-jump26-thunk.s
+++ b/lld/test/ELF/aarch64-jump26-thunk.s
@@ -11,11 +11,11 @@ _start:
// CHECK: Disassembly of section .text:
// CHECK-EMPTY:
-// CHECK-NEXT: _start:
+// CHECK-NEXT: <_start>:
// CHECK-NEXT: 210120: b #4
-// CHECK: __AArch64AbsLongThunk_big:
+// CHECK: <__AArch64AbsLongThunk_big>:
// CHECK-NEXT: 210124: ldr x16, #8
// CHECK-NEXT: 210128: br x16
-// CHECK: $d:
+// CHECK: <$d>:
// CHECK-NEXT: 21012c: 00 00 00 00 .word 0x00000000
// CHECK-NEXT: 210130: 10 00 00 00 .word 0x00000010
diff --git a/lld/test/ELF/aarch64-plt.s b/lld/test/ELF/aarch64-plt.s
index d37d775def1d..5595596b2142 100644
--- a/lld/test/ELF/aarch64-plt.s
+++ b/lld/test/ELF/aarch64-plt.s
@@ -58,17 +58,17 @@
// DUMPDSO-NEXT: 30460 00000000 00000000 40030100 00000000
// DUMPDSO-NEXT: 30470 40030100 00000000 40030100 00000000
-// DISASMDSO: _start:
+// DISASMDSO: <_start>:
// DISASMDSO-NEXT: 10330: b #0x30 <foo at plt>
// DISASMDSO-NEXT: 10334: b #0x3c <bar at plt>
// DISASMDSO-NEXT: 10338: b #0x48 <weak at plt>
-// DISASMDSO: foo:
+// DISASMDSO: <foo>:
// DISASMDSO-NEXT: 1033c: nop
// DISASMDSO: Disassembly of section .plt:
// DISASMDSO-EMPTY:
-// DISASMDSO-NEXT: .plt:
+// DISASMDSO-NEXT: <.plt>:
// DISASMDSO-NEXT: 10340: stp x16, x30, [sp, #-0x10]!
// &(.got.plt[2]) = 0x30450 + 2 * 8 = 0x30460
// DISASMDSO-NEXT: 10344: adrp x16, #0x20000
@@ -82,7 +82,7 @@
// foo at plt 0x30468
// &.got.plt[foo] = 0x30468
// DISASMDSO-EMPTY:
-// DISASMDSO-NEXT: foo at plt:
+// DISASMDSO-NEXT: <foo at plt>:
// DISASMDSO-NEXT: 10360: adrp x16, #0x20000
// DISASMDSO-NEXT: 10364: ldr x17, [x16, #0x468]
// DISASMDSO-NEXT: 10368: add x16, x16, #0x468
@@ -91,7 +91,7 @@
// bar at plt
// &.got.plt[foo] = 0x30470
// DISASMDSO-EMPTY:
-// DISASMDSO-NEXT: bar at plt:
+// DISASMDSO-NEXT: <bar at plt>:
// DISASMDSO-NEXT: 10370: adrp x16, #0x20000
// DISASMDSO-NEXT: 10374: ldr x17, [x16, #0x470]
// DISASMDSO-NEXT: 10378: add x16, x16, #0x470
@@ -100,7 +100,7 @@
// weak at plt
// 0x30468 = 0x10000 + 131072 + 1128
// DISASMDSO-EMPTY:
-// DISASMDSO-NEXT: weak at plt:
+// DISASMDSO-NEXT: <weak at plt>:
// DISASMDSO-NEXT: 10380: adrp x16, #0x20000
// DISASMDSO-NEXT: 10384: ldr x17, [x16, #0x478]
// DISASMDSO-NEXT: 10388: add x16, x16, #0x478
@@ -150,17 +150,17 @@
// DUMPEXE-NEXT: 230400 00000000 00000000 e0022100 00000000
// DUMPEXE-NEXT: 230410 e0022100 00000000
-// DISASMEXE: _start:
+// DISASMEXE: <_start>:
// DISASMEXE-NEXT: 2102c8: b #0xc <foo>
// DISASMEXE-NEXT: 2102cc: b #0x34 <bar at plt>
// DISASMEXE-NEXT: 2102d0: b #0x40 <weak at plt>
-// DISASMEXE: foo:
+// DISASMEXE: <foo>:
// DISASMEXE-NEXT: 2102d4: nop
// DISASMEXE: Disassembly of section .plt:
// DISASMEXE-EMPTY:
-// DISASMEXE-NEXT: .plt:
+// DISASMEXE-NEXT: <.plt>:
// DISASMEXE-NEXT: 2102e0: stp x16, x30, [sp, #-0x10]!
// &(.got.plt[2]) = 0x2303f0 + 2 * 8 = 0x230400
// DISASMEXE-NEXT: 2102e4: adrp x16, #0x20000
@@ -173,7 +173,7 @@
// bar at plt
// DISASMEXE-EMPTY:
-// DISASMEXE-NEXT: bar at plt:
+// DISASMEXE-NEXT: <bar at plt>:
// DISASMEXE-NEXT: 210300: adrp x16, #0x20000
// DISASMEXE-NEXT: 210304: ldr x17, [x16, #0x408]
// DISASMEXE-NEXT: 210308: add x16, x16, #0x408
@@ -181,7 +181,7 @@
// weak at plt
// DISASMEXE-EMPTY:
-// DISASMEXE-NEXT: weak at plt:
+// DISASMEXE-NEXT: <weak at plt>:
// DISASMEXE-NEXT: 210310: adrp x16, #0x20000
// DISASMEXE-NEXT: 210314: ldr x17, [x16, #0x410]
// DISASMEXE-NEXT: 210318: add x16, x16, #0x410
diff --git a/lld/test/ELF/aarch64-relocs.s b/lld/test/ELF/aarch64-relocs.s
index abafe099157c..4a99804669fc 100644
--- a/lld/test/ELF/aarch64-relocs.s
+++ b/lld/test/ELF/aarch64-relocs.s
@@ -13,9 +13,9 @@ msgend:
# CHECK: Disassembly of section .R_AARCH64_ADR_PREL_LO21:
# CHECK-EMPTY:
-# CHECK: _start:
+# CHECK: <_start>:
# CHECK: 0: 21 00 00 10 adr x1, #4
-# CHECK: msg:
+# CHECK: <msg>:
# CHECK: 4:
# #4 is the adr immediate value.
@@ -29,7 +29,7 @@ mystr:
#
# CHECK: Disassembly of section .R_AARCH64_ADR_PREL_PG_H121:
# CHECK-EMPTY:
-# CHECK-NEXT: $x.2:
+# CHECK-NEXT: <$x.2>:
# CHECK-NEXT: 210132: 01 00 00 90 adrp x1, #0
.section .R_AARCH64_ADD_ABS_LO12_NC,"ax", at progbits
@@ -43,7 +43,7 @@ mystr:
#
# CHECK: Disassembly of section .R_AARCH64_ADD_ABS_LO12_NC:
# CHECK-EMPTY:
-# CHECK-NEXT: $x.4:
+# CHECK-NEXT: <$x.4>:
# CHECK-NEXT: 21013b: 00 fc 04 91 add x0, x0, #319
.section .R_AARCH64_LDST64_ABS_LO12_NC,"ax", at progbits
@@ -57,7 +57,7 @@ foo:
# 0x0000a400 | 0xf940177c = 0xf940a77c
# CHECK: Disassembly of section .R_AARCH64_LDST64_ABS_LO12_NC:
# CHECK-EMPTY:
-# CHECK-NEXT: $x.6:
+# CHECK-NEXT: <$x.6>:
# CHECK-NEXT: 210144: 7c a7 40 f9 ldr x28, [x27, #328]
.section .SUB,"ax", at progbits
@@ -67,9 +67,9 @@ sub:
# CHECK: Disassembly of section .SUB:
# CHECK-EMPTY:
-# CHECK-NEXT: $x.8:
+# CHECK-NEXT: <$x.8>:
# CHECK-NEXT: 21014c: 1f 20 03 d5 nop
-# CHECK: sub:
+# CHECK: <sub>:
# CHECK-NEXT: 210150: 1f 20 03 d5 nop
.section .R_AARCH64_CALL26,"ax", at progbits
@@ -82,7 +82,7 @@ call26:
# 0x94000000 | 0x03ffffff = 0x97ffffff
# CHECK: Disassembly of section .R_AARCH64_CALL26:
# CHECK-EMPTY:
-# CHECK-NEXT: call26:
+# CHECK-NEXT: <call26>:
# CHECK-NEXT: 210154: ff ff ff 97 bl #-4
.section .R_AARCH64_JUMP26,"ax", at progbits
@@ -95,7 +95,7 @@ jump26:
# 0x14000000 | 0x03fffffe = 0x17fffffe
# CHECK: Disassembly of section .R_AARCH64_JUMP26:
# CHECK-EMPTY:
-# CHECK-NEXT: jump26:
+# CHECK-NEXT: <jump26>:
# CHECK-NEXT: 210158: fe ff ff 17 b #-8
.section .R_AARCH64_LDST32_ABS_LO12_NC,"ax", at progbits
@@ -110,7 +110,7 @@ foo32:
# 0x00016000 | 0xbd4000a4 = 0xbd4160a4
# CHECK: Disassembly of section .R_AARCH64_LDST32_ABS_LO12_NC:
# CHECK-EMPTY:
-# CHECK-NEXT: ldst32:
+# CHECK-NEXT: <ldst32>:
# CHECK-NEXT: 21015c: a4 60 41 bd ldr s4, [x5, #352]
.section .R_AARCH64_LDST8_ABS_LO12_NC,"ax", at progbits
@@ -125,7 +125,7 @@ foo8:
# 0x0005a000 | 0x398001ab = 0x3985a1ab
# CHECK: Disassembly of section .R_AARCH64_LDST8_ABS_LO12_NC:
# CHECK-EMPTY:
-# CHECK-NEXT: ldst8:
+# CHECK-NEXT: <ldst8>:
# CHECK-NEXT: 210164: ab a1 85 39 ldrsb x11, [x13, #360]
.section .R_AARCH64_LDST128_ABS_LO12_NC,"ax", at progbits
@@ -140,7 +140,7 @@ foo128:
# 0x00005c00 | 0x3dc00274 = 0x3dc05e74
# CHECK: Disassembly of section .R_AARCH64_LDST128_ABS_LO12_NC:
# CHECK-EMPTY:
-# CHECK: ldst128:
+# CHECK: <ldst128>:
# CHECK: 21016c: 74 5e c0 3d ldr q20, [x19, #368]
#foo128:
# 210170: 66 6f 6f 00 .word
@@ -159,7 +159,7 @@ foo16:
# 0x2f000 | 0x7d400271 = 0x7d430271
# CHECK: Disassembly of section .R_AARCH64_LDST16_ABS_LO12_NC:
# CHECK-EMPTY:
-# CHECK-NEXT: ldst16:
+# CHECK-NEXT: <ldst16>:
# CHECK-NEXT: 210174: 71 02 43 7d ldr h17, [x19, #384]
# CHECK-NEXT: 210178: 61 02 43 79 ldrh w1, [x19, #384]
# CHECK-NEXT: 21017c: 62 06 43 79 ldrh w2, [x19, #386]
@@ -178,7 +178,7 @@ movz1:
## 4222124650659840 == (0xF << 48)
# CHECK: Disassembly of section .R_AARCH64_MOVW_UABS:
# CHECK-EMPTY:
-# CHECK-NEXT: movz1:
+# CHECK-NEXT: <movz1>:
# CHECK-NEXT: 8c 01 80 f2 movk x12, #12
# CHECK-NEXT: 8c 01 80 f2 movk x12, #12
# CHECK-NEXT: ad 01 a0 f2 movk x13, #13, lsl #16
diff --git a/lld/test/ELF/aarch64-thunk-pi.s b/lld/test/ELF/aarch64-thunk-pi.s
index 362fec62043e..46d5075d2d43 100644
--- a/lld/test/ELF/aarch64-thunk-pi.s
+++ b/lld/test/ELF/aarch64-thunk-pi.s
@@ -15,7 +15,7 @@ low_target:
// Need thunk to high_target at plt
bl high_target
ret
-// CHECK: low_target:
+// CHECK: <low_target>:
// CHECK-NEXT: d8: bl #0x14 <__AArch64ADRPThunk_high_target>
// CHECK-NEXT: ret
@@ -28,23 +28,23 @@ low_target2:
// .text_high+8 = high_target2
bl .text_high+8
ret
-// CHECK: low_target2:
+// CHECK: <low_target2>:
// CHECK-NEXT: e0: bl #0x18 <__AArch64ADRPThunk_high_target2>
// CHECK-NEXT: e4: bl #0x20 <__AArch64ADRPThunk_>
// CHECK-NEXT: ret
// Expect range extension thunks for .text_low
// adrp calculation is (PC + signed immediate) & (!0xfff)
-// CHECK: __AArch64ADRPThunk_high_target:
+// CHECK: <__AArch64ADRPThunk_high_target>:
// CHECK-NEXT: ec: adrp x16, #0x10000000
// CHECK-NEXT: add x16, x16, #0x40
// CHECK-NEXT: br x16
-// CHECK: __AArch64ADRPThunk_high_target2:
+// CHECK: <__AArch64ADRPThunk_high_target2>:
// CHECK-NEXT: f8: adrp x16, #0x10000000
// CHECK-NEXT: add x16, x16, #0x8
// CHECK-NEXT: br x16
/// Identical to the previous one, but for the target .text_high+8.
-// CHECK: __AArch64ADRPThunk_:
+// CHECK: <__AArch64ADRPThunk_>:
// CHECK-NEXT: 104: adrp x16, #0x10000000
// CHECK-NEXT: add x16, x16, #0x8
// CHECK-NEXT: br x16
@@ -57,7 +57,7 @@ high_target:
// No thunk needed as we can reach low_target at plt
bl low_target
ret
-// CHECK: high_target:
+// CHECK: <high_target>:
// CHECK-NEXT: 10000000: bl #0x50 <low_target at plt>
// CHECK-NEXT: ret
@@ -68,20 +68,20 @@ high_target2:
// Need thunk to low_target
bl low_target2
ret
-// CHECK: high_target2:
+// CHECK: <high_target2>:
// CHECK-NEXT: 10000008: bl #0x8 <__AArch64ADRPThunk_low_target2>
// CHECK-NEXT: ret
// Expect Thunk for .text.high
-// CHECK: __AArch64ADRPThunk_low_target2:
+// CHECK: <__AArch64ADRPThunk_low_target2>:
// CHECK-NEXT: 10000010: adrp x16, #-0x10000000
// CHECK-NEXT: add x16, x16, #0xe0
// CHECK-NEXT: br x16
// CHECK: Disassembly of section .plt:
// CHECK-EMPTY:
-// CHECK-NEXT: .plt:
+// CHECK-NEXT: <.plt>:
// CHECK-NEXT: 10000020: stp x16, x30, [sp, #-0x10]!
// CHECK-NEXT: adrp x16, #0
// CHECK-NEXT: ldr x17, [x16, #0x120]
@@ -91,13 +91,13 @@ high_target2:
// CHECK-NEXT: nop
// CHECK-NEXT: nop
// CHECK-EMPTY:
-// CHECK-NEXT: high_target at plt:
+// CHECK-NEXT: <high_target at plt>:
// CHECK-NEXT: 10000040: adrp x16, #0x0
// CHECK-NEXT: ldr x17, [x16, #0x128]
// CHECK-NEXT: add x16, x16, #0x128
// CHECK-NEXT: br x17
// CHECK-EMPTY:
-// CHECK-NEXT: low_target at plt:
+// CHECK-NEXT: <low_target at plt>:
// CHECK-NEXT: 10000050: adrp x16, #0x0
// CHECK-NEXT: ldr x17, [x16, #0x130]
// CHECK-NEXT: add x16, x16, #0x130
diff --git a/lld/test/ELF/aarch64-thunk-script.s b/lld/test/ELF/aarch64-thunk-script.s
index b80a21637b42..5b5a53be206d 100644
--- a/lld/test/ELF/aarch64-thunk-script.s
+++ b/lld/test/ELF/aarch64-thunk-script.s
@@ -29,24 +29,24 @@ high_target:
// CHECK: Disassembly of section .text_low:
// CHECK-EMPTY:
-// CHECK-NEXT: _start:
+// CHECK-NEXT: <_start>:
// CHECK-NEXT: 2000: bl #0xc <__AArch64AbsLongThunk_high_target>
// CHECK-NEXT: 2004: bl #0x18 <__AArch64AbsLongThunk_>
// CHECK-NEXT: ret
-// CHECK: __AArch64AbsLongThunk_high_target:
+// CHECK: <__AArch64AbsLongThunk_high_target>:
// CHECK-NEXT: 200c: ldr x16, #0x8
// CHECK-NEXT: br x16
-// CHECK: $d:
+// CHECK: <$d>:
// CHECK-NEXT: 2014: 00 20 00 08 .word 0x08002000
// CHECK-NEXT: 2018: 00 00 00 00 .word 0x00000000
-// CHECK: __AArch64AbsLongThunk_:
+// CHECK: <__AArch64AbsLongThunk_>:
// CHECK-NEXT: 201c: ldr x16, #0x8
// CHECK-NEXT: 2020: br x16
-// CHECK: $d:
+// CHECK: <$d>:
// CHECK-NEXT: 2024: 04 20 00 08 .word 0x08002004
// CHECK-NEXT: 2028: 00 00 00 00 .word 0x00000000
// CHECK: Disassembly of section .text_high:
// CHECK-EMPTY:
-// CHECK-NEXT: high_target:
+// CHECK-NEXT: <high_target>:
// CHECK-NEXT: 8002000: bl #-0x8000000 <_start>
// CHECK-NEXT: ret
diff --git a/lld/test/ELF/aarch64-thunk-section-location.s b/lld/test/ELF/aarch64-thunk-section-location.s
index 71283717419b..5fb575c5b7d4 100644
--- a/lld/test/ELF/aarch64-thunk-section-location.s
+++ b/lld/test/ELF/aarch64-thunk-section-location.s
@@ -34,8 +34,8 @@ _start:
high_target:
ret
-// CHECK: __AArch64AbsLongThunk_high_target:
+// CHECK: <__AArch64AbsLongThunk_high_target>:
// CHECK-NEXT: 81d1008: ldr x16, #8
// CHECK-NEXT: 81d100c: br x16
-// CHECK: $d:
+// CHECK: <$d>:
// CHECK-NEXT: 81d1010: 00 20 21 08 .word 0x08212000
diff --git a/lld/test/ELF/aarch64-tls-gdie.s b/lld/test/ELF/aarch64-tls-gdie.s
index 5da8e739d5c0..52fb563fc099 100644
--- a/lld/test/ELF/aarch64-tls-gdie.s
+++ b/lld/test/ELF/aarch64-tls-gdie.s
@@ -26,7 +26,7 @@ _start:
// page(0x220300) - page(0x21023c) = 65536
// 0x23c = 768
-// CHECK: _start:
+// CHECK: <_start>:
// CHECK-NEXT: 210238: nop
// CHECK-NEXT: 21023c: adrp x0, #65536
// CHECK-NEXT: 210240: ldr x0, [x0, #768]
diff --git a/lld/test/ELF/aarch64-tls-gdle.s b/lld/test/ELF/aarch64-tls-gdle.s
index f53359de457a..7ba18a8dc38b 100644
--- a/lld/test/ELF/aarch64-tls-gdle.s
+++ b/lld/test/ELF/aarch64-tls-gdle.s
@@ -10,7 +10,7 @@
# RELOC-NEXT: ]
# TCB size = 0x16 and foo is first element from TLS register.
-# CHECK-LABEL: _start:
+# CHECK-LABEL: <_start>:
# CHECK-NEXT: 2101c8: movz x0, #0, lsl #16
# CHECK-NEXT: 2101cc: movk x0, #16
# CHECK-NEXT: 2101d0: nop
diff --git a/lld/test/ELF/aarch64-tls-ie.s b/lld/test/ELF/aarch64-tls-ie.s
index 4a14f5e346b3..24443cebe20c 100644
--- a/lld/test/ELF/aarch64-tls-ie.s
+++ b/lld/test/ELF/aarch64-tls-ie.s
@@ -33,7 +33,7 @@
## 0x2200B0 & 0xff8 = 0xB0 = 176
## Page(0x2200B8) - Page(0x210000) = 0x10000 = 65536
## 0x2200B8 & 0xff8 = 0xB8 = 184
-# CHECK: _start:
+# CHECK: <_start>:
# CHECK-NEXT: 210278: adrp x0, #65536
# CHECK-NEXT: 21027c: ldr x0, [x0, #824]
# CHECK-NEXT: 210280: adrp x0, #65536
diff --git a/lld/test/ELF/aarch64-tls-iele.s b/lld/test/ELF/aarch64-tls-iele.s
index 928ea450e9e7..a40575b54f90 100644
--- a/lld/test/ELF/aarch64-tls-iele.s
+++ b/lld/test/ELF/aarch64-tls-iele.s
@@ -16,7 +16,7 @@
# TCB size = 0x16 and foo is first element from TLS register.
# CHECK: Disassembly of section .text:
# CHECK-EMPTY:
-# CHECK: _start:
+# CHECK: <_start>:
# CHECK-NEXT: movz x0, #0, lsl #16
# CHECK-NEXT: movk x0, #20
# CHECK-NEXT: movz x0, #0, lsl #16
diff --git a/lld/test/ELF/aarch64-tls-le.s b/lld/test/ELF/aarch64-tls-le.s
index 6df4ae64ffb4..e63a379fcc45 100644
--- a/lld/test/ELF/aarch64-tls-le.s
+++ b/lld/test/ELF/aarch64-tls-le.s
@@ -19,7 +19,7 @@ _start:
# TCB size = 0x16 and foo is first element from TLS register.
#CHECK: Disassembly of section .text:
-#CHECK: _start:
+#CHECK: <_start>:
#CHECK: 210158: 40 d0 3b d5 mrs x0, TPIDR_EL0
#CHECK: 21015c: 00 00 40 91 add x0, x0, #0, lsl #12
#CHECK: 210160: 00 40 00 91 add x0, x0, #16
diff --git a/lld/test/ELF/aarch64-tlsld-ldst.s b/lld/test/ELF/aarch64-tlsld-ldst.s
index f409fa58d1b6..ef96d071bd63 100644
--- a/lld/test/ELF/aarch64-tlsld-ldst.s
+++ b/lld/test/ELF/aarch64-tlsld-ldst.s
@@ -24,7 +24,7 @@ _start: mrs x8, TPIDR_EL0
add x8, x8, :tprel_hi12:var4
ldrb w0, [x8, :tprel_lo12_nc:var4]
-// CHECK: _start:
+// CHECK: <_start>:
// CHECK-NEXT: 210158: mrs x8, TPIDR_EL0
// 0x0 + c10 = 0xc10 = tcb (16-bytes) + var0
// CHECK-NEXT: 21015c: add x8, x8, #0, lsl #12
diff --git a/lld/test/ELF/aarch64-tstbr14-reloc.s b/lld/test/ELF/aarch64-tstbr14-reloc.s
index 9601ad3c786b..94ed45a19b60 100644
--- a/lld/test/ELF/aarch64-tstbr14-reloc.s
+++ b/lld/test/ELF/aarch64-tstbr14-reloc.s
@@ -7,16 +7,16 @@
# RUN: llvm-objdump -d --no-show-raw-insn %t3 | FileCheck -check-prefix=DSO %s
# RUN: llvm-readobj -S -r %t3 | FileCheck -check-prefix=DSOREL %s
-# CHECK: _foo:
+# CHECK: <_foo>:
# CHECK-NEXT: 210120: nop
# CHECK-NEXT: 210124: nop
# CHECK-NEXT: 210128: nop
# CHECK-NEXT: 21012c: nop
-# CHECK: _bar:
+# CHECK: <_bar>:
# CHECK-NEXT: 210130: nop
# CHECK-NEXT: 210134: nop
# CHECK-NEXT: 210138: nop
-# CHECK: _start:
+# CHECK: <_start>:
# CHECK-NEXT: 21013c: tbnz w3, #15, #-28 <_foo>
# CHECK-NEXT: 210140: tbnz w3, #15, #-16 <_bar>
# CHECK-NEXT: 210144: tbz x6, #45, #-36 <_foo>
@@ -47,16 +47,16 @@
#DSO: Disassembly of section .text:
#DSO-EMPTY:
-#DSO-NEXT: _foo:
+#DSO-NEXT: <_foo>:
#DSO-NEXT: 102f8: nop
#DSO-NEXT: 102fc: nop
#DSO-NEXT: 10300: nop
#DSO-NEXT: 10304: nop
-#DSO: _bar:
+#DSO: <_bar>:
#DSO-NEXT: 10308: nop
#DSO-NEXT: 1030c: nop
#DSO-NEXT: 10310: nop
-#DSO: _start:
+#DSO: <_start>:
#DSO-NEXT: 10314: tbnz w3, #15, #60 <_foo at plt>
#DSO-NEXT: 10318: tbnz w3, #15, #72 <_bar at plt>
#DSO-NEXT: 1031c: tbz x6, #45, #52 <_foo at plt>
@@ -64,7 +64,7 @@
#DSO-EMPTY:
#DSO-NEXT: Disassembly of section .plt:
#DSO-EMPTY:
-#DSO-NEXT: .plt:
+#DSO-NEXT: <.plt>:
#DSO-NEXT: 10330: stp x16, x30, [sp, #-16]!
#DSO-NEXT: 10334: adrp x16, #131072
#DSO-NEXT: 10338: ldr x17, [x16, #1072]
@@ -74,13 +74,13 @@
#DSO-NEXT: 10348: nop
#DSO-NEXT: 1034c: nop
#DSO-EMPTY:
-#DSO-NEXT: _foo at plt:
+#DSO-NEXT: <_foo at plt>:
#DSO-NEXT: 10350: adrp x16, #131072
#DSO-NEXT: 10354: ldr x17, [x16, #1080]
#DSO-NEXT: 10358: add x16, x16, #1080
#DSO-NEXT: 1035c: br x17
#DSO-EMPTY:
-#DSO-NEXT: _bar at plt:
+#DSO-NEXT: <_bar at plt>:
#DSO-NEXT: 10360: adrp x16, #131072
#DSO-NEXT: 10364: ldr x17, [x16, #1088]
#DSO-NEXT: 10368: add x16, x16, #1088
diff --git a/lld/test/ELF/aarch64-undefined-weak.s b/lld/test/ELF/aarch64-undefined-weak.s
index 902796b73880..3261daf5892a 100644
--- a/lld/test/ELF/aarch64-undefined-weak.s
+++ b/lld/test/ELF/aarch64-undefined-weak.s
@@ -36,7 +36,7 @@ _start:
// CHECK: Disassembly of section .text:
// CHECK-EMPTY:
-// CHECK-NEXT: 0000000010010120 _start:
+// CHECK-NEXT: 0000000010010120 <_start>:
// CHECK-NEXT: 10010120: b #4
// CHECK-NEXT: 10010124: bl #4
// CHECK-NEXT: 10010128: b.eq #4
diff --git a/lld/test/ELF/allow-multiple-definition.s b/lld/test/ELF/allow-multiple-definition.s
index fac5986cc300..aa151d827c95 100644
--- a/lld/test/ELF/allow-multiple-definition.s
+++ b/lld/test/ELF/allow-multiple-definition.s
@@ -20,10 +20,10 @@
# If flag allow-multiple-definition is enabled the first
# meet symbol should be used.
-# CHECK: _bar:
+# CHECK: <_bar>:
# CHECK-NEXT: movl $1, %eax
-# REVERT: _bar:
+# REVERT: <_bar>:
# REVERT-NEXT: movl $2, %eax
.globl _bar
diff --git a/lld/test/ELF/arm-bl-v6-inrange.s b/lld/test/ELF/arm-bl-v6-inrange.s
index f6d9f16f8895..d4f81f855a73 100644
--- a/lld/test/ELF/arm-bl-v6-inrange.s
+++ b/lld/test/ELF/arm-bl-v6-inrange.s
@@ -28,12 +28,12 @@ thumbfunc:
bx lr
// CHECK: Disassembly of section .callee1:
// CHECK-EMPTY:
-// CHECK-NEXT: thumbfunc:
+// CHECK-NEXT: <thumbfunc>:
// CHECK-NEXT: 100004: 70 47 bx lr
// CHECK-EMPTY:
// CHECK-NEXT: Disassembly of section .caller:
// CHECK-EMPTY:
-// CHECK-NEXT: _start:
+// CHECK-NEXT: <_start>:
// CHECK-NEXT: 500000: 00 f4 00 f8 bl #-4194304
// CHECK-NEXT: 500004: ff f3 fe ef blx #4194300
// CHECK-NEXT: 500008: 70 47 bx lr
@@ -46,5 +46,5 @@ armfunc:
bx lr
// CHECK: Disassembly of section .callee2:
// CHECK-EMPTY:
-// CHECK-NEXT: armfunc:
+// CHECK-NEXT: <armfunc>:
// CHECK-NEXT: 900004: 1e ff 2f e1 bx lr
diff --git a/lld/test/ELF/arm-bl-v6.s b/lld/test/ELF/arm-bl-v6.s
index 24af92469dcd..2f7f11ad5972 100644
--- a/lld/test/ELF/arm-bl-v6.s
+++ b/lld/test/ELF/arm-bl-v6.s
@@ -27,7 +27,7 @@ _start:
// CHECK-ARM1: Disassembly of section .text:
// CHECK-ARM1-EMPTY:
-// CHECK-ARM1-NEXT: _start:
+// CHECK-ARM1-NEXT: <_start>:
// CHECK-ARM1-NEXT: 12000: 00 00 00 fa blx #0 <thumbfunc>
// CHECK-ARM1-NEXT: 12004: 1e ff 2f e1 bx lr
.thumb
@@ -37,16 +37,16 @@ _start:
thumbfunc:
bl farthumbfunc
-// CHECK-THUMB1: thumbfunc:
+// CHECK-THUMB1: <thumbfunc>:
// CHECK-THUMB1-NEXT: 12008: 00 f2 00 e8 blx #2097152
// 6 Megabytes, enough to make farthumbfunc out of range of caller
// on a v6 Arm, but not on a v7 Arm.
.section .text.3, "ax", %progbits
.space 0x200000
-// CHECK-ARM2: __ARMv5ABSLongThunk_farthumbfunc:
+// CHECK-ARM2: <__ARMv5ABSLongThunk_farthumbfunc>:
// CHECK-ARM2-NEXT: 21200c: 04 f0 1f e5 ldr pc, [pc, #-4]
-// CHECK-ARM2: $d:
+// CHECK-ARM2: <$d>:
// CHECK-ARM2-NEXT: 212010: 01 30 61 00 .word 0x00613001
.section .text.4, "ax", %progbits
.space 0x200000
@@ -61,5 +61,5 @@ thumbfunc:
.type farthumbfunc,%function
farthumbfunc:
bx lr
-// CHECK-THUMB2: farthumbfunc:
+// CHECK-THUMB2: <farthumbfunc>:
// CHECK-THUMB2-NEXT: 613000: 70 47 bx lr
diff --git a/lld/test/ELF/arm-blx.s b/lld/test/ELF/arm-blx.s
index a6dbcbd80d5c..deb5544e13ea 100644
--- a/lld/test/ELF/arm-blx.s
+++ b/lld/test/ELF/arm-blx.s
@@ -74,19 +74,19 @@ callee_arm_high:
// CHECK: Disassembly of section .callee1:
// CHECK-EMPTY:
-// CHECK-NEXT: callee_low:
+// CHECK-NEXT: <callee_low>:
// CHECK-NEXT: b4: 70 47 bx lr
-// CHECK: callee_low2:
+// CHECK: <callee_low2>:
// CHECK-NEXT: b6: 70 47 bx lr
// CHECK: Disassembly of section .callee2:
// CHECK-EMPTY:
-// CHECK-NEXT: callee_arm_low:
+// CHECK-NEXT: <callee_arm_low>:
// CHECK-NEXT: 100: 1e ff 2f e1 bx lr
// CHECK: Disassembly of section .caller:
// CHECK-EMPTY:
-// CHECK-NEXT: _start:
+// CHECK-NEXT: <_start>:
// CHECK-NEXT: 10000: 2b c0 ff fa blx #-65364 <callee_low>
// CHECK-NEXT: 10004: 2a c0 ff fa blx #-65368 <callee_low>
// CHECK-NEXT: 10008: 29 c0 ff fb blx #-65370 <callee_low2>
@@ -107,12 +107,12 @@ callee_arm_high:
// CHECK: Disassembly of section .callee3:
// CHECK-EMPTY:
-// CHECK: callee_high:
+// CHECK: <callee_high>:
// CHECK-NEXT: 10100: 70 47 bx lr
-// CHECK: callee_high2:
+// CHECK: <callee_high2>:
// CHECK-NEXT: 10102: 70 47 bx lr
// CHECK: Disassembly of section .callee4:
// CHECK-EMPTY:
-// CHECK-NEXT: callee_arm_high:
+// CHECK-NEXT: <callee_arm_high>:
// CHECK-NEXT: 10200: 1e ff 2f e1 bx lr
diff --git a/lld/test/ELF/arm-branch-rangethunk.s b/lld/test/ELF/arm-branch-rangethunk.s
index aa39b744bfab..d00f446e554a 100644
--- a/lld/test/ELF/arm-branch-rangethunk.s
+++ b/lld/test/ELF/arm-branch-rangethunk.s
@@ -20,32 +20,32 @@ _start:
// SHORT: Disassembly of section .text:
// SHORT-EMPTY:
-// SHORT-NEXT: _start:
+// SHORT-NEXT: <_start>:
// SHORT-NEXT: 20000: 01 00 00 eb bl #4 <__ARMv7ABSLongThunk_too_far1>
// SHORT-NEXT: 20004: 01 00 00 ea b #4 <__ARMv7ABSLongThunk_too_far2>
// SHORT-NEXT: 20008: 01 00 00 0a beq #4 <__ARMv7ABSLongThunk_too_far3>
-// SHORT: __ARMv7ABSLongThunk_too_far1:
+// SHORT: <__ARMv7ABSLongThunk_too_far1>:
// SHORT-NEXT: 2000c: fd ff 7f ea b #33554420 <__ARMv7ABSLongThunk_too_far3+0x1fffff4>
-// SHORT: __ARMv7ABSLongThunk_too_far2:
+// SHORT: <__ARMv7ABSLongThunk_too_far2>:
// SHORT-NEXT: 20010: fd ff 7f ea b #33554420 <__ARMv7ABSLongThunk_too_far3+0x1fffff8>
-// SHORT: __ARMv7ABSLongThunk_too_far3:
+// SHORT: <__ARMv7ABSLongThunk_too_far3>:
// SHORT-NEXT: 20014: fd ff 7f ea b #33554420 <__ARMv7ABSLongThunk_too_far3+0x1fffffc>
// LONG: Disassembly of section .text:
// LONG-EMPTY:
-// LONG-NEXT: _start:
+// LONG-NEXT: <_start>:
// LONG-NEXT: 20000: 01 00 00 eb bl #4 <__ARMv7ABSLongThunk_too_far1>
// LONG-NEXT: 20004: 03 00 00 ea b #12 <__ARMv7ABSLongThunk_too_far2>
// LONG-NEXT: 20008: 05 00 00 0a beq #20 <__ARMv7ABSLongThunk_too_far3>
-// LONG: __ARMv7ABSLongThunk_too_far1:
+// LONG: <__ARMv7ABSLongThunk_too_far1>:
// LONG-NEXT: 2000c: 14 c0 00 e3 movw r12, #20
// LONG-NEXT: 20010: 02 c2 40 e3 movt r12, #514
// LONG-NEXT: 20014: 1c ff 2f e1 bx r12
-// LONG: __ARMv7ABSLongThunk_too_far2:
+// LONG: <__ARMv7ABSLongThunk_too_far2>:
// LONG-NEXT: 20018: 20 c0 00 e3 movw r12, #32
// LONG-NEXT: 2001c: 02 c2 40 e3 movt r12, #514
// LONG-NEXT: 20020: 1c ff 2f e1 bx r12
-// LONG: __ARMv7ABSLongThunk_too_far3:
+// LONG: <__ARMv7ABSLongThunk_too_far3>:
// LONG-NEXT: 20024: 2c c0 00 e3 movw r12, #44
// LONG-NEXT: 20028: 02 c2 40 e3 movt r12, #514
// LONG-NEXT: 2002c: 1c ff 2f e1 bx r12
diff --git a/lld/test/ELF/arm-branch-undef-weak-plt-thunk.s b/lld/test/ELF/arm-branch-undef-weak-plt-thunk.s
index e25370b26471..bcf801371879 100644
--- a/lld/test/ELF/arm-branch-undef-weak-plt-thunk.s
+++ b/lld/test/ELF/arm-branch-undef-weak-plt-thunk.s
@@ -23,14 +23,14 @@ _start:
// CHECK: Disassembly of section .text:
// CHECK-EMPTY:
-// CHECK-NEXT: _start:
+// CHECK-NEXT: <_start>:
// CHECK-NEXT: 111e4: 00 00 00 ea b #0 <__ARMv7ABSLongThunk_undefined_weak_we_expect_a_plt_entry_for>
// CHECK-NEXT: 111e8: 02 00 00 eb bl #8 <__ARMv7ABSLongThunk_bar2>
-// CHECK: __ARMv7ABSLongThunk_undefined_weak_we_expect_a_plt_entry_for:
+// CHECK: <__ARMv7ABSLongThunk_undefined_weak_we_expect_a_plt_entry_for>:
// CHECK-NEXT: 111ec: 30 c2 01 e3 movw r12, #4656
// CHECK-NEXT: 111f0: 01 c2 40 e3 movt r12, #513
// CHECK-NEXT: 111f4: 1c ff 2f e1 bx r12
-// CHECK: __ARMv7ABSLongThunk_bar2:
+// CHECK: <__ARMv7ABSLongThunk_bar2>:
// CHECK-NEXT: 111f8: 40 c2 01 e3 movw r12, #4672
// CHECK-NEXT: 111fc: 01 c2 40 e3 movt r12, #513
// CHECK-NEXT: 11200: 1c ff 2f e1 bx r12
diff --git a/lld/test/ELF/arm-branch.s b/lld/test/ELF/arm-branch.s
index ca0908eca696..c20b575f2e9a 100644
--- a/lld/test/ELF/arm-branch.s
+++ b/lld/test/ELF/arm-branch.s
@@ -39,7 +39,7 @@ callee_high:
// CHECK: Disassembly of section .caller:
// CHECK-EMPTY:
-// CHECK-NEXT: _start:
+// CHECK-NEXT: <_start>:
// S(callee_low) = 0xb4 P = 0x10000 A = -8 = -0xff54 = -65364
// CHECK-NEXT: 10000: 2b c0 ff eb bl #-65364 <callee_low>
// S(callee_low) = 0xb4 P = 0x10004 A = -8 = -0xff58 = -65368
diff --git a/lld/test/ELF/arm-copy.s b/lld/test/ELF/arm-copy.s
index df5b2ee8235a..942825528289 100644
--- a/lld/test/ELF/arm-copy.s
+++ b/lld/test/ELF/arm-copy.s
@@ -66,7 +66,7 @@ _start:
// CODE: Disassembly of section .text:
// CODE-EMPTY:
-// CODE-NEXT: _start:
+// CODE-NEXT: <_start>:
// S + A = 0x13220 + 0 = 65536 * 1 + 12832
// CODE-NEXT: 111b4: movw r2, #12832
// CODE-NEXT: 111b8: movt r2, #1
diff --git a/lld/test/ELF/arm-exidx-canunwind.s b/lld/test/ELF/arm-exidx-canunwind.s
index 1c2f4f98bdf0..d701e208a053 100644
--- a/lld/test/ELF/arm-exidx-canunwind.s
+++ b/lld/test/ELF/arm-exidx-canunwind.s
@@ -54,17 +54,17 @@ _start:
// CHECK: Disassembly of section .text:
// CHECK-EMPTY:
-// CHECK-NEXT: _start:
+// CHECK-NEXT: <_start>:
// CHECK-NEXT: 11108: bl #4 <func1>
// CHECK-NEXT: bl #4 <func2>
// CHECK-NEXT: bx lr
-// CHECK: func1:
+// CHECK: <func1>:
// CHECK-NEXT: 11114: bx lr
-// CHECK: func2:
+// CHECK: <func2>:
// CHECK-NEXT: 11118: bx lr
-// CHECK: __gxx_personality_v0:
+// CHECK: <__gxx_personality_v0>:
// CHECK-NEXT: 1111c: bx lr
-// CHECK: __aeabi_unwind_cpp_pr0:
+// CHECK: <__aeabi_unwind_cpp_pr0>:
// CHECK-NEXT: 11120: bx lr
// 100d4 + 0x1034 = 0x11108 = main (linker generated cantunwind)
diff --git a/lld/test/ELF/arm-exidx-gc.s b/lld/test/ELF/arm-exidx-gc.s
index 2e0d969e2bbb..d50b90c4c56f 100644
--- a/lld/test/ELF/arm-exidx-gc.s
+++ b/lld/test/ELF/arm-exidx-gc.s
@@ -92,17 +92,17 @@ _start:
// sections
// CHECK: Disassembly of section .text:
// CHECK-EMPTY:
-// CHECK-NEXT: _start:
+// CHECK-NEXT: <_start>:
// CHECK-NEXT: 1110c: bl #4 <func1>
// CHECK-NEXT: 11110: bl #4 <func2>
// CHECK-NEXT: 11114: bx lr
-// CHECK: func1:
+// CHECK: <func1>:
// CHECK-NEXT: 11118: bx lr
-// CHECK: func2:
+// CHECK: <func2>:
// CHECK-NEXT: 1111c: bx lr
-// CHECK: __gxx_personality_v0:
+// CHECK: <__gxx_personality_v0>:
// CHECK-NEXT: 11120: bx lr
-// CHECK: __aeabi_unwind_cpp_pr0:
+// CHECK: <__aeabi_unwind_cpp_pr0>:
// CHECK-NEXT: 11124: bx lr
// GC should have removed table entries for unusedfunc1, unusedfunc2
diff --git a/lld/test/ELF/arm-exidx-order.s b/lld/test/ELF/arm-exidx-order.s
index ba7551a78842..40715c0c1a99 100644
--- a/lld/test/ELF/arm-exidx-order.s
+++ b/lld/test/ELF/arm-exidx-order.s
@@ -55,29 +55,29 @@ f3:
// CHECK: Disassembly of section .text:
// CHECK-EMPTY:
-// CHECK: _start:
+// CHECK: <_start>:
// CHECK-NEXT: 11124: bx lr
-// CHECK: f1:
+// CHECK: <f1>:
// CHECK-NEXT: 11128: bx lr
-// CHECK: f2:
+// CHECK: <f2>:
// CHECK-NEXT: 1112c: bx lr
-// CHECK: f3:
+// CHECK: <f3>:
// CHECK-NEXT: 11130: bx lr
-// CHECK: func4:
+// CHECK: <func4>:
// CHECK-NEXT: 11134: bx lr
-// CHECK: func5:
+// CHECK: <func5>:
// CHECK-NEXT: 11138: bx lr
// CHECK: Disassembly of section .func1:
// CHECK-EMPTY:
-// CHECK-NEXT: func1:
+// CHECK-NEXT: <func1>:
// CHECK-NEXT: 1113c: bx lr
// CHECK: Disassembly of section .func2:
// CHECK-EMPTY:
-// CHECK-NEXT: func2:
+// CHECK-NEXT: <func2>:
// CHECK-NEXT: 11140: bx lr
// CHECK: Disassembly of section .func3:
// CHECK-EMPTY:
-// CHECK-NEXT: func3:
+// CHECK-NEXT: <func3>:
// CHECK-NEXT: 11144: bx lr
// Each .ARM.exidx section has two 4 byte fields
@@ -133,32 +133,32 @@ f3:
// CHECK-SCRIPT: Disassembly of section .text:
// CHECK-SCRIPT-EMPTY:
-// CHECK-SCRIPT-NEXT: func4:
+// CHECK-SCRIPT-NEXT: <func4>:
// CHECK-SCRIPT-NEXT: 11000: 1e ff 2f e1 bx lr
-// CHECK-SCRIPT: func5:
+// CHECK-SCRIPT: <func5>:
// CHECK-SCRIPT-NEXT: 11004: 1e ff 2f e1 bx lr
-// CHECK-SCRIPT: _start:
+// CHECK-SCRIPT: <_start>:
// CHECK-SCRIPT-NEXT: 11008: 1e ff 2f e1 bx lr
-// CHECK-SCRIPT: f1:
+// CHECK-SCRIPT: <f1>:
// CHECK-SCRIPT-NEXT: 1100c: 1e ff 2f e1 bx lr
-// CHECK-SCRIPT: f2:
+// CHECK-SCRIPT: <f2>:
// CHECK-SCRIPT-NEXT: 11010: 1e ff 2f e1 bx lr
-// CHECK-SCRIPT: f3:
+// CHECK-SCRIPT: <f3>:
// CHECK-SCRIPT-NEXT: 11014: 1e ff 2f e1 bx lr
// CHECK-SCRIPT-EMPTY:
// CHECK-SCRIPT-NEXT: Disassembly of section .func1:
// CHECK-SCRIPT-EMPTY:
-// CHECK-SCRIPT-NEXT: func1:
+// CHECK-SCRIPT-NEXT: <func1>:
// CHECK-SCRIPT-NEXT: 11018: 1e ff 2f e1 bx lr
// CHECK-SCRIPT-EMPTY:
// CHECK-SCRIPT-NEXT: Disassembly of section .func2:
// CHECK-SCRIPT-EMPTY:
-// CHECK-SCRIPT-NEXT: func2:
+// CHECK-SCRIPT-NEXT: <func2>:
// CHECK-SCRIPT-NEXT: 1101c: 1e ff 2f e1 bx lr
// CHECK-SCRIPT-EMPTY:
// CHECK-SCRIPT-NEXT: Disassembly of section .func3:
// CHECK-SCRIPT-EMPTY:
-// CHECK-SCRIPT-NEXT: func3:
+// CHECK-SCRIPT-NEXT: <func3>:
// CHECK-SCRIPT-NEXT: 11020: 1e ff 2f e1 bx lr
// Check that the .ARM.exidx section is sorted in order as the functions
diff --git a/lld/test/ELF/arm-extreme-range-pi-thunk.s b/lld/test/ELF/arm-extreme-range-pi-thunk.s
index 16e6009afa58..84941663d93d 100644
--- a/lld/test/ELF/arm-extreme-range-pi-thunk.s
+++ b/lld/test/ELF/arm-extreme-range-pi-thunk.s
@@ -33,11 +33,11 @@ high:
// CHECK: Disassembly of section .text_low:
// CHECK-EMPTY:
-// CHECK-NEXT: _start:
+// CHECK-NEXT: <_start>:
// CHECK-NEXT: 130: bl #0 <__ARMV7PILongThunk_high>
// CHECK-NEXT: 134: bx lr
-// CHECK: __ARMV7PILongThunk_high:
+// CHECK: <__ARMV7PILongThunk_high>:
// CHECK-NEXT: 138: movw r12, #65208
// CHECK-NEXT: 13c: movt r12, #61439
// 0x140 + 0xEFFF0000 + 0x0000FEB8 + 8 = 0xf0000000 = high
@@ -46,11 +46,11 @@ high:
// CHECK: Disassembly of section .text_high:
// CHECK-EMPTY:
-// CHECK-NEXT: high:
+// CHECK-NEXT: <high>:
// CHECK-NEXT: f0000000: bl #0 <__ARMV7PILongThunk__start>
// CHECK-NEXT: f0000004: bx lr
-// CHECK: __ARMV7PILongThunk__start:
+// CHECK: <__ARMV7PILongThunk__start>:
// CHECK-NEXT: f0000008: movw r12, #280
// CHECK-NEXT: f000000c: movt r12, #4096
// 0xf0000010 + 0x10000000 + 0x0000118 + 8 = bits32(0x100000130),0x130 = _start
@@ -60,12 +60,12 @@ high:
// Thumbv7a instructions and relocations
// CHECK-THUMB: Disassembly of section .text_low:
// CHECK-THUMB-EMPTY:
-// CHECK-THUMB-NEXT: _start:
+// CHECK-THUMB-NEXT: <_start>:
// CHECK-THUMB-NEXT: 130: bl #4
// CHECK-THUMB-NEXT: 134: bx lr
// CHECK-THUMB-NEXT: 136: bmi #-88
-// CHECK-THUMB: __ThumbV7PILongThunk_high:
+// CHECK-THUMB: <__ThumbV7PILongThunk_high>:
// CHECK-THUMB-NEXT: 138: movw r12, #65213
// CHECK-THUMB-NEXT: 13c: movt r12, #61439
// 0x140 + 0xEFFF0000 + 0x0000FEBD + 4 = 0xf0000001 = high
@@ -74,11 +74,11 @@ high:
// CHECK-THUMB: Disassembly of section .text_high:
// CHECK-THUMB-EMPTY:
-// CHECK-THUMB-NEXT: high:
+// CHECK-THUMB-NEXT: <high>:
// CHECK-THUMB-NEXT: f0000000: bl #4
// CHECK-THUMB-NEXT: f0000004: bx lr
-// CHECK-THUMB: __ThumbV7PILongThunk__start:
+// CHECK-THUMB: <__ThumbV7PILongThunk__start>:
// CHECK-THUMB-NEXT: f0000008: movw r12, #285
// CHECK-THUMB-NEXT: f000000c: movt r12, #4096
// 0xf0000010 + 0x10000000 + 0x000011d +4 = bits32(0x100000131),0x131 = _start
diff --git a/lld/test/ELF/arm-fix-cortex-a8-blx.s b/lld/test/ELF/arm-fix-cortex-a8-blx.s
index bb3417bf0c94..8de8de187ea5 100644
--- a/lld/test/ELF/arm-fix-cortex-a8-blx.s
+++ b/lld/test/ELF/arm-fix-cortex-a8-blx.s
@@ -29,5 +29,5 @@ _start:
// CHECK-PATCH: 12ffa: nop.w
// CHECK-PATCH-NEXT: 12ffe: blx #4
-// CHECK-PATCH: 00013004 __CortexA8657417_12FFE:
+// CHECK-PATCH: 00013004 <__CortexA8657417_12FFE>:
// CHECK-PATCH-NEXT: 13004: b #-4104
diff --git a/lld/test/ELF/arm-fix-cortex-a8-nopatch.s b/lld/test/ELF/arm-fix-cortex-a8-nopatch.s
index 97ef29f55fe6..76bcb3e165f7 100644
--- a/lld/test/ELF/arm-fix-cortex-a8-nopatch.s
+++ b/lld/test/ELF/arm-fix-cortex-a8-nopatch.s
@@ -27,7 +27,7 @@ target:
b.w target
b.w target
-// CALLSITE1: 00012ffa target:
+// CALLSITE1: 00012ffa <target>:
// CALLSITE1-NEXT: 12ffa: b.w #-4
// CALLSITE1-NEXT: 12ffe: b.w #-8
@@ -40,7 +40,7 @@ target2:
nop
bl target2
-// CALLSITE2: 00013ffa target2:
+// CALLSITE2: 00013ffa <target2>:
// CALLSITE2-NEXT: 13ffa: nop
// CALLSITE2-NEXT: 13ffc: nop
// CALLSITE2-NEXT: 13ffe: bl #-8
@@ -54,7 +54,7 @@ target3:
nop.w
beq.w target2
-// CALLSITE3: 00014ffa target3:
+// CALLSITE3: 00014ffa <target3>:
// CALLSITE3-NEXT: 14ffa: nop.w
// CALLSITE3-NEXT: 14ffe: beq.w #-4104
@@ -69,10 +69,10 @@ source4:
target4:
nop.w
-// CALLSITE4: 00015ffa source4:
+// CALLSITE4: 00015ffa <source4>:
// CALLSITE4-NEXT: 15ffa: nop.w
// CALLSITE4-NEXT: 15ffe: beq.w #0
-// CALLSITE4: 00016002 target4:
+// CALLSITE4: 00016002 <target4>:
// CALLSITE4-NEXT: 16002: nop.w
.space 4084
@@ -89,7 +89,7 @@ target5:
source5:
beq.w target5
-// CALLSITE5: 00016ffe source5:
+// CALLSITE5: 00016ffe <source5>:
// CALLSITE5-NEXT: 16ffe: beq.w #-8
/// Edge case where two word sequence starts at offset 0xffc, check that
@@ -104,7 +104,7 @@ source5:
target6:
bl target6
-// CALLSITE6: 00018000 target6:
+// CALLSITE6: 00018000 <target6>:
// CALLSITE6-NEXT: 18000: bl #-4
/// Edge case where two word sequence starts at offset 0xffe, check that
@@ -119,5 +119,5 @@ target6:
target7:
bl target7
-// CALLSITE7: 00019002 target7:
+// CALLSITE7: 00019002 <target7>:
// CALLSITE7: 19002: bl #-4
diff --git a/lld/test/ELF/arm-fix-cortex-a8-plt.s b/lld/test/ELF/arm-fix-cortex-a8-plt.s
index ba7c3f94b159..183aa6f1ce51 100644
--- a/lld/test/ELF/arm-fix-cortex-a8-plt.s
+++ b/lld/test/ELF/arm-fix-cortex-a8-plt.s
@@ -32,8 +32,8 @@ source:
nop.w
bl external
-// CHECK: 00002ffa source:
+// CHECK: 00002ffa <source>:
// CHECK-NEXT: 2ffa: nop.w
// CHECK-NEXT: 2ffe: blx #4
-// CHECK: 00003004 __CortexA8657417_2FFE:
+// CHECK: 00003004 <__CortexA8657417_2FFE>:
// CHECK-NEXT: 3004: b #-4076
diff --git a/lld/test/ELF/arm-fix-cortex-a8-recognize.s b/lld/test/ELF/arm-fix-cortex-a8-recognize.s
index d56ed1934efe..fb9ba3e45074 100644
--- a/lld/test/ELF/arm-fix-cortex-a8-recognize.s
+++ b/lld/test/ELF/arm-fix-cortex-a8-recognize.s
@@ -53,11 +53,11 @@ target:
nop.w
b.w target
-// CALLSITE1: 00012ffa target:
+// CALLSITE1: 00012ffa <target>:
// CALLSITE1-NEXT: 12ffa: nop.w
// CALLSITE1-NEXT: 12ffe: b.w #28674
/// Expect no patch when doing a relocatable link ld -r.
-// CHECK-RELOCATABLE: 00000ffa target:
+// CHECK-RELOCATABLE: 00000ffa <target>:
// CHECK-RELOCATABLE-NEXT: ffa: nop.w
// CHECK-RELOCATABLE-NEXT: ffe: b.w #-4
@@ -70,7 +70,7 @@ target2:
nop.w
bl target2
-// CALLSITE2: 00013ffa target2:
+// CALLSITE2: 00013ffa <target2>:
// CALLSITE2-NEXT: 13ffa: nop.w
// CALLSITE2-NEXT: 13ffe: bl #24582
@@ -83,7 +83,7 @@ target3:
nop.w
beq.w target3
-// CALLSITE3: 00014ffa target3:
+// CALLSITE3: 00014ffa <target3>:
// CALLSITE3-NEXT: 14ffa: nop.w
// CALLSITE3-NEXT: 14ffe: beq.w #20490
@@ -102,7 +102,7 @@ target4:
blx target4
/// Target = 0x19010 __CortexA8657417_15FFE
-// CALLSITE4: 00015ff4 target4:
+// CALLSITE4: 00015ff4 <target4>:
// CALLSITE4-NEXT: 15ff4: bx lr
// CALLSITE4: 15ff8: 00 00 .short 0x0000
// CALLSITE4: 15ffa: nop.w
@@ -180,32 +180,32 @@ target8:
nop.w
bl target8
-// CALLSITE8: 00019ff4 target8:
+// CALLSITE8: 00019ff4 <target8>:
// CALLSITE8-NEXT: 19ff4: bx lr
// CALLSITE8: 19ff8: 00 00 .short 0x0000
// CALLSITE8: 19ffa: nop.w
// CALLSITE8-NEXT: 19ffe: blx #32
-// CHECK-PATCHES: 0001a004 __CortexA8657417_12FFE:
+// CHECK-PATCHES: 0001a004 <__CortexA8657417_12FFE>:
// CHECK-PATCHES-NEXT: 1a004: b.w #-28686
-// CHECK-PATCHES: 0001a008 __CortexA8657417_13FFE:
+// CHECK-PATCHES: 0001a008 <__CortexA8657417_13FFE>:
// CHECK-PATCHES-NEXT: 1a008: b.w #-24594
-// CHECK-PATCHES: 0001a00c __CortexA8657417_14FFE:
+// CHECK-PATCHES: 0001a00c <__CortexA8657417_14FFE>:
// CHECK-PATCHES-NEXT: 1a00c: b.w #-20502
-// CHECK-PATCHES: 0001a010 __CortexA8657417_15FFE:
+// CHECK-PATCHES: 0001a010 <__CortexA8657417_15FFE>:
// CHECK-PATCHES-NEXT: 1a010: b #-16420
-// CHECK-PATCHES: 0001a014 __CortexA8657417_16FFE:
+// CHECK-PATCHES: 0001a014 <__CortexA8657417_16FFE>:
// CHECK-PATCHES-NEXT: 1a014: b.w #-16406
-// CHECK-PATCHES: 0001a018 __CortexA8657417_17FFE:
+// CHECK-PATCHES: 0001a018 <__CortexA8657417_17FFE>:
// CHECK-PATCHES-NEXT: 1a018: b.w #-12314
-// CHECK-PATCHES: 0001a01c __CortexA8657417_18FFE:
+// CHECK-PATCHES: 0001a01c <__CortexA8657417_18FFE>:
// CHECK-PATCHES-NEXT: 1a01c: b.w #-8222
-// CHECK-PATCHES: 0001a020 __CortexA8657417_19FFE:
+// CHECK-PATCHES: 0001a020 <__CortexA8657417_19FFE>:
// CHECK-PATCHES-NEXT: 1a020: b #-52
diff --git a/lld/test/ELF/arm-fix-cortex-a8-thunk-align.s b/lld/test/ELF/arm-fix-cortex-a8-thunk-align.s
index 49b95d503c57..12485297dbb1 100644
--- a/lld/test/ELF/arm-fix-cortex-a8-thunk-align.s
+++ b/lld/test/ELF/arm-fix-cortex-a8-thunk-align.s
@@ -22,12 +22,12 @@ thumb_target:
b.w thumb_target
/// Expect thunk and patch to be inserted here
-// CHECK: 00003004 __ThumbV7PILongThunk_arm_func:
+// CHECK: 00003004 <__ThumbV7PILongThunk_arm_func>:
// CHECK-NEXT: 3004: movw r12, #4088
// CHECK-NEXT: movt r12, #256
// CHECK-NEXT: add r12, pc
// CHECK-NEXT: bx r12
-// CHECK: 00004004 __CortexA8657417_2FFE:
+// CHECK: 00004004 <__CortexA8657417_2FFE>:
// CHECK-NEXT: 4004: b.w #-8196
.section .text.02
/// Take us over thunk section spacing
diff --git a/lld/test/ELF/arm-fix-cortex-a8-thunk.s b/lld/test/ELF/arm-fix-cortex-a8-thunk.s
index 544e82cb0489..c5d77e078b06 100644
--- a/lld/test/ELF/arm-fix-cortex-a8-thunk.s
+++ b/lld/test/ELF/arm-fix-cortex-a8-thunk.s
@@ -25,7 +25,7 @@ early:
_start:
beq.w far_away
/// Thunk to far_away and state change needed, size 12-bytes goes here.
-// CHECK: 00110004 __ThumbV7PILongThunk_far_away:
+// CHECK: 00110004 <__ThumbV7PILongThunk_far_away>:
// CHECK-NEXT: 110004: movw r12, #65524
// CHECK-NEXT: movt r12, #15
// CHECK-NEXT: add r12, pc
@@ -43,14 +43,14 @@ target:
bl target
/// Expect erratum patch inserted here
-// CHECK: 00110ffa target:
+// CHECK: 00110ffa <target>:
// CHECK-NEXT: 110ffa: nop.w
// CHECK-NEXT: bl #2
-// CHECK: 00111004 __CortexA8657417_110FFE:
+// CHECK: 00111004 <__CortexA8657417_110FFE>:
// CHECK-NEXT: 111004: b.w #-14
/// Expect range extension thunk here.
-// CHECK: 00111008 __ThumbV7PILongThunk_early:
+// CHECK: 00111008 <__ThumbV7PILongThunk_early>:
// CHECK-NEXT: 111008: b.w #-1048582
.section .text.04, "ax", %progbits
diff --git a/lld/test/ELF/arm-force-pi-thunk.s b/lld/test/ELF/arm-force-pi-thunk.s
index 185c2428401c..3b7b2976cc58 100644
--- a/lld/test/ELF/arm-force-pi-thunk.s
+++ b/lld/test/ELF/arm-force-pi-thunk.s
@@ -32,23 +32,23 @@ low_target2:
// CHECK: Disassembly of section .text_low:
// CHECK-EMPTY:
-// CHECK-NEXT: _start:
+// CHECK-NEXT: <_start>:
// CHECK-NEXT: 94: 70 47 bx lr
-// CHECK: low_target:
+// CHECK: <low_target>:
// CHECK-NEXT: 96: 00 f0 03 f8 bl #6
// CHECK-NEXT: 9a: 00 f0 07 f8 bl #14
// CHECK-NEXT: 9e: d4 d4 bmi #-88
-// CHECK: __ThumbV7PILongThunk_high_target:
+// CHECK: <__ThumbV7PILongThunk_high_target>:
// CHECK-NEXT: a0: 4f f6 55 7c movw r12, #65365
// CHECK-NEXT: a4: c0 f2 ff 1c movt r12, #511
// CHECK-NEXT: a8: fc 44 add r12, pc
// CHECK-NEXT: aa: 60 47 bx r12
-// CHECK: __ThumbV7PILongThunk_high_target2:
+// CHECK: <__ThumbV7PILongThunk_high_target2>:
// CHECK-NEXT: ac: 4f f6 69 7c movw r12, #65385
// CHECK-NEXT: b0: c0 f2 ff 1c movt r12, #511
// CHECK-NEXT: b4: fc 44 add r12, pc
// CHECK-NEXT: b6: 60 47 bx r12
-// CHECK: low_target2:
+// CHECK: <low_target2>:
// CHECK-NEXT: b8: ff f7 f2 ff bl #-28
// CHECK-NEXT: bc: ff f7 f6 ff bl #-20
@@ -71,19 +71,19 @@ high_target2:
// CHECK: Disassembly of section .text_high:
// CHECK-EMPTY:
-// CHECK-NEXT: high_target:
+// CHECK-NEXT: <high_target>:
// CHECK-NEXT: 2000000: 00 f0 02 f8 bl #4
// CHECK-NEXT: 2000004: 00 f0 06 f8 bl #12
-// CHECK: __ThumbV7PILongThunk_low_target:
+// CHECK: <__ThumbV7PILongThunk_low_target>:
// CHECK-NEXT: 2000008: 40 f2 83 0c movw r12, #131
// CHECK-NEXT: 200000c: cf f6 00 6c movt r12, #65024
// CHECK-NEXT: 2000010: fc 44 add r12, pc
// CHECK-NEXT: 2000012: 60 47 bx r12
-// CHECK: __ThumbV7PILongThunk_low_target2:
+// CHECK: <__ThumbV7PILongThunk_low_target2>:
// CHECK-NEXT: 2000014: 40 f2 99 0c movw r12, #153
// CHECK-NEXT: 2000018: cf f6 00 6c movt r12, #65024
// CHECK-NEXT: 200001c: fc 44 add r12, pc
// CHECK-NEXT: 200001e: 60 47 bx r12
-// CHECK: high_target2:
+// CHECK: <high_target2>:
// CHECK-NEXT: 2000020: ff f7 f2 ff bl #-28
// CHECK-NEXT: 2000024: ff f7 f6 ff bl #-20
diff --git a/lld/test/ELF/arm-fpic-got.s b/lld/test/ELF/arm-fpic-got.s
index 179e011ea1d5..e89a4aa3db7a 100644
--- a/lld/test/ELF/arm-fpic-got.s
+++ b/lld/test/ELF/arm-fpic-got.s
@@ -54,11 +54,11 @@ val:
// CODE: Disassembly of section .text:
// CODE-EMPTY:
-// CODE-NEXT: _start:
+// CODE-NEXT: <_start>:
// CODE-NEXT: 11114: ldr r0, [pc, #8]
// CODE-NEXT: 11118: ldr r0, [pc, r0]
// CODE-NEXT: 1111c: ldr r0, [r0]
// CODE-NEXT: 11120: bx lr
-// CODE: $d.1:
+// CODE: <$d.1>:
// 0x11124 + 0x1008 + 8 = 0x12128 = .got
// CODE-NEXT: 11124: 08 10 00 00
diff --git a/lld/test/ELF/arm-gnu-ifunc-plt.s b/lld/test/ELF/arm-gnu-ifunc-plt.s
index a8b3c9de63d9..c9119a2dbaee 100644
--- a/lld/test/ELF/arm-gnu-ifunc-plt.s
+++ b/lld/test/ELF/arm-gnu-ifunc-plt.s
@@ -30,14 +30,14 @@
// DISASM: Disassembly of section .text:
// DISASM-EMPTY:
-// DISASM-NEXT: foo:
+// DISASM-NEXT: <foo>:
// DISASM-NEXT: 111dc: bx lr
-// DISASM: bar:
+// DISASM: <bar>:
// DISASM-NEXT: 111e0: bx lr
-// DISASM: _start:
+// DISASM: <_start>:
// DISASM-NEXT: 111e4: bl #84
// DISASM-NEXT: 111e8: bl #96
-// DISASM: $d.1:
+// DISASM: <$d.1>:
// DISASM-NEXT: 111ec: 00 00 00 00 .word 0x00000000
// DISASM-NEXT: 111f0: 04 00 00 00 .word 0x00000004
// DISASM: 111f4: bl #36
@@ -45,39 +45,39 @@
// DISASM-EMPTY:
// DISASM-NEXT: Disassembly of section .plt:
// DISASM-EMPTY:
-// DISASM-NEXT: $a:
+// DISASM-NEXT: <$a>:
// DISASM-NEXT: 11200: str lr, [sp, #-4]!
// DISASM-NEXT: 11204: add lr, pc, #0, #12
// DISASM-NEXT: 11208: add lr, lr, #8192
// DISASM-NEXT: 1120c: ldr pc, [lr, #236]!
-// DISASM: $d:
+// DISASM: <$d>:
// DISASM-NEXT: 11210: d4 d4 d4 d4 .word 0xd4d4d4d4
// DISASM-NEXT: 11214: d4 d4 d4 d4 .word 0xd4d4d4d4
// DISASM-NEXT: 11218: d4 d4 d4 d4 .word 0xd4d4d4d4
// DISASM-NEXT: 1121c: d4 d4 d4 d4 .word 0xd4d4d4d4
-// DISASM: $a:
+// DISASM: <$a>:
// DISASM-NEXT: 11220: add r12, pc, #0, #12
// DISASM-NEXT: 11224: add r12, r12, #8192
// DISASM-NEXT: 11228: ldr pc, [r12, #212]!
-// DISASM: $d:
+// DISASM: <$d>:
// DISASM-NEXT: 1122c: d4 d4 d4 d4 .word 0xd4d4d4d4
-// DISASM: $a:
+// DISASM: <$a>:
// DISASM-NEXT: 11230: add r12, pc, #0, #12
// DISASM-NEXT: 11234: add r12, r12, #8192
// DISASM-NEXT: 11238: ldr pc, [r12, #200]!
-// DISASM: $d:
+// DISASM: <$d>:
// DISASM-NEXT: 1123c: d4 d4 d4 d4 .word 0xd4d4d4d4
-// DISASM: $a:
+// DISASM: <$a>:
// DISASM-NEXT: 11240: add r12, pc, #0, #12
// DISASM-NEXT: 11244: add r12, r12, #4096
// DISASM-NEXT: 11248: ldr pc, [r12, #160]!
-// DISASM: $d:
+// DISASM: <$d>:
// DISASM-NEXT: 1124c: d4 d4 d4 d4 .word 0xd4d4d4d4
-// DISASM: $a:
+// DISASM: <$a>:
// DISASM-NEXT: 11250: add r12, pc, #0, #12
// DISASM-NEXT: 11254: add r12, r12, #4096
// DISASM-NEXT: 11258: ldr pc, [r12, #148]!
-// DISASM: $d:
+// DISASM: <$d>:
// DISASM-NEXT: 1125c: d4 d4 d4 d4 .word 0xd4d4d4d4
.syntax unified
diff --git a/lld/test/ELF/arm-gnu-ifunc.s b/lld/test/ELF/arm-gnu-ifunc.s
index c0ab54e893c9..c790c6d86bd5 100644
--- a/lld/test/ELF/arm-gnu-ifunc.s
+++ b/lld/test/ELF/arm-gnu-ifunc.s
@@ -114,11 +114,11 @@ _start:
// DISASM: Disassembly of section .text:
// DISASM-EMPTY:
-// DISASM-NEXT: foo:
+// DISASM-NEXT: <foo>:
// DISASM-NEXT: 11104: bx lr
-// DISASM: bar:
+// DISASM: <bar>:
// DISASM-NEXT: 11108: bx lr
-// DISASM: _start:
+// DISASM: <_start>:
// DISASM-NEXT: 1110c: bl #28
// DISASM-NEXT: 11110: bl #40
// 1 * 65536 + 244 = 0x100f4 __rel_iplt_start
@@ -130,16 +130,16 @@ _start:
// DISASM-EMPTY:
// DISASM-NEXT: Disassembly of section .iplt:
// DISASM-EMPTY:
-// DISASM-NEXT: $a:
+// DISASM-NEXT: <$a>:
// DISASM-NEXT: 11130: add r12, pc, #0, #12
// DISASM-NEXT: 11134: add r12, r12, #4096
// DISASM-NEXT: 11138: ldr pc, [r12, #24]!
-// DISASM: $d:
+// DISASM: <$d>:
// DISASM-NEXT: 1113c: d4 d4 d4 d4 .word 0xd4d4d4d4
-// DISASM: $a:
+// DISASM: <$a>:
// DISASM-NEXT: 11140: add r12, pc, #0, #12
// DISASM-NEXT: 11144: add r12, r12, #4096
// DISASM-NEXT: 11148: ldr pc, [r12, #12]!
-// DISASM: $d:
+// DISASM: <$d>:
// DISASM-NEXT: 1114c: d4 d4 d4 d4 .word 0xd4d4d4d4
diff --git a/lld/test/ELF/arm-got-relative.s b/lld/test/ELF/arm-got-relative.s
index 4f86863dc3fb..cef7aee4fc09 100644
--- a/lld/test/ELF/arm-got-relative.s
+++ b/lld/test/ELF/arm-got-relative.s
@@ -42,12 +42,12 @@ function:
// CODE: Disassembly of section .text:
// CODE-EMPTY:
-// CODE-NEXT: _start:
+// CODE-NEXT: <_start>:
// CODE-NEXT: 11a0: 08 30 9f e5 ldr r3, [pc, #8]
// CODE-NEXT: 11a4: 08 20 9f e5 ldr r2, [pc, #8]
// CODE-NEXT: 11a8: 03 00 8f e0 add r0, pc, r3
// CODE-NEXT: 11ac: 1e ff 2f e1 bx lr
-// CODE:$d.1:
+// CODE: <$d.1>:
// (_GLOBAL_OFFSET_TABLE_ = 0x220c) - (0x11a8 + 8) = 0x105c
// CODE-NEXT: 11b0: 5c 10 00 00
// (Got(function) - GotBase = 0x0
diff --git a/lld/test/ELF/arm-icf-exidx.s b/lld/test/ELF/arm-icf-exidx.s
index 593491f83310..459faf5d647f 100644
--- a/lld/test/ELF/arm-icf-exidx.s
+++ b/lld/test/ELF/arm-icf-exidx.s
@@ -27,8 +27,8 @@ __aeabi_unwind_cpp_pr0:
// CHECK: Disassembly of section .text:
// CHECK-EMPTY:
-// CHECK-NEXT: g:
+// CHECK-NEXT: <g>:
// CHECK-NEXT: 110ec: 1e ff 2f e1 bx lr
-// CHECK: __aeabi_unwind_cpp_pr0:
+// CHECK: <__aeabi_unwind_cpp_pr0>:
// CHECK-NEXT: 110f0: 00 f0 20 e3 nop
// CHECK-NEXT: 110f4: 1e ff 2f e1 bx lr
diff --git a/lld/test/ELF/arm-long-thunk-converge.s b/lld/test/ELF/arm-long-thunk-converge.s
index f241a585676d..679258e31670 100644
--- a/lld/test/ELF/arm-long-thunk-converge.s
+++ b/lld/test/ELF/arm-long-thunk-converge.s
@@ -5,22 +5,22 @@
// RUN: llvm-objdump -d -start-address=0x02000000 -stop-address=0x02000010 -triple=armv7a-linux-gnueabihf %t2 | FileCheck --check-prefix=CHECK2 %s
// RUN: rm -f %t2
-// CHECK1: __ARMv7ABSLongThunk_bar:
+// CHECK1: <__ARMv7ABSLongThunk_bar>:
// CHECK1-NEXT: 0: 0c c0 00 e3 movw r12, #12
// CHECK1-NEXT: 4: 00 c2 40 e3 movt r12, #512
// CHECK1-NEXT: 8: 1c ff 2f e1 bx r12
-// CHECK1: foo:
+// CHECK1: <foo>:
// CHECK1-NEXT: c: fb ff ff eb bl #-20
.section .foo,"ax",%progbits,unique,1
foo:
bl bar
-// CHECK2: __ARMv7ABSLongThunk_foo:
+// CHECK2: <__ARMv7ABSLongThunk_foo>:
// CHECK2-NEXT: 2000000: 0c c0 00 e3 movw r12, #12
// CHECK2-NEXT: 2000004: 00 c0 40 e3 movt r12, #0
// CHECK2-NEXT: 2000008: 1c ff 2f e1 bx r12
-// CHECK2: bar:
+// CHECK2: <bar>:
// CHECK2-NEXT: 200000c: fb ff ff eb bl #-20 <__ARMv7ABSLongThunk_foo>
.section .bar,"ax",%progbits,unique,1
diff --git a/lld/test/ELF/arm-plt-reloc.s b/lld/test/ELF/arm-plt-reloc.s
index a2e276290a36..1bc7383478ef 100644
--- a/lld/test/ELF/arm-plt-reloc.s
+++ b/lld/test/ELF/arm-plt-reloc.s
@@ -21,13 +21,13 @@ _start:
// Executable, expect no PLT
// CHECK: Disassembly of section .text:
// CHECK-EMPTY:
-// CHECK-NEXT: func1:
+// CHECK-NEXT: <func1>:
// CHECK-NEXT: 110b4: bx lr
-// CHECK: func2:
+// CHECK: <func2>:
// CHECK-NEXT: 110b8: bx lr
-// CHECK: func3:
+// CHECK: <func3>:
// CHECK-NEXT: 110bc: bx lr
-// CHECK: _start:
+// CHECK: <_start>:
// CHECK-NEXT: 110c0: b #-20 <func1>
// CHECK-NEXT: 110c4: bl #-20 <func2>
// CHECK-NEXT: 110c8: beq #-20 <func3>
@@ -36,13 +36,13 @@ _start:
// The .got.plt and .plt displacement is small so we can use small PLT entries.
// DSO: Disassembly of section .text:
// DSO-EMPTY:
-// DSO-NEXT: func1:
+// DSO-NEXT: <func1>:
// DSO-NEXT: 1214: bx lr
-// DSO: func2:
+// DSO: <func2>:
// DSO-NEXT: 1218: bx lr
-// DSO: func3:
+// DSO: <func3>:
// DSO-NEXT: 121c: bx lr
-// DSO: _start:
+// DSO: <_start>:
// S(0x1214) - P(0x1220) + A(-8) = 0x2c = 32
// DSO-NEXT: 1220: b #40
// S(0x1218) - P(0x1224) + A(-8) = 0x38 = 56
@@ -52,37 +52,37 @@ _start:
// DSO-EMPTY:
// DSO-NEXT: Disassembly of section .plt:
// DSO-EMPTY:
-// DSO-NEXT: $a:
+// DSO-NEXT: <$a>:
// DSO-NEXT: 1230: str lr, [sp, #-4]!
// (0x1234 + 8) + (0 RoR 12) + 8192 + 164 = 0x32e0 = .got.plt[2]
// DSO-NEXT: 1234: add lr, pc, #0, #12
// DSO-NEXT: 1238: add lr, lr, #8192
// DSO-NEXT: 123c: ldr pc, [lr, #164]!
-// DSO: $d:
+// DSO: <$d>:
// DSO-NEXT: 1240: d4 d4 d4 d4 .word 0xd4d4d4d4
// DSO-NEXT: 1244: d4 d4 d4 d4 .word 0xd4d4d4d4
// DSO-NEXT: 1248: d4 d4 d4 d4 .word 0xd4d4d4d4
// DSO-NEXT: 124c: d4 d4 d4 d4 .word 0xd4d4d4d4
-// DSO: $a:
+// DSO: <$a>:
// (0x1250 + 8) + (0 RoR 12) + 8192 + 140 = 0x32e4
// DSO-NEXT: 1250: add r12, pc, #0, #12
// DSO-NEXT: 1254: add r12, r12, #8192
// DSO-NEXT: 1258: ldr pc, [r12, #140]!
-// DSO: $d:
+// DSO: <$d>:
// DSO-NEXT: 125c: d4 d4 d4 d4 .word 0xd4d4d4d4
-// DSO: $a:
+// DSO: <$a>:
// (0x1260 + 8) + (0 RoR 12) + 8192 + 128 = 0x32e8
// DSO-NEXT: 1260: add r12, pc, #0, #12
// DSO-NEXT: 1264: add r12, r12, #8192
// DSO-NEXT: 1268: ldr pc, [r12, #128]!
-// DSO: $d:
+// DSO: <$d>:
// DSO-NEXT: 126c: d4 d4 d4 d4 .word 0xd4d4d4d4
-// DSO: $a:
+// DSO: <$a>:
// (0x1270 + 8) + (0 RoR 12) + 8192 + 116 = 0x32ec
// DSO-NEXT: 1270: add r12, pc, #0, #12
// DSO-NEXT: 1274: add r12, r12, #8192
// DSO-NEXT: 1278: ldr pc, [r12, #116]!
-// DSO: $d:
+// DSO: <$d>:
// DSO-NEXT: 127c: d4 d4 d4 d4 .word 0xd4d4d4d4
@@ -119,46 +119,46 @@ _start:
// CHECKHIGH: Disassembly of section .text:
// CHECKHIGH-EMPTY:
-// CHECKHIGH-NEXT: func1:
+// CHECKHIGH-NEXT: <func1>:
// CHECKHIGH-NEXT: 1000: bx lr
-// CHECKHIGH: func2:
+// CHECKHIGH: <func2>:
// CHECKHIGH-NEXT: 1004: bx lr
-// CHECKHIGH: func3:
+// CHECKHIGH: <func3>:
// CHECKHIGH-NEXT: 1008: bx lr
-// CHECKHIGH: _start:
+// CHECKHIGH: <_start>:
// CHECKHIGH-NEXT: 100c: b #4108 <$a>
// CHECKHIGH-NEXT: 1010: bl #4120 <$a>
// CHECKHIGH-NEXT: 1014: beq #4132 <$a>
// CHECKHIGH-EMPTY:
// CHECKHIGH-NEXT: Disassembly of section .plt:
// CHECKHIGH-EMPTY:
-// CHECKHIGH-NEXT: $a:
+// CHECKHIGH-NEXT: <$a>:
// CHECKHIGH-NEXT: 2000: str lr, [sp, #-4]!
// CHECKHIGH-NEXT: 2004: add lr, pc, #16, #12
// CHECKHIGH-NEXT: 2008: add lr, lr, #1036288
// CHECKHIGH-NEXT: 200c: ldr pc, [lr, #4092]!
-// CHECKHIGH: $d:
+// CHECKHIGH: <$d>:
// CHECKHIGH-NEXT: 2010: d4 d4 d4 d4 .word 0xd4d4d4d4
// CHECKHIGH-NEXT: 2014: d4 d4 d4 d4 .word 0xd4d4d4d4
// CHECKHIGH-NEXT: 2018: d4 d4 d4 d4 .word 0xd4d4d4d4
// CHECKHIGH-NEXT: 201c: d4 d4 d4 d4 .word 0xd4d4d4d4
-// CHECKHIGH: $a:
+// CHECKHIGH: <$a>:
// CHECKHIGH-NEXT: 2020: add r12, pc, #16, #12
// CHECKHIGH-NEXT: 2024: add r12, r12, #1036288
// CHECKHIGH-NEXT: 2028: ldr pc, [r12, #4068]!
-// CHECKHIGH: $d:
+// CHECKHIGH: <$d>:
// CHECKHIGH-NEXT: 202c: d4 d4 d4 d4 .word 0xd4d4d4d4
-// CHECKHIGH: $a:
+// CHECKHIGH: <$a>:
// CHECKHIGH-NEXT: 2030: add r12, pc, #16, #12
// CHECKHIGH-NEXT: 2034: add r12, r12, #1036288
// CHECKHIGH-NEXT: 2038: ldr pc, [r12, #4056]!
-// CHECKHIGH: $d:
+// CHECKHIGH: <$d>:
// CHECKHIGH-NEXT: 203c: d4 d4 d4 d4 .word 0xd4d4d4d4
-// CHECKHIGH: $a:
+// CHECKHIGH: <$a>:
// CHECKHIGH-NEXT: 2040: add r12, pc, #16, #12
// CHECKHIGH-NEXT: 2044: add r12, r12, #1036288
// CHECKHIGH-NEXT: 2048: ldr pc, [r12, #4044]!
-// CHECKHIGH: $d:
+// CHECKHIGH: <$d>:
// CHECKHIGH-NEXT: 204c: d4 d4 d4 d4 .word 0xd4d4d4d4
// DSORELHIGH: Name: .got.plt
@@ -187,46 +187,46 @@ _start:
// CHECKLONG: Disassembly of section .text:
// CHECKLONG-EMPTY:
-// CHECKLONG-NEXT: func1:
+// CHECKLONG-NEXT: <func1>:
// CHECKLONG-NEXT: 1000: bx lr
-// CHECKLONG: func2:
+// CHECKLONG: <func2>:
// CHECKLONG-NEXT: 1004: bx lr
-// CHECKLONG: func3:
+// CHECKLONG: <func3>:
// CHECKLONG-NEXT: 1008: bx lr
-// CHECKLONG: _start:
+// CHECKLONG: <_start>:
// CHECKLONG-NEXT: 100c: b #4108 <$a>
// CHECKLONG-NEXT: 1010: bl #4120 <$a>
// CHECKLONG-NEXT: 1014: beq #4132 <$a>
// CHECKLONG-EMPTY:
// CHECKLONG-NEXT: Disassembly of section .plt:
// CHECKLONG-EMPTY:
-// CHECKLONG-NEXT: $a:
+// CHECKLONG-NEXT: <$a>:
// CHECKLONG-NEXT: 2000: str lr, [sp, #-4]!
// CHECKLONG-NEXT: 2004: ldr lr, [pc, #4]
// CHECKLONG-NEXT: 2008: add lr, pc, lr
// CHECKLONG-NEXT: 200c: ldr pc, [lr, #8]!
-// CHECKLONG: $d:
+// CHECKLONG: <$d>:
// CHECKLONG-NEXT: 2010: f0 f0 10 11 .word 0x1110f0f0
// CHECKLONG-NEXT: 2014: d4 d4 d4 d4 .word 0xd4d4d4d4
// CHECKLONG-NEXT: 2018: d4 d4 d4 d4 .word 0xd4d4d4d4
// CHECKLONG-NEXT: 201c: d4 d4 d4 d4 .word 0xd4d4d4d4
-// CHECKLONG: $a:
+// CHECKLONG: <$a>:
// CHECKLONG-NEXT: 2020: ldr r12, [pc, #4]
// CHECKLONG-NEXT: 2024: add r12, r12, pc
// CHECKLONG-NEXT: 2028: ldr pc, [r12]
-// CHECKLONG: $d:
+// CHECKLONG: <$d>:
// CHECKLONG-NEXT: 202c: e0 f0 10 11 .word 0x1110f0e0
-// CHECKLONG: $a:
+// CHECKLONG: <$a>:
// CHECKLONG-NEXT: 2030: ldr r12, [pc, #4]
// CHECKLONG-NEXT: 2034: add r12, r12, pc
// CHECKLONG-NEXT: 2038: ldr pc, [r12]
-// CHECKLONG: $d:
+// CHECKLONG: <$d>:
// CHECKLONG-NEXT: 203c: d4 f0 10 11 .word 0x1110f0d4
-// CHECKLONG: $a:
+// CHECKLONG: <$a>:
// CHECKLONG-NEXT: 2040: ldr r12, [pc, #4]
// CHECKLONG-NEXT: 2044: add r12, r12, pc
// CHECKLONG-NEXT: 2048: ldr pc, [r12]
-// CHECKLONG: $d:
+// CHECKLONG: <$d>:
// CHECKLONG-NEXT: 204c: c8 f0 10 11 .word 0x1110f0c8
// DSORELLONG: Name: .got.plt
@@ -256,46 +256,46 @@ _start:
// CHECKMIX: Disassembly of section .text:
// CHECKMIX-EMPTY:
-// CHECKMIX-NEXT: func1:
+// CHECKMIX-NEXT: <func1>:
// CHECKMIX-NEXT: 1000: bx lr
-// CHECKMIX: func2:
+// CHECKMIX: <func2>:
// CHECKMIX-NEXT: 1004: bx lr
-// CHECKMIX: func3:
+// CHECKMIX: <func3>:
// CHECKMIX-NEXT: 1008: bx lr
-// CHECKMIX: _start:
+// CHECKMIX: <_start>:
// CHECKMIX-NEXT: 100c: b #4108 <$a>
// CHECKMIX-NEXT: 1010: bl #4120 <$a>
// CHECKMIX-NEXT: 1014: beq #4132 <$a>
// CHECKMIX-EMPTY:
// CHECKMIX-NEXT: Disassembly of section .plt:
// CHECKMIX-EMPTY:
-// CHECKMIX-NEXT: $a:
+// CHECKMIX-NEXT: <$a>:
// CHECKMIX-NEXT: 2000: str lr, [sp, #-4]!
// CHECKMIX-NEXT: 2004: ldr lr, [pc, #4]
// CHECKMIX-NEXT: 2008: add lr, pc, lr
// CHECKMIX-NEXT: 200c: ldr pc, [lr, #8]!
-// CHECKMIX: $d:
+// CHECKMIX: <$d>:
// CHECKMIX-NEXT: 2010: 10 00 00 08 .word 0x08000010
// CHECKMIX-NEXT: 2014: d4 d4 d4 d4 .word 0xd4d4d4d4
// CHECKMIX-NEXT: 2018: d4 d4 d4 d4 .word 0xd4d4d4d4
// CHECKMIX-NEXT: 201c: d4 d4 d4 d4 .word 0xd4d4d4d4
-// CHECKMIX: $a:
+// CHECKMIX: <$a>:
// CHECKMIX-NEXT: 2020: ldr r12, [pc, #4]
// CHECKMIX-NEXT: 2024: add r12, r12, pc
// CHECKMIX-NEXT: 2028: ldr pc, [r12]
-// CHECKMIX: $d:
+// CHECKMIX: <$d>:
// CHECKMIX-NEXT: 202c: 00 00 00 08 .word 0x08000000
-// CHECKMIX: $a:
+// CHECKMIX: <$a>:
// CHECKMIX-NEXT: 2030: add r12, pc, #133169152
// CHECKMIX-NEXT: 2034: add r12, r12, #1044480
// CHECKMIX-NEXT: 2038: ldr pc, [r12, #4088]!
-// CHECKMIX: $d:
+// CHECKMIX: <$d>:
// CHECKMIX-NEXT: 203c: d4 d4 d4 d4 .word 0xd4d4d4d4
-// CHECKMIX: $a:
+// CHECKMIX: <$a>:
// CHECKMIX-NEXT: 2040: add r12, pc, #133169152
// CHECKMIX-NEXT: 2044: add r12, r12, #1044480
// CHECKMIX-NEXT: 2048: ldr pc, [r12, #4076]!
-// CHECKMIX: $d:
+// CHECKMIX: <$d>:
// CHECKMIX-NEXT: 204c: d4 d4 d4 d4 .word 0xd4d4d4d4
// DSORELMIX: Name: .got.plt
diff --git a/lld/test/ELF/arm-sbrel32.s b/lld/test/ELF/arm-sbrel32.s
index 12d6e9981588..c598e0f68349 100644
--- a/lld/test/ELF/arm-sbrel32.s
+++ b/lld/test/ELF/arm-sbrel32.s
@@ -32,7 +32,7 @@ foo4: .space 4
// CHECK: Disassembly of section .text:
// CHECK-EMPTY:
-// CHECK-NEXT: _start:
+// CHECK-NEXT: <_start>:
// CHECK-NEXT: 110d4: 1e ff 2f e1 bx lr
// CHECK: 110d8: 00 00 00 00 .word 0x00000000
// CHECK-NEXT: 110dc: 04 00 00 00 .word 0x00000004
diff --git a/lld/test/ELF/arm-target1.s b/lld/test/ELF/arm-target1.s
index 95df5611158f..41bb0a3bc5fd 100644
--- a/lld/test/ELF/arm-target1.s
+++ b/lld/test/ELF/arm-target1.s
@@ -29,7 +29,7 @@
// RELATIVE: 00001154 l .text 00000000 patatino
// RELATIVE: Disassembly of section .text:
// RELATIVE-EMPTY:
-// RELATIVE: $d.0:
+// RELATIVE: <$d.0>:
// RELATIVE: 1150: 04 00 00 00 .word 0x00000004
// ABS: can't create dynamic relocation R_ARM_TARGET1 against symbol: patatino in readonly segment; recompile object files with -fPIC or pass '-Wl,-z,notext' to allow text relocations in the output
diff --git a/lld/test/ELF/arm-thumb-adr.s b/lld/test/ELF/arm-thumb-adr.s
index 47f9aa92c9af..35d3b4ca3501 100644
--- a/lld/test/ELF/arm-thumb-adr.s
+++ b/lld/test/ELF/arm-thumb-adr.s
@@ -28,14 +28,14 @@ target2:
nop
bx lr
-// CHECK: 000110b4 _start:
+// CHECK: 000110b4 <_start>:
// CHECK-NEXT: 110b4: adr r0, #0
// CHECK-NEXT: 110b6: adr r1, #1020
-// CHECK: 000110b8 target1:
+// CHECK: 000110b8 <target1>:
// CHECK-NEXT: 110b8: nop
// CHECK-NEXT: 110ba: bx lr
-// CHECK: 000114b4 target2:
+// CHECK: 000114b4 <target2>:
// CHECK-NEXT: 114b4: nop
// CHECK-NEXT: 114b6: bx lr
diff --git a/lld/test/ELF/arm-thumb-blx.s b/lld/test/ELF/arm-thumb-blx.s
index 9398ea445b3a..281d1615b240 100644
--- a/lld/test/ELF/arm-thumb-blx.s
+++ b/lld/test/ELF/arm-thumb-blx.s
@@ -51,7 +51,7 @@ _start:
// CHECK: Disassembly of section .caller:
// CHECK-EMPTY:
-// CHECK: _start:
+// CHECK: <_start>:
// Align(0x10000,4) - 0xff50 (65360) + 4 = 0xb4 = callee_low
// CHECK-NEXT-THUMB: 10000: f0 f7 58 e8 blx #-65360
// CHECK-NEXT-THUMB: 10004: 00 bf nop
diff --git a/lld/test/ELF/arm-thumb-branch.s b/lld/test/ELF/arm-thumb-branch.s
index 69615b58d287..932fdacb07ab 100644
--- a/lld/test/ELF/arm-thumb-branch.s
+++ b/lld/test/ELF/arm-thumb-branch.s
@@ -41,12 +41,12 @@ callee_high:
// CHECK: Disassembly of section .callee1:
// CHECK-EMPTY:
-// CHECK-NEXT: callee_low:
+// CHECK-NEXT: <callee_low>:
// CHECK-NEXT: b4: 70 47 bx lr
// CHECK-EMPTY:
// CHECK-NEXT: Disassembly of section .caller:
// CHECK-EMPTY:
-// CHECK-NEXT: _start:
+// CHECK-NEXT: <_start>:
// CHECK-NEXT: 10000: f0 f7 58 f8 bl #-65360
// CHECK-NEXT: 10004: f0 f7 56 b8 b.w #-65364
// CHECK-NEXT: 10008: 30 f4 54 a8 beq.w #-65368
@@ -61,5 +61,5 @@ callee_high:
// CHECK-EMPTY:
// CHECK-NEXT: Disassembly of section .callee2:
// CHECK-EMPTY:
-// CHECK-NEXT: callee_high:
+// CHECK-NEXT: <callee_high>:
// CHECK-NEXT: 10028: 70 47 bx lr
diff --git a/lld/test/ELF/arm-thumb-condbranch-thunk.s b/lld/test/ELF/arm-thumb-condbranch-thunk.s
index 522d7aa8567f..5f53096d0a07 100644
--- a/lld/test/ELF/arm-thumb-condbranch-thunk.s
+++ b/lld/test/ELF/arm-thumb-condbranch-thunk.s
@@ -35,12 +35,12 @@ _start:
bl tfunc33
// CHECK1: Disassembly of section .text:
// CHECK1-EMPTY:
-// CHECK1-NEXT: tfunc00:
+// CHECK1-NEXT: <tfunc00>:
// CHECK1-NEXT: 80000: 70 47 bx lr
// CHECK1-NEXT: 80002: 7f f3 ff d7 bl #0xf7fffe
-// CHECK1: __Thumbv7ABSLongThunk_tfunc05:
+// CHECK1: <__Thumbv7ABSLongThunk_tfunc05>:
// CHECK1-NEXT: 80008: 7f f2 fa bf b.w #0x27fff4 <tfunc05>
-// CHECK1: __Thumbv7ABSLongThunk_tfunc00:
+// CHECK1: <__Thumbv7ABSLongThunk_tfunc00>:
// CHECK1-NEXT: 8000c: ff f7 f8 bf b.w #-0x10 <tfunc00>
FUNCTION 01
// tfunc02 is within range of tfunc02
@@ -48,7 +48,7 @@ _start:
// tfunc05 is out of range, and we can't reach the pre-created Thunk Section
// create a new one.
bne.w tfunc05
-// CHECK2: tfunc01:
+// CHECK2: <tfunc01>:
// CHECK2-NEXT: 100000: 70 47 bx lr
// CHECK2-NEXT: 100002: 3f f0 fd a7 beq.w #0x7fffa <tfunc02>
// CHECK2-NEXT: 100006: 7f f4 ff a7 bne.w #-0x80002 <__Thumbv7ABSLongThunk_tfunc05>
@@ -66,12 +66,12 @@ _start:
FUNCTION 07
FUNCTION 08
FUNCTION 09
-// CHECK4: __Thumbv7ABSLongThunk_tfunc03:
+// CHECK4: <__Thumbv7ABSLongThunk_tfunc03>:
// CHECK4-NEXT: 500004: ff f4 fc bf b.w #-0x300008 <tfunc03>
FUNCTION 10
// We can't reach any Thunk Section, create a new one
beq.w tfunc03
-// CHECK5: tfunc10:
+// CHECK5: <tfunc10>:
// CHECK5-NEXT: 580000: 70 47 bx lr
// CHECK5-NEXT: 580002: 3f f4 ff a7 beq.w #-0x80002 <__Thumbv7ABSLongThunk_tfunc03>
FUNCTION 11
@@ -95,14 +95,14 @@ _start:
FUNCTION 29
FUNCTION 30
FUNCTION 31
-// CHECK6: __Thumbv7ABSLongThunk_tfunc33:
+// CHECK6: <__Thumbv7ABSLongThunk_tfunc33>:
// CHECK6-NEXT: 1000004: ff f0 fc bf b.w #0xffff8 <tfunc33>
-// CHECK6: __Thumbv7ABSLongThunk_tfunc00:
+// CHECK6: <__Thumbv7ABSLongThunk_tfunc00>:
// CHECK6-NEXT: 1000008: 7f f4 fa 97 b.w #-0xf8000c <tfunc00>
FUNCTION 32
FUNCTION 33
// We should be able to reach an existing ThunkSection.
b.w tfunc00
-// CHECK7: tfunc33:
+// CHECK7: <tfunc33>:
// CHECK7-NEXT: 1100000: 70 47 bx lr
// CHECK7-NEXT: 1100002: 00 f7 01 b8 b.w #-0xffffe <__Thumbv7ABSLongThunk_tfunc00>
diff --git a/lld/test/ELF/arm-thumb-interwork-abs.s b/lld/test/ELF/arm-thumb-interwork-abs.s
index 85d13387a95a..523660ad292f 100644
--- a/lld/test/ELF/arm-thumb-interwork-abs.s
+++ b/lld/test/ELF/arm-thumb-interwork-abs.s
@@ -27,12 +27,12 @@ thumb_caller:
blx sym
// WARN: branch and link relocation: R_ARM_THM_CALL to non STT_FUNC symbol: sym interworking not performed; consider using directive '.type sym, %function' to give symbol type STT_FUNC if interworking between ARM and Thumb is required
-// CHECK: 00012000 arm_caller:
+// CHECK: 00012000 <arm_caller>:
// CHECK-NEXT: 12000: b #4088
// CHECK-NEXT: 12004: bl #4084
// CHECK-NEXT: 12008: blx #4080
-// CHECK: 0001200c thumb_caller:
+// CHECK: 0001200c <thumb_caller>:
// CHECK-NEXT: 1200c: b.w #4080
// CHECK-NEXT: 12010: bl #4076
// CHECK-NEXT: 12014: blx #4076
diff --git a/lld/test/ELF/arm-thumb-interwork-notfunc.s b/lld/test/ELF/arm-thumb-interwork-notfunc.s
index 40f3afa28b1b..cbf6456b10b3 100644
--- a/lld/test/ELF/arm-thumb-interwork-notfunc.s
+++ b/lld/test/ELF/arm-thumb-interwork-notfunc.s
@@ -95,7 +95,7 @@ thumb_caller:
blx thumb_func_with_notype
blx thumb_func_with_explicit_notype
-// CHECK: 00012008 _start:
+// CHECK: 00012008 <_start>:
// CHECK-NEXT: 12008: b #-16
// CHECK-NEXT: 1200c: b #-20
// CHECK-NEXT: 12010: b #-24
@@ -115,7 +115,7 @@ thumb_caller:
// CHECK-NEXT: 12048: blx #-76
// CHECK-NEXT: 1204c: blx #-80
-// CHECK: 00012050 thumb_caller:
+// CHECK: 00012050 <thumb_caller>:
// CHECK-NEXT: 12050: b.w #-84
// CHECK-NEXT: 12054: b.w #-88
// CHECK-NEXT: 12058: b.w #-92
diff --git a/lld/test/ELF/arm-thumb-interwork-shared.s b/lld/test/ELF/arm-thumb-interwork-shared.s
index e8464eb591c4..30370ddc1b22 100644
--- a/lld/test/ELF/arm-thumb-interwork-shared.s
+++ b/lld/test/ELF/arm-thumb-interwork-shared.s
@@ -18,17 +18,17 @@ sym1:
// CHECK: Disassembly of section .text:
// CHECK-EMPTY:
-// CHECK-NEXT: sym1:
+// CHECK-NEXT: <sym1>:
// CHECK-NEXT: 11e0: b.w #12 <__ThumbV7PILongThunk_elsewhere>
// CHECK-NEXT: b.w #20 <__ThumbV7PILongThunk_weakref>
// CHECK-NEXT: blx #68
// CHECK-NEXT: blx #80
-// CHECK: __ThumbV7PILongThunk_elsewhere:
+// CHECK: <__ThumbV7PILongThunk_elsewhere>:
// CHECK-NEXT: 11f0: movw r12, #52
// CHECK-NEXT: movt r12, #0
// CHECK-NEXT: add r12, pc
// CHECK-NEXT: bx r12
-// CHECK: __ThumbV7PILongThunk_weakref:
+// CHECK: <__ThumbV7PILongThunk_weakref>:
// CHECK-NEXT: 11fc: movw r12, #56
// CHECK-NEXT: movt r12, #0
// CHECK-NEXT: add r12, pc
@@ -36,25 +36,25 @@ sym1:
// CHECK: Disassembly of section .plt:
// CHECK-EMPTY:
-// CHECK-NEXT: $a:
+// CHECK-NEXT: <$a>:
// CHECK-NEXT: 1210: str lr, [sp, #-4]!
// CHECK-NEXT: add lr, pc, #0, #12
// CHECK-NEXT: add lr, lr, #8192
// CHECK-NEXT: ldr pc, [lr, #148]!
-// CHECK: $d:
+// CHECK: <$d>:
// CHECK-NEXT: 1220: d4 d4 d4 d4 .word 0xd4d4d4d4
// CHECK-NEXT: .word 0xd4d4d4d4
// CHECK-NEXT: .word 0xd4d4d4d4
// CHECK-NEXT: .word 0xd4d4d4d4
-// CHECK: $a:
+// CHECK: <$a>:
// CHECK-NEXT: 1230: add r12, pc, #0, #12
// CHECK-NEXT: add r12, r12, #8192
// CHECK-NEXT: ldr pc, [r12, #124]!
-// CHECK: $d:
+// CHECK: <$d>:
// CHECK-NEXT: 123c: d4 d4 d4 d4 .word 0xd4d4d4d4
-// CHECK: $a:
+// CHECK: <$a>:
// CHECK-NEXT: 1240: add r12, pc, #0, #12
// CHECK-NEXT: add r12, r12, #8192
// CHECK-NEXT: ldr pc, [r12, #112]!
-// CHECK: $d:
+// CHECK: <$d>:
// CHECK-NEXT: 124c: d4 d4 d4 d4 .word 0xd4d4d4d4
diff --git a/lld/test/ELF/arm-thumb-interwork-thunk-v5.s b/lld/test/ELF/arm-thumb-interwork-thunk-v5.s
index cb7ab263add2..bed6b8cbc9dc 100644
--- a/lld/test/ELF/arm-thumb-interwork-thunk-v5.s
+++ b/lld/test/ELF/arm-thumb-interwork-thunk-v5.s
@@ -26,34 +26,34 @@ _start:
blx thumb_func
bx lr
-// CHECK: _start:
+// CHECK: <_start>:
// CHECK-NEXT: 12000: 03 00 00 ea b #12 <__ARMv5ABSLongThunk_thumb_func>
// CHECK-NEXT: 12004: 01 00 00 fa blx #4 <thumb_func>
// CHECK-NEXT: 12008: 00 00 00 fa blx #0 <thumb_func>
// CHECK-NEXT: 1200c: 1e ff 2f e1 bx lr
-// CHECK: thumb_func:
+// CHECK: <thumb_func>:
// CHECK-NEXT: 12010: 70 47 bx lr
-// CHECK: __ARMv5ABSLongThunk_thumb_func:
+// CHECK: <__ARMv5ABSLongThunk_thumb_func>:
// CHECK-NEXT: 12014: 04 f0 1f e5 ldr pc, [pc, #-4]
-// CHECK: $d:
+// CHECK: <$d>:
// CHECK-NEXT: 12018: 11 20 01 00 .word 0x00012011
-// CHECK-PI: _start:
+// CHECK-PI: <_start>:
// CHECK-PI-NEXT: 2000: 03 00 00 ea b #12 <__ARMV5PILongThunk_thumb_func>
// CHECK-PI-NEXT: 2004: 01 00 00 fa blx #4 <thumb_func>
// CHECK-PI-NEXT: 2008: 00 00 00 fa blx #0 <thumb_func>
// CHECK-PI-NEXT: 200c: 1e ff 2f e1 bx lr
-// CHECK-PI: thumb_func:
+// CHECK-PI: <thumb_func>:
// CHECK-PI-NEXT: 2010: 70 47 bx lr
-// CHECK-PI: __ARMV5PILongThunk_thumb_func:
+// CHECK-PI: <__ARMV5PILongThunk_thumb_func>:
// CHECK-PI-NEXT: 2014: 04 c0 9f e5 ldr r12, [pc, #4]
// CHECK-PI-NEXT: 2018: 0c c0 8f e0 add r12, pc, r12
// CHECK-PI-NEXT: 201c: 1c ff 2f e1 bx r12
-// CHECK-PI: $d:
+// CHECK-PI: <$d>:
// CHECK-PI-NEXT: 2020: f1 ff ff ff .word 0xfffffff1
.section .text.1, "ax", %progbits
diff --git a/lld/test/ELF/arm-thumb-interwork-thunk.s b/lld/test/ELF/arm-thumb-interwork-thunk.s
index 3c24bbb74cfa..b22ac49140e7 100644
--- a/lld/test/ELF/arm-thumb-interwork-thunk.s
+++ b/lld/test/ELF/arm-thumb-interwork-thunk.s
@@ -40,7 +40,7 @@ thumb_callee1:
// CHECK-THUMB: Disassembly of section .R_ARM_JUMP24_callee_1:
// CHECK-THUMB-EMPTY:
-// CHECK-THUMB: thumb_callee1:
+// CHECK-THUMB: <thumb_callee1>:
// CHECK-THUMB: 1000: 70 47 bx
.section .R_ARM_THM_JUMP_callee_low, "ax", %progbits
.arm
@@ -50,7 +50,7 @@ thumb_callee1:
arm_callee1:
bx lr
// Disassembly of section .R_ARM_THM_JUMP_callee_1:
-// CHECK-ARM: arm_callee1:
+// CHECK-ARM: <arm_callee1>:
// CHECK-ARM-NEXT: 1100: 1e ff 2f e1 bx lr
// Calling sections
@@ -110,7 +110,7 @@ arm_caller:
// CHECK-PI-ARM: Disassembly of section .arm_caller:
// CHECK-PI-ARM-EMPTY:
-// CHECK-PI-ARM-NEXT: arm_caller:
+// CHECK-PI-ARM-NEXT: <arm_caller>:
// CHECK-PI-ARM-NEXT: 1300: 3e ff ff fa blx #-776 <thumb_callee1>
// CHECK-PI-ARM-NEXT: 1304: 3d ff ff fa blx #-780 <thumb_callee1>
// CHECK-PI-ARM-NEXT: 1308: 06 00 00 ea b #24 <__ARMV7PILongThunk_thumb_callee1>
@@ -121,19 +121,19 @@ arm_caller:
// CHECK-PI-ARM-NEXT: 131c: b7 00 00 0a beq #732 <arm_callee2>
// CHECK-PI-ARM-NEXT: 1320: b7 00 00 1a bne #732 <arm_callee3>
// CHECK-PI-ARM-NEXT: 1324: 1e ff 2f e1 bx lr
-// CHECK-PI-ARM: __ARMV7PILongThunk_thumb_callee1:
+// CHECK-PI-ARM: <__ARMV7PILongThunk_thumb_callee1>:
// 0x1330 + 8 - 0x337 = 0x1001 = thumb_callee1
// CHECK-PI-ARM-NEXT: 1328: c9 cc 0f e3 movw r12, #64713
// CHECK-PI-ARM-NEXT: 132c: ff cf 4f e3 movt r12, #65535
// CHECK-PI-ARM-NEXT: 1330: 0f c0 8c e0 add r12, r12, pc
// CHECK-PI-ARM-NEXT: 1334: 1c ff 2f e1 bx r12
-// CHECK-PI-ARM: __ARMV7PILongThunk_thumb_callee2:
+// CHECK-PI-ARM: <__ARMV7PILongThunk_thumb_callee2>:
// CHECK-PI-ARM-NEXT: 1338: b9 c1 00 e3 movw r12, #441
// CHECK-PI-ARM-NEXT: 133c: 00 c0 40 e3 movt r12, #0
// CHECK-PI-ARM-NEXT: 1340: 0f c0 8c e0 add r12, r12, pc
// CHECK-PI-ARM-NEXT: 1344: 1c ff 2f e1 bx r12
-// CHECK-PI-ARM: __ARMV7PILongThunk_thumb_callee3:
+// CHECK-PI-ARM: <__ARMV7PILongThunk_thumb_callee3>:
// 0x1340 + 8 + 0x1b9 = 0x1501
// CHECK-PI-ARM-NEXT: 1348: ab c1 00 e3 movw r12, #427
// CHECK-PI-ARM-NEXT: 134c: 00 c0 40 e3 movt r12, #0
@@ -189,7 +189,7 @@ thumb_caller:
bne.w arm_callee3
// CHECK-ABS-THUMB: Disassembly of section .thumb_caller:
// CHECK-ABS-THUMB-EMPTY:
-// CHECK-ABS-THUMB-NEXT: thumb_caller:
+// CHECK-ABS-THUMB-NEXT: <thumb_caller>:
// CHECK-ABS-THUMB-NEXT: 1400: ff f7 7e ee blx #-772
// CHECK-ABS-THUMB-NEXT: 1404: ff f7 7c ee blx #-776
// CHECK-ABS-THUMB-NEXT: 1408: 00 f0 0a b8 b.w #20 <__Thumbv7ABSLongThunk_arm_callee1>
@@ -198,25 +198,25 @@ thumb_caller:
// CHECK-ABS-THUMB-NEXT: 1414: 00 f0 04 80 beq.w #8 <__Thumbv7ABSLongThunk_arm_callee1>
// CHECK-ABS-THUMB-NEXT: 1418: 00 f0 07 80 beq.w #14 <__Thumbv7ABSLongThunk_arm_callee2>
// CHECK-ABS-THUMB-NEXT: 141c: 40 f0 0a 80 bne.w #20 <__Thumbv7ABSLongThunk_arm_callee3>
-// CHECK-ABS-THUMB: __Thumbv7ABSLongThunk_arm_callee1:
+// CHECK-ABS-THUMB: <__Thumbv7ABSLongThunk_arm_callee1>:
// 0x1100 = arm_callee1
// CHECK-ABS-THUMB-NEXT: 1420: 41 f2 00 1c movw r12, #4352
// CHECK-ABS-THUMB-NEXT: 1424: c0 f2 00 0c movt r12, #0
// CHECK-ABS-THUMB-NEXT: 1428: 60 47 bx r12
-// CHECK-ABS-THUMB: __Thumbv7ABSLongThunk_arm_callee2:
+// CHECK-ABS-THUMB: <__Thumbv7ABSLongThunk_arm_callee2>:
// 0x1600 = arm_callee2
// CHECK-ABS-THUMB-NEXT: 142a: 41 f2 00 6c movw r12, #5632
// CHECK-ABS-THUMB-NEXT: 142e: c0 f2 00 0c movt r12, #0
// CHECK-ABS-THUMB-NEXT: 1432: 60 47 bx r12
// 0x1604 = arm_callee3
-// CHECK-ABS-THUMB: __Thumbv7ABSLongThunk_arm_callee3:
+// CHECK-ABS-THUMB: <__Thumbv7ABSLongThunk_arm_callee3>:
// CHECK-ABS-THUMB-NEXT: 1434: 41 f2 04 6c movw r12, #5636
// CHECK-ABS-THUMB-NEXT: 1438: c0 f2 00 0c movt r12, #0
// CHECK-ABS-THUMB-NEXT: 143c: 60 47 bx r12
// CHECK-PI-THUMB: Disassembly of section .thumb_caller:
// CHECK-PI-THUMB-EMPTY:
-// CHECK-PI-THUMB-NEXT: thumb_caller:
+// CHECK-PI-THUMB-NEXT: <thumb_caller>:
// CHECK-PI-THUMB-NEXT: 1400: ff f7 7e ee blx #-772
// CHECK-PI-THUMB-NEXT: 1404: ff f7 7c ee blx #-776
// CHECK-PI-THUMB-NEXT: 1408: 00 f0 0a b8 b.w #20 <__ThumbV7PILongThunk_arm_callee1>
@@ -225,19 +225,19 @@ thumb_caller:
// CHECK-PI-THUMB-NEXT: 1414: 00 f0 04 80 beq.w #8 <__ThumbV7PILongThunk_arm_callee1>
// CHECK-PI-THUMB-NEXT: 1418: 00 f0 08 80 beq.w #16 <__ThumbV7PILongThunk_arm_callee2>
// CHECK-PI-THUMB-NEXT: 141c: 40 f0 0c 80 bne.w #24 <__ThumbV7PILongThunk_arm_callee3>
-// CHECK-PI-THUMB: __ThumbV7PILongThunk_arm_callee1:
+// CHECK-PI-THUMB: <__ThumbV7PILongThunk_arm_callee1>:
// 0x1428 + 4 - 0x32c = 0x1100 = arm_callee1
// CHECK-PI-THUMB-NEXT: 1420: 4f f6 d4 4c movw r12, #64724
// CHECK-PI-THUMB-NEXT: 1424: cf f6 ff 7c movt r12, #65535
// CHECK-PI-THUMB-NEXT: 1428: fc 44 add r12, pc
// CHECK-PI-THUMB-NEXT: 142a: 60 47 bx r12
-// CHECK-PI-THUMB: __ThumbV7PILongThunk_arm_callee2:
+// CHECK-PI-THUMB: <__ThumbV7PILongThunk_arm_callee2>:
// 0x1434 + 4 + 0x1c8 = 0x1600 = arm_callee2
// CHECK-PI-THUMB-NEXT: 142c: 40 f2 c8 1c movw r12, #456
// CHECK-PI-THUMB-NEXT: 1430: c0 f2 00 0c movt r12, #0
// CHECK-PI-THUMB-NEXT: 1434: fc 44 add r12, pc
// CHECK-PI-THUMB-NEXT: 1436: 60 47 bx r12
-// CHECK-PI-THUMB: __ThumbV7PILongThunk_arm_callee3:
+// CHECK-PI-THUMB: <__ThumbV7PILongThunk_arm_callee3>:
// 0x1440 + 4 + 0x1c0 = 0x1604 = arm_callee3
// CHECK-PI-THUMB-NEXT: 1438: 40 f2 c0 1c movw r12, #448
// CHECK-PI-THUMB-NEXT: 143c: c0 f2 00 0c movt r12, #0
@@ -294,9 +294,9 @@ thumb_callee3:
bx lr
// CHECK-THUMB: Disassembly of section .R_ARM_JUMP24_callee_2:
// CHECK-THUMB-EMPTY:
-// CHECK-THUMB-NEXT: thumb_callee2:
+// CHECK-THUMB-NEXT: <thumb_callee2>:
// CHECK-THUMB-NEXT: 1500: 70 47 bx lr
-// CHECK-THUMB: thumb_callee3:
+// CHECK-THUMB: <thumb_callee3>:
// CHECK-THUMB-NEXT: 1502: 70 47 bx lr
.section .R_ARM_THM_JUMP_callee_high, "ax", %progbits
@@ -312,9 +312,9 @@ arm_callee3:
bx lr
// CHECK-ARM: Disassembly of section .R_ARM_THM_JUMP_callee_2:
// CHECK-ARM-EMPTY:
-// CHECK-ARM-NEXT: arm_callee2:
+// CHECK-ARM-NEXT: <arm_callee2>:
// CHECK-ARM-NEXT: 1600: 1e ff 2f e1 bx lr
-// CHECK-ARM: arm_callee3:
+// CHECK-ARM: <arm_callee3>:
// CHECK-ARM-NEXT: 1604: 1e ff 2f e1 bx lr
// _start section just calls the arm and thumb calling sections
diff --git a/lld/test/ELF/arm-thumb-ldrlit.s b/lld/test/ELF/arm-thumb-ldrlit.s
index e2b086d77690..43bcf81b71ba 100644
--- a/lld/test/ELF/arm-thumb-ldrlit.s
+++ b/lld/test/ELF/arm-thumb-ldrlit.s
@@ -28,14 +28,14 @@ target2:
nop
bx lr
-// CHECK: 000110b4 _start:
+// CHECK: 000110b4 <_start>:
// CHECK-NEXT: 110b4: ldr r0, [pc, #0]
// CHECK-NEXT: 110b6: ldr r1, [pc, #1020]
-// CHECK: 000110b8 target1:
+// CHECK: 000110b8 <target1>:
// CHECK-NEXT: 110b8: nop
// CHECK-NEXT: 110ba: bx lr
-// CHECK: 000114b4 target2:
+// CHECK: 000114b4 <target2>:
// CHECK-NEXT: 114b4: nop
// CHECK-NEXT: 114b6: bx lr
diff --git a/lld/test/ELF/arm-thumb-mix-range-thunk-os.s b/lld/test/ELF/arm-thumb-mix-range-thunk-os.s
index 1e2221de696a..16eba5db13a7 100644
--- a/lld/test/ELF/arm-thumb-mix-range-thunk-os.s
+++ b/lld/test/ELF/arm-thumb-mix-range-thunk-os.s
@@ -60,7 +60,7 @@ _start:
bl afunc32
b afunc32
bne afunc32
-// CHECK1: afunc00:
+// CHECK1: <afunc00>:
// CHECK1-NEXT: 100000: 1e ff 2f e1 bx lr
// CHECK1-NEXT: 100004: fd ff 7b fa blx #32505844
// CHECK1-NEXT: 100008: fd ff 3b ea b #15728628
@@ -73,7 +73,7 @@ _start:
bl afunc14
// In range but need thunk to change state to Thumb
b.w afunc14
-// CHECK2: tfunc01:
+// CHECK2: <tfunc01>:
// CHECK2-NEXT: 200000: 70 47 bx lr
// CHECK2-NEXT: 200002: ff f0 fe c7 blx #13631484
// CHECK2-NEXT: 200006: 00 f2 03 90 b.w #14680070 <__Thumbv7ABSLongThunk_afunc14>
@@ -91,11 +91,11 @@ _start:
ARMFUNCTION 12
THUMBFUNCTION 13
ARMFUNCTION 14
-// CHECK3: __ARMv7ABSLongThunk_tfunc31:
+// CHECK3: <__ARMv7ABSLongThunk_tfunc31>:
// CHECK3-NEXT: 1000004: 01 c0 00 e3 movw r12, #1
// CHECK3-NEXT: 1000008: 00 c2 40 e3 movt r12, #512
// CHECK3-NEXT: 100000c: 1c ff 2f e1 bx r12
-// CHECK4: __Thumbv7ABSLongThunk_afunc14:
+// CHECK4: <__Thumbv7ABSLongThunk_afunc14>:
// CHECK4-NEXT: 1000010: 40 f2 00 0c movw r12, #0
// CHECK4-NEXT: 1000014: c0 f2 f0 0c movt r12, #240
// CHECK4-NEXT: 1000018: 60 47 bx r12
@@ -116,7 +116,7 @@ _start:
THUMBFUNCTION 29
ARMFUNCTION 30
// Expect precreated Thunk Section here
-// CHECK5: __Thumbv7ABSLongThunk_afunc00:
+// CHECK5: <__Thumbv7ABSLongThunk_afunc00>:
// CHECK5-NEXT: 1f00004: 40 f2 00 0c movw r12, #0
// CHECK5-NEXT: 1f00008: c0 f2 10 0c movt r12, #16
// CHECK5-NEXT: 1f0000c: 60 47 bx r12
@@ -125,12 +125,12 @@ _start:
THUMBFUNCTION 33
// Out of range, can only reach closest Thunk Section
bl afunc00
-// CHECK6: tfunc33:
+// CHECK6: <tfunc33>:
// CHECK6-NEXT: 2200000: 70 47 bx lr
// CHECK6-NEXT: 2200002: ff f4 ff ff bl #-3145730
ARMFUNCTION 34
// Out of range, can reach earlier Thunk Section
-// CHECK7: afunc34:
+// CHECK7: <afunc34>:
// CHECK7-NEXT: 2300000: 1e ff 2f e1 bx lr
// CHECK7-NEXT: 2300004: fe ff ef fa blx #-4194312 <__Thumbv7ABSLongThunk_afunc00
bl afunc00
@@ -146,7 +146,7 @@ _start:
ARMFUNCTION 44
THUMBFUNCTION 45
// Expect precreated Thunk Section here
-// CHECK8: __ARMv7ABSLongThunk_tfunc35:
+// CHECK8: <__ARMv7ABSLongThunk_tfunc35>:
// CHECK8-NEXT: 2e00004: 01 c0 00 e3 movw r12, #1
// CHECK8-NEXT: 2e00008: 40 c2 40 e3 movt r12, #576
// CHECK8-NEXT: 2e0000c: 1c ff 2f e1 bx r12
@@ -156,11 +156,11 @@ _start:
THUMBFUNCTION 49
ARMFUNCTION 50
// Expect precreated Thunk Section here
-// CHECK9: __Thumbv7ABSLongThunk_afunc34:
+// CHECK9: <__Thumbv7ABSLongThunk_afunc34>:
// CHECK9-NEXT: 3300004: 40 f2 00 0c movw r12, #0
// CHECK9-NEXT: 3300008: c0 f2 30 2c movt r12, #560
// CHECK9-NEXT: 330000c: 60 47 bx r12
-// CHECK9: __Thumbv7ABSLongThunk_tfunc35:
+// CHECK9: <__Thumbv7ABSLongThunk_tfunc35>:
// CHECK9-NEXT: 330000e: ff f4 f7 97 b.w #-15728658 <tfunc35>
THUMBFUNCTION 51
ARMFUNCTION 52
@@ -179,7 +179,7 @@ _start:
// afunc34 is in range, as is tfunc35 but a branch needs a state change Thunk
bl afunc34
b tfunc35
-// CHECK10: afunc64:
+// CHECK10: <afunc64>:
// CHECK10-NEXT: 4100000: 1e ff 2f e1 bx lr
// CHECK10-NEXT: 4100004: fd ff 87 eb bl #-31457292 <afunc34>
// CHECK10-NEXT: 4100008: fd ff b3 ea b #-19922956 <__ARMv7ABSLongThunk_tfunc35>
@@ -187,7 +187,7 @@ _start:
// afunc34 and tfunc35 are both out of range
bl afunc34
bl tfunc35
-// CHECK11: tfunc65:
+// CHECK11: <tfunc65>:
// CHECK11: 4200000: 70 47 bx lr
// CHECK11-NEXT: 4200002: ff f4 ff d7 bl #-15728642
// CHECK11-NEXT: 4200006: 00 f5 02 d0 bl #-15728636
diff --git a/lld/test/ELF/arm-thumb-narrow-branch-check.s b/lld/test/ELF/arm-thumb-narrow-branch-check.s
index 6c2dd1939b5a..60ad9f1646ba 100644
--- a/lld/test/ELF/arm-thumb-narrow-branch-check.s
+++ b/lld/test/ELF/arm-thumb-narrow-branch-check.s
@@ -51,12 +51,12 @@ callee_high_far = 0x180d
// CHECK: Disassembly of section .R_ARM_PC11_1:
// CHECK-EMPTY:
-// CHECK-NEXT: callee_low:
+// CHECK-NEXT: <callee_low>:
// CHECK-NEXT: 1000: 70 47 bx lr
// CHECK-EMPTY:
// CHECK-NEXT: Disassembly of section .caller:
// CHECK-EMPTY:
-// CHECK-NEXT: callers:
+// CHECK-NEXT: <callers>:
// 1004 - 0x800 (2048) + 4 = 0x808 = callee_low_far
// CHECK-NEXT: 1004: 00 e4 b #-2048
// 1006 - 0xa (10) + 4 = 0x1000 = callee_low
@@ -70,11 +70,11 @@ callee_high_far = 0x180d
// CHECK-EMPTY:
// CHECK-NEXT: Disassembly of section .R_ARM_PC11_2:
// CHECK-EMPTY:
-// CHECK-NEXT: callee_high:
+// CHECK-NEXT: <callee_high>:
// CHECK-NEXT: 1010: 70 47 bx lr
// CHECK-EMPTY:
// CHECK-NEXT: Disassembly of section .text:
// CHECK-EMPTY:
-// CHECK-NEXT: _start:
+// CHECK-NEXT: <_start>:
// CHECK-NEXT: 1014: ff f7 f6 ff bl #-20
// CHECK-NEXT: 1018: 70 47 bx lr
diff --git a/lld/test/ELF/arm-thumb-no-undefined-thunk.s b/lld/test/ELF/arm-thumb-no-undefined-thunk.s
index 7095093b8417..b47c291bed7d 100644
--- a/lld/test/ELF/arm-thumb-no-undefined-thunk.s
+++ b/lld/test/ELF/arm-thumb-no-undefined-thunk.s
@@ -18,7 +18,7 @@ _start:
// CHECK: Disassembly of section .text:
// CHECK-EMPTY:
-// CHECK-NEXT: _start:
+// CHECK-NEXT: <_start>:
// 0x110b8 = next instruction
// CHECK: 110b4: {{.*}} bl #0
// CHECK-NEXT: 110b8: {{.*}} b.w #0 <_start+0x8>
diff --git a/lld/test/ELF/arm-thumb-plt-range-thunk-os.s b/lld/test/ELF/arm-thumb-plt-range-thunk-os.s
index effbd920939f..e6227fc9f462 100644
--- a/lld/test/ELF/arm-thumb-plt-range-thunk-os.s
+++ b/lld/test/ELF/arm-thumb-plt-range-thunk-os.s
@@ -36,11 +36,11 @@ preemptible:
bx lr
// CHECK1: Disassembly of section .text:
// CHECK1-EMPTY:
-// CHECK1-NEXT: sym1:
+// CHECK1-NEXT: <sym1>:
// CHECK1-NEXT: 2000000: 00 f0 00 d8 bl #8388608
// CHECK1-NEXT: 2000004: 00 f0 04 d8 bl #8388616
// CHECK1-NEXT: 2000008: 70 47 bx lr
-// CHECK1: preemptible:
+// CHECK1: <preemptible>:
// CHECK1-NEXT: 200000a: 00 f0 07 d8 bl #8388622
// CHECK1-NEXT: 200000e: 00 f0 0b d8 bl #8388630
// CHECK1-NEXT: 2000012: 00 f0 09 d8 bl #8388626
@@ -49,22 +49,22 @@ preemptible:
.section .text.2, "ax", %progbits
.balign 0x0800000
bx lr
-// CHECK2: __ThumbV7PILongThunk_elsewhere:
+// CHECK2: <__ThumbV7PILongThunk_elsewhere>:
// CHECK2-NEXT: 2800004: 40 f2 20 0c movw r12, #32
// CHECK2-NEXT: 2800008: c0 f2 80 1c movt r12, #384
// CHECK2-NEXT: 280000c: fc 44 add r12, pc
// CHECK2-NEXT: 280000e: 60 47 bx r12
-// CHECK2: __ThumbV7PILongThunk_preemptible:
+// CHECK2: <__ThumbV7PILongThunk_preemptible>:
// CHECK2-NEXT: 2800010: 40 f2 24 0c movw r12, #36
// CHECK2-NEXT: 2800014: c0 f2 80 1c movt r12, #384
// CHECK2-NEXT: 2800018: fc 44 add r12, pc
// CHECK2-NEXT: 280001a: 60 47 bx r12
-// CHECK2: __ThumbV7PILongThunk_far_preemptible:
+// CHECK2: <__ThumbV7PILongThunk_far_preemptible>:
// CHECK2-NEXT: 280001c: 40 f2 28 0c movw r12, #40
// CHECK2-NEXT: 2800020: c0 f2 80 1c movt r12, #384
// CHECK2-NEXT: 2800024: fc 44 add r12, pc
// CHECK2-NEXT: 2800026: 60 47 bx r12
-// CHECK2: __ThumbV7PILongThunk_far_nonpreemptible:
+// CHECK2: <__ThumbV7PILongThunk_far_nonpreemptible>:
// CHECK2-NEXT: 2800028: 4f f6 cd 7c movw r12, #65485
// CHECK2-NEXT: 280002c: c0 f2 7f 1c movt r12, #383
// CHECK2-NEXT: 2800030: fc 44 add r12, pc
@@ -81,36 +81,36 @@ far_nonpreemptible:
far_nonpreemptible_alias:
bl elsewhere
-// CHECK3: far_preemptible:
+// CHECK3: <far_preemptible>:
// CHECK3: 4000000: 00 f0 16 e8 blx #44
// CHECK4: Disassembly of section .plt:
// CHECK4-EMPTY:
-// CHECK4-NEXT: $a:
+// CHECK4-NEXT: <$a>:
// CHECK4-NEXT: 4000010: 04 e0 2d e5 str lr, [sp, #-4]!
// CHECK4-NEXT: 4000014: 00 e6 8f e2 add lr, pc, #0, #12
// CHECK4-NEXT: 4000018: 02 ea 8e e2 add lr, lr, #8192
// CHECK4-NEXT: 400001c: a4 f0 be e5 ldr pc, [lr, #164]!
-// CHECK4: $d:
+// CHECK4: <$d>:
// CHECK4-NEXT: 4000020: d4 d4 d4 d4 .word 0xd4d4d4d4
// CHECK4-NEXT: 4000024: d4 d4 d4 d4 .word 0xd4d4d4d4
// CHECK4-NEXT: 4000028: d4 d4 d4 d4 .word 0xd4d4d4d4
// CHECK4-NEXT: 400002c: d4 d4 d4 d4 .word 0xd4d4d4d4
-// CHECK4: $a:
+// CHECK4: <$a>:
// CHECK4-NEXT: 4000030: 00 c6 8f e2 add r12, pc, #0, #12
// CHECK4-NEXT: 4000034: 02 ca 8c e2 add r12, r12, #8192
// CHECK4-NEXT: 4000038: 8c f0 bc e5 ldr pc, [r12, #140]!
-// CHECK4: $d:
+// CHECK4: <$d>:
// CHECK4-NEXT: 400003c: d4 d4 d4 d4 .word 0xd4d4d4d4
-// CHECK4: $a:
+// CHECK4: <$a>:
// CHECK4-NEXT: 4000040: 00 c6 8f e2 add r12, pc, #0, #12
// CHECK4-NEXT: 4000044: 02 ca 8c e2 add r12, r12, #8192
// CHECK4-NEXT: 4000048: 80 f0 bc e5 ldr pc, [r12, #128]!
-// CHECK4: $d:
+// CHECK4: <$d>:
// CHECK4-NEXT: 400004c: d4 d4 d4 d4 .word 0xd4d4d4d4
-// CHECK4: $a:
+// CHECK4: <$a>:
// CHECK4-NEXT: 4000050: 00 c6 8f e2 add r12, pc, #0, #12
// CHECK4-NEXT: 4000054: 02 ca 8c e2 add r12, r12, #8192
// CHECK4-NEXT: 4000058: 74 f0 bc e5 ldr pc, [r12, #116]!
-// CHECK4: $d:
+// CHECK4: <$d>:
// CHECK4-NEXT: 400005c: d4 d4 d4 d4 .word 0xd4d4d4d4
diff --git a/lld/test/ELF/arm-thumb-plt-reloc.s b/lld/test/ELF/arm-thumb-plt-reloc.s
index ca264698dea4..d12477609b67 100644
--- a/lld/test/ELF/arm-thumb-plt-reloc.s
+++ b/lld/test/ELF/arm-thumb-plt-reloc.s
@@ -24,14 +24,14 @@ _start:
// Executable, expect no PLT
// CHECK: Disassembly of section .text:
// CHECK-EMPTY:
-// CHECK-NEXT: func1:
+// CHECK-NEXT: <func1>:
// CHECK-NEXT: 110b4: 70 47 bx lr
-// CHECK: func2:
+// CHECK: <func2>:
// CHECK-NEXT: 110b6: 70 47 bx lr
-// CHECK: func3:
+// CHECK: <func3>:
// CHECK-NEXT: 110b8: 70 47 bx lr
// CHECK-NEXT: 110ba: d4 d4
-// CHECK: _start:
+// CHECK: <_start>:
// . + 4 -12 = 0x110b4 = func1
// CHECK-NEXT: 110bc: ff f7 fa ff bl #-12
// . + 4 -14 = 0x110b6 = func2
@@ -44,14 +44,14 @@ _start:
// as ARM or Thumb. Work around by disassembling twice.
// DSO: Disassembly of section .text:
// DSO-EMPTY:
-// DSO-NEXT: func1:
+// DSO-NEXT: <func1>:
// DSO-NEXT: 1214: 70 47 bx lr
-// DSO: func2:
+// DSO: <func2>:
// DSO-NEXT: 1216: 70 47 bx lr
-// DSO: func3:
+// DSO: <func3>:
// DSO-NEXT: 1218: 70 47 bx lr
// DSO-NEXT: 121a: d4 d4 bmi #-88
-// DSO: _start:
+// DSO: <_start>:
// . + 48 + 4 = 0x1250 = PLT func1
// DSO-NEXT: 121c: 00 f0 18 e8 blx #48
// . + 60 + 4 = 0x1260 = PLT func2
@@ -60,38 +60,38 @@ _start:
// DSO-NEXT: 1224: 00 f0 24 e8 blx #72
// DSO: Disassembly of section .plt:
// DSO-EMPTY:
-// DSO-NEXT: $a:
+// DSO-NEXT: <$a>:
// DSO-NEXT: 1230: 04 e0 2d e5 str lr, [sp, #-4]!
// (0x1234 + 8) + (0 RoR 12) + 8192 + 164 = 0x32e0 = .got.plt[3]
// DSO-NEXT: 1234: 00 e6 8f e2 add lr, pc, #0, #12
// DSO-NEXT: 1238: 02 ea 8e e2 add lr, lr, #8192
// DSO-NEXT: 123c: a4 f0 be e5 ldr pc, [lr, #164]!
-// DSO: $d:
+// DSO: <$d>:
// DSO-NEXT: 1240: d4 d4 d4 d4 .word 0xd4d4d4d4
// DSO-NEXT: 1244: d4 d4 d4 d4 .word 0xd4d4d4d4
// DSO-NEXT: 1248: d4 d4 d4 d4 .word 0xd4d4d4d4
// DSO-NEXT: 124c: d4 d4 d4 d4 .word 0xd4d4d4d4
-// DSO: $a:
+// DSO: <$a>:
// (0x1250 + 8) + (0 RoR 12) + 8192 + 140 = 0x32e4
// DSO-NEXT: 1250: 00 c6 8f e2 add r12, pc, #0, #12
// DSO-NEXT: 1254: 02 ca 8c e2 add r12, r12, #8192
// DSO-NEXT: 1258: 8c f0 bc e5 ldr pc, [r12, #140]!
-// DSO: $d:
+// DSO: <$d>:
// DSO-NEXT: 125c: d4 d4 d4 d4 .word 0xd4d4d4d4
-// DSO: $a:
+// DSO: <$a>:
// (0x1260 + 8) + (0 RoR 12) + 8192 + 128 = 0x32e8
// DSO-NEXT: 1260: 00 c6 8f e2 add r12, pc, #0, #12
// DSO-NEXT: 1264: 02 ca 8c e2 add r12, r12, #8192
// DSO-NEXT: 1268: 80 f0 bc e5 ldr pc, [r12, #128]!
-// DSO: $d:
+// DSO: <$d>:
// DSO-NEXT: 126c: d4 d4 d4 d4 .word 0xd4d4d4d4
-// DSO: $a:
+// DSO: <$a>:
// (0x1270 + 8) + (0 RoR 12) + 8192 + 116 = 0x32ec
// DSO-NEXT: 1270: 00 c6 8f e2 add r12, pc, #0, #12
// DSO-NEXT: 1274: 02 ca 8c e2 add r12, r12, #8192
// DSO-NEXT: 1278: 74 f0 bc e5 ldr pc, [r12, #116]!
-// DSO: $d:
+// DSO: <$d>:
// DSO-NEXT: 127c: d4 d4 d4 d4 .word 0xd4d4d4d4
// DSOREL: Name: .got.plt
diff --git a/lld/test/ELF/arm-thumb-range-thunk-os.s b/lld/test/ELF/arm-thumb-range-thunk-os.s
index eedd39168769..b09411ce1d8b 100644
--- a/lld/test/ELF/arm-thumb-range-thunk-os.s
+++ b/lld/test/ELF/arm-thumb-range-thunk-os.s
@@ -44,22 +44,22 @@ _start:
bl tfunc16
// CHECK1: Disassembly of section .text:
// CHECK1-EMPTY:
-// CHECK1-NEXT: _start:
+// CHECK1-NEXT: <_start>:
// CHECK1-NEXT: 100000: ff f0 fe ff bl #1048572
// CHECK1-NEXT: 100004: ff f3 fc d7 bl #16777208
// CHECK1-NEXT: 100008: ff f2 fc d7 bl #15728632
FUNCTION 00
-// CHECK2: tfunc00:
+// CHECK2: <tfunc00>:
// CHECK2-NEXT: 200000: 70 47 bx lr
FUNCTION 01
-// CHECK3: tfunc01:
+// CHECK3: <tfunc01>:
// CHECK3-NEXT: 300000: 70 47 bx lr
FUNCTION 02
// tfunc28 is > 16Mb away, expect a Range Thunk to be generated, to go into
// the first of the pre-created ThunkSections.
b.w tfunc28
-// CHECK4: tfunc02:
+// CHECK4: <tfunc02>:
// CHECK4-NEXT: 400000: 70 47 bx lr
// CHECK4-NEXT: 400002: 00 f0 01 90 b.w #12582914 <__Thumbv7ABSLongThunk_tfunc28>
FUNCTION 03
@@ -75,19 +75,19 @@ _start:
FUNCTION 13
FUNCTION 14
// Expect precreated ThunkSection here
-// CHECK5: __Thumbv7ABSLongThunk_tfunc16:
+// CHECK5: <__Thumbv7ABSLongThunk_tfunc16>:
// CHECK5-NEXT: 1000004: ff f1 fc bf b.w #2097144 <tfunc16>
-// CHECK5: __Thumbv7ABSLongThunk_tfunc28:
+// CHECK5: <__Thumbv7ABSLongThunk_tfunc28>:
// CHECK5-NEXT: 1000008: ff f1 fa 97 b.w #14680052 <tfunc28>
-// CHECK5: __Thumbv7ABSLongThunk_tfunc32:
+// CHECK5: <__Thumbv7ABSLongThunk_tfunc32>:
// CHECK5-NEXT: 100000c: 40 f2 01 0c movw r12, #1
// CHECK5-NEXT: 1000010: c0 f2 20 2c movt r12, #544
// CHECK5-NEXT: 1000014: 60 47 bx r12
-// CHECK5: __Thumbv7ABSLongThunk_tfunc33:
+// CHECK5: <__Thumbv7ABSLongThunk_tfunc33>:
// CHECK5-NEXT: 1000016: 40 f2 01 0c movw r12, #1
// CHECK5-NEXT: 100001a: c0 f2 30 2c movt r12, #560
// CHECK5-NEXT: 100001e: 60 47 bx r12
-// CHECK5: __Thumbv7ABSLongThunk_tfunc02:
+// CHECK5: <__Thumbv7ABSLongThunk_tfunc02>:
// CHECK5-NEXT: 1000020: ff f7 ee 97 b.w #-12582948 <tfunc02>
FUNCTION 15
// tfunc00 and tfunc01 are < 16Mb away, expect no range extension thunks
@@ -97,7 +97,7 @@ _start:
// precreated thunk section
bl tfunc32
bl tfunc33
-// CHECK6: tfunc15:
+// CHECK6: <tfunc15>:
// CHECK6-NEXT: 1100000: 70 47 bx lr
// CHECK6-NEXT: 1100002: ff f4 fd d7 bl #-15728646
// CHECK6-NEXT: 1100006: ff f5 fb d7 bl #-14680074
@@ -107,9 +107,9 @@ _start:
FUNCTION 17
FUNCTION 18
// Expect another precreated thunk section here
-// CHECK7: __Thumbv7ABSLongThunk_tfunc15:
+// CHECK7: <__Thumbv7ABSLongThunk_tfunc15>:
// CHECK7-NEXT: 1400004: ff f4 fc bf b.w #-3145736 <tfunc15>
-// CHECK7: __Thumbv7ABSLongThunk_tfunc16:
+// CHECK7: <__Thumbv7ABSLongThunk_tfunc16>:
// CHECK7-NEXT: 1400008: ff f5 fa bf b.w #-2097164 <tfunc16>
FUNCTION 19
FUNCTION 20
@@ -123,7 +123,7 @@ _start:
FUNCTION 28
// tfunc02 is > 16Mb away, expect range extension thunks in precreated thunk
// section
-// CHECK8: tfunc28:
+// CHECK8: <tfunc28>:
// CHECK8-NEXT: 1e00000: 70 47 bx lr
// CHECK8-NEXT: 1e00002: 00 f6 0d 90 b.w #-14680038 <__Thumbv7ABSLongThunk_tfunc02>
@@ -136,7 +136,7 @@ _start:
// precreated thunk section.
bl tfunc15
bl tfunc16
-// CHECK9: tfunc32:
+// CHECK9: <tfunc32>:
// CHECK9: 2200000: 70 47 bx lr
// CHECK9-NEXT: 2200002: ff f5 ff d7 bl #-14680066
// CHECK9-NEXT: 2200006: ff f5 ff d7 bl #-14680066
@@ -144,7 +144,7 @@ _start:
FUNCTION 33
bl tfunc15
bl tfunc16
-// CHECK10: tfunc33:
+// CHECK10: <tfunc33>:
// CHECK10: 2300000: 70 47 bx lr
// CHECK10-NEXT: 2300002: ff f4 ff d7 bl #-15728642
// CHECK10-NEXT: 2300006: ff f4 ff d7 bl #-15728642
diff --git a/lld/test/ELF/arm-thumb-thunk-empty-pass.s b/lld/test/ELF/arm-thumb-thunk-empty-pass.s
index b38c6aee570e..d6eb111f8bd2 100644
--- a/lld/test/ELF/arm-thumb-thunk-empty-pass.s
+++ b/lld/test/ELF/arm-thumb-thunk-empty-pass.s
@@ -17,14 +17,14 @@ foo:
// CHECK: Disassembly of section .text:
// CHECK-EMPTY:
-// CHECK-NEXT: _start:
+// CHECK-NEXT: <_start>:
// CHECK-NEXT: 110b4: ff f7 fe ff bl #-4
-// CHECK: __Thumbv7ABSLongThunk__start:
+// CHECK: <__Thumbv7ABSLongThunk__start>:
// CHECK-NEXT: 110b8: ff f7 fc bf b.w #-8 <_start>
-// CHECK: __Thumbv7ABSLongThunk__start:
+// CHECK: <__Thumbv7ABSLongThunk__start>:
// CHECK: 10110bc: 41 f2 b5 0c movw r12, #4277
// CHECK-NEXT: 10110c0: c0 f2 01 0c movt r12, #1
// CHECK-NEXT: 10110c4: 60 47 bx r12
-// CHECK: foo:
+// CHECK: <foo>:
// CHECK-NEXT: 10110c6: ff f7 f9 ff bl #-14
diff --git a/lld/test/ELF/arm-thumb-thunk-v6m.s b/lld/test/ELF/arm-thumb-thunk-v6m.s
index 2bb9f488c246..65367a53a8c6 100644
--- a/lld/test/ELF/arm-thumb-thunk-v6m.s
+++ b/lld/test/ELF/arm-thumb-thunk-v6m.s
@@ -32,9 +32,9 @@ far:
// CHECK: Disassembly of section .text_low:
// CHECK-EMPTY:
-// CHECK-NEXT: _start:
+// CHECK-NEXT: <_start>:
// CHECK-NEXT: 94: 00 f0 00 f8 bl #0
-// CHECK: __Thumbv6MABSLongThunk_far:
+// CHECK: <__Thumbv6MABSLongThunk_far>:
// CHECK-NEXT: 98: 03 b4 push {r0, r1}
// CHECK-NEXT: 9a: 01 48 ldr r0, [pc, #4]
// CHECK-NEXT: 9c: 01 90 str r0, [sp, #4]
@@ -42,14 +42,14 @@ far:
// CHECK: a0: 01 00 00 02 .word 0x02000001
// CHECK: Disassembly of section .text_high:
// CHECK-EMPTY:
-// CHECK-NEXT: far:
+// CHECK-NEXT: <far>:
// CHECK-NEXT: 2000000: 70 47 bx lr
// CHECK-PI: Disassembly of section .text_low:
// CHECK-PI-EMPTY:
-// CHECK-PI-NEXT: _start:
+// CHECK-PI-NEXT: <_start>:
// CHECK-PI-NEXT: 130: 00 f0 00 f8 bl #0
-// CHECK-PI: __Thumbv6MPILongThunk_far:
+// CHECK-PI: <__Thumbv6MPILongThunk_far>:
// CHECK-PI-NEXT: 134: 01 b4 push {r0}
// CHECK-PI-NEXT: 136: 02 48 ldr r0, [pc, #8]
// CHECK-PI-NEXT: 138: 84 46 mov r12, r0
@@ -61,5 +61,5 @@ far:
// CHECK-PI: Disassembly of section .text_high:
// CHECK-PI-EMPTY:
-// CHECK-PI-NEXT: far:
+// CHECK-PI-NEXT: <far>:
// CHECK-PI-NEXT: 2000000: 70 47 bx lr
diff --git a/lld/test/ELF/arm-thumb-undefined-weak-narrow.test b/lld/test/ELF/arm-thumb-undefined-weak-narrow.test
index 5fd09e9ebcfb..2215c9d61e56 100644
--- a/lld/test/ELF/arm-thumb-undefined-weak-narrow.test
+++ b/lld/test/ELF/arm-thumb-undefined-weak-narrow.test
@@ -5,7 +5,7 @@
# CHECK: Disassembly of section .text:
# CHECK-EMPTY:
-# CHECK-NEXT:_start:
+# CHECK-NEXT: <_start>:
# CHECK-NEXT: ff e7 b #-2
# Test the R_ARM_THM_JUMP11 relocation (102) to an undefined weak reference
diff --git a/lld/test/ELF/arm-thumb2-adr.s b/lld/test/ELF/arm-thumb2-adr.s
index 1de8d6c3b12a..86b29ad9e111 100644
--- a/lld/test/ELF/arm-thumb2-adr.s
+++ b/lld/test/ELF/arm-thumb2-adr.s
@@ -100,12 +100,12 @@ dat8:
// SYMS: Name: dat4
// SYMS-NEXT: Value: 0x8015
-// CHECK: 00008f00 target1:
+// CHECK: 00008f00 <target1>:
// CHECK-NEXT: 8f00: bx lr
-// CHECK: 00008f02 target2:
+// CHECK: 00008f02 <target2>:
// CHECK-NEXT: 8f02: bx lr
-// CHECK: 00009000 _start:
+// CHECK: 00009000 <_start>:
// CHECK-NEXT: 9000: nop
/// AlignDown(0x9002+4, 4) - 0xff2 = 0x8012
// CHECK-NEXT: 9002: adr.w r0, #-4082
@@ -122,7 +122,7 @@ dat8:
/// AlignDown(0x901a+4, 4) - 0x119 = 0x8f03
// CHECK-NEXT: 901a: adr.w r1, #-281
-// CHECK: 00010000 pos:
+// CHECK: 00010000 <pos>:
/// AlignDown(0x10000+4, 4) + 0xfd = 0x10101
// CHECK-NEXT: 10000: adr.w r2, #253
// CHECK-NEXT: 10004: nop
@@ -141,10 +141,10 @@ dat8:
/// AlignDown(0x1001e+4, 4) + 0xff7 = 0x11017 = dat5 + 8
// CHECK-NEXT: 1001e: adr.w r4, #4087
-// CHECK: 00010100 target3:
+// CHECK: 00010100 <target3>:
// CHECK-NEXT: 10100: bx lr
-// CHECK: 00010102 target4:
+// CHECK: 00010102 <target4>:
// CHECK-NEXT: 10102: bx lr
// SYMS: Name: dat5
diff --git a/lld/test/ELF/arm-thumb2-ldrlit.s b/lld/test/ELF/arm-thumb2-ldrlit.s
index 12b88d7f5697..cbf092208740 100644
--- a/lld/test/ELF/arm-thumb2-ldrlit.s
+++ b/lld/test/ELF/arm-thumb2-ldrlit.s
@@ -100,12 +100,12 @@ dat8:
// SYMS: Name: dat4
// SYMS-NEXT: Value: 0x8015
-// CHECK: 00008f00 target1:
+// CHECK: 00008f00 <target1>:
// CHECK-NEXT: 8f00: bx lr
-// CHECK: 00008f02 target2:
+// CHECK: 00008f02 <target2>:
// CHECK-NEXT: 8f02: bx lr
-// CHECK: 00009000 _start:
+// CHECK: 00009000 <_start>:
// CHECK-NEXT: 9000: nop
/// AlignDown(0x9002+4, 4) - 0xff2 = 0x8012
// CHECK-NEXT: 9002: ldr.w r0, [pc, #-4082]
@@ -122,7 +122,7 @@ dat8:
/// AlignDown(0x901a+4, 4) - 0x11a = 0x8f02
// CHECK-NEXT: 901a: ldr.w r1, [pc, #-282]
-// CHECK: 00010000 pos:
+// CHECK: 00010000 <pos>:
/// AlignDown(0x10000+4, 4) + 0x1c = 0x10100
// CHECK-NEXT: 10000: ldr.w r2, [pc, #252]
// CHECK-NEXT: 10004: nop
@@ -141,10 +141,10 @@ dat8:
/// AlignDown(0x1001e+4, 4) + 0xff7 = 0x11017 = dat5 + 8
// CHECK-NEXT: 1001e: ldr.w r4, [pc, #4087]
-// CHECK: 00010100 target3:
+// CHECK: 00010100 <target3>:
// CHECK-NEXT: 10100: bx lr
-// CHECK: 00010102 target4:
+// CHECK: 00010102 <target4>:
// CHECK-NEXT: 10102: bx lr
// SYMS: Name: dat5
diff --git a/lld/test/ELF/arm-thunk-edgecase.s b/lld/test/ELF/arm-thunk-edgecase.s
index b7414cafddef..d66f3348a9fd 100644
--- a/lld/test/ELF/arm-thunk-edgecase.s
+++ b/lld/test/ELF/arm-thunk-edgecase.s
@@ -29,10 +29,10 @@ armfunc:
thumbfunc:
b.w armfunc
-// ARM-TO-THUMB: __ARMV7PILongThunk_thumbfunc:
+// ARM-TO-THUMB: <__ARMV7PILongThunk_thumbfunc>:
// ARM-TO-THUMB-NEXT: 1004: fd cf 0f e3 movw r12, #65533
// ARM-TO-THUMB-NEXT: 1008: 00 c0 40 e3 movt r12, #0
-// THUMB-TO-ARM: __ThumbV7PILongThunk_armfunc:
+// THUMB-TO-ARM: <__ThumbV7PILongThunk_armfunc>:
// THUMB-TO-ARM-NEXT: 1004: 4f f6 fc 7c movw r12, #65532
// THUMB-TO-ARM-NEXT: 1008: c0 f2 00 0c movt r12, #0
diff --git a/lld/test/ELF/arm-thunk-largesection.s b/lld/test/ELF/arm-thunk-largesection.s
index 9ddae477f0af..c8f10e30283e 100644
--- a/lld/test/ELF/arm-thunk-largesection.s
+++ b/lld/test/ELF/arm-thunk-largesection.s
@@ -17,14 +17,14 @@ _start:
.space 0x1000
// CHECK1: Disassembly of section .text:
// CHECK1-EMPTY:
-// CHECK1-NEXT:_start:
+// CHECK1-NEXT: <_start>:
// CHECK1-NEXT: 12000: 70 47 bx lr
// CHECK1-EMPTY:
-// CHECK1-NEXT:$d.1:
+// CHECK1-NEXT: <$d.1>:
// CHECK1-NEXT: 12002: 00 00 00 00 .word 0x00000000
-// CHECK2: __Thumbv7ABSLongThunk__start:
+// CHECK2: <__Thumbv7ABSLongThunk__start>:
// CHECK2-NEXT: 13004: fe f7 fc bf b.w #-4104 <_start>
// Gigantic section where we need a ThunkSection either side of it
@@ -38,7 +38,7 @@ _start:
// CHECK3: 1012ff8: 00 f4 04 d0 bl #-16777208
// CHECK4: 2012ff8: ff f3 f8 d7 bl #16777200
-// CHECK5: __Thumbv7ABSLongThunk__start:
+// CHECK5: <__Thumbv7ABSLongThunk__start>:
// CHECK5-NEXT: 3012fec: 42 f2 01 0c movw r12, #8193
// CHECK5-NEXT: 3012ff0: c0 f2 01 0c movt r12, #1
// CHECK5-NEXT: 3012ff4: 60 47 bx r12
diff --git a/lld/test/ELF/arm-thunk-linkerscript-dotexpr.s b/lld/test/ELF/arm-thunk-linkerscript-dotexpr.s
index 63017d8f67c5..7e053dfda6bb 100644
--- a/lld/test/ELF/arm-thunk-linkerscript-dotexpr.s
+++ b/lld/test/ELF/arm-thunk-linkerscript-dotexpr.s
@@ -29,20 +29,20 @@ low_target2:
bl high_target2
// CHECK1: Disassembly of section .text_low:
// CHECK1-EMPTY:
-// CHECK1-NEXT: _start:
+// CHECK1-NEXT: <_start>:
// CHECK1-NEXT: 94: 70 47 bx lr
-// CHECK1: low_target:
+// CHECK1: <low_target>:
// CHECK1-NEXT: 96: 00 f0 03 f8 bl #6
// CHECK1-NEXT: 9a: 00 f0 06 f8 bl #12
-// CHECK1: __Thumbv7ABSLongThunk_high_target:
+// CHECK1: <__Thumbv7ABSLongThunk_high_target>:
// CHECK1-NEXT: a0: 40 f2 bd 0c movw r12, #189
// CHECK1-NEXT: a4: c0 f2 00 2c movt r12, #512
// CHECK1-NEXT: a8: 60 47 bx r12
-// CHECK1: __Thumbv7ABSLongThunk_high_target2:
+// CHECK1: <__Thumbv7ABSLongThunk_high_target2>:
// CHECK1-NEXT: aa: 40 f2 d9 0c movw r12, #217
// CHECK1-NEXT: ae: c0 f2 00 2c movt r12, #512
// CHECK1-NEXT: b2: 60 47 bx r12
-// CHECK1: low_target2:
+// CHECK1: <low_target2>:
// CHECK1-NEXT: b4: ff f7 f4 ff bl #-24
// CHECK1-NEXT: b8: ff f7 f7 ff bl #-18
@@ -62,17 +62,17 @@ high_target2:
bl low_target
bl low_target2
-// CHECK2: high_target:
+// CHECK2: <high_target>:
// CHECK2-NEXT: 20000bc: 00 f0 02 f8 bl #4
// CHECK2-NEXT: 20000c0: 00 f0 05 f8 bl #10
-// CHECK2: __Thumbv7ABSLongThunk_low_target:
+// CHECK2: <__Thumbv7ABSLongThunk_low_target>:
// CHECK2-NEXT: 20000c4: 40 f2 97 0c movw r12, #151
// CHECK2-NEXT: 20000c8: c0 f2 00 0c movt r12, #0
// CHECK2-NEXT: 20000cc: 60 47 bx r12
-// CHECK2: __Thumbv7ABSLongThunk_low_target2:
+// CHECK2: <__Thumbv7ABSLongThunk_low_target2>:
// CHECK2-NEXT: 20000ce: 40 f2 b5 0c movw r12, #181
// CHECK2-NEXT: 20000d2: c0 f2 00 0c movt r12, #0
// CHECK2-NEXT: 20000d6: 60 47 bx r12
-// CHECK2: high_target2:
+// CHECK2: <high_target2>:
// CHECK2-NEXT: 20000d8: ff f7 f4 ff bl #-24
// CHECK2-NEXT: 20000dc: ff f7 f7 ff bl #-18
diff --git a/lld/test/ELF/arm-thunk-linkerscript-large.s b/lld/test/ELF/arm-thunk-linkerscript-large.s
index 95c77bd47aec..325cee02ebff 100644
--- a/lld/test/ELF/arm-thunk-linkerscript-large.s
+++ b/lld/test/ELF/arm-thunk-linkerscript-large.s
@@ -54,10 +54,10 @@ _start:
bl tfunch31
// CHECK1: Disassembly of section .text:
// CHECK1-EMPTY:
-// CHECK1-NEXT: _start:
+// CHECK1-NEXT: <_start>:
// CHECK1-NEXT: 100000: ff f0 fe ff bl #1048572
// CHECK1-NEXT: 100004: 00 f0 00 f8 bl #0
-// CHECK1: __Thumbv7ABSLongThunk_tfunch31:
+// CHECK1: <__Thumbv7ABSLongThunk_tfunch31>:
// CHECK1-NEXT: 100008: 40 f2 01 0c movw r12, #1
// CHECK1-NEXT: 10000c: c0 f2 10 4c movt r12, #1040
// CHECK1-NEXT: 100010: 60 47 bx r12
@@ -68,7 +68,7 @@ _start:
bl tfunch31
// CHECK2: Disassembly of section .textl:
// CHECK2-EMPTY:
-// CHECK2-NEXT: tfuncl00:
+// CHECK2-NEXT: <tfuncl00>:
// CHECK2-NEXT: 200000: 70 47 bx lr
// CHECK2-NEXT: 200002: ff f0 ff df bl #9437182
// CHECK2-NEXT: 200006: ff f6 ff ff bl #-1048578
@@ -81,7 +81,7 @@ _start:
FUNCTIONL 07
FUNCTIONL 08
FUNCTIONL 09
-// CHECK3: __Thumbv7ABSLongThunk_tfuncl24:
+// CHECK3: <__Thumbv7ABSLongThunk_tfuncl24>:
// CHECK3-NEXT: b00004: ff f2 fc 97 b.w #15728632 <tfuncl24>
FUNCTIONL 10
FUNCTIONL 11
@@ -113,7 +113,7 @@ _start:
// CHECK4: 2100002: 00 f0 05 f8 bl #10
// CHECK4-NEXT: 2100006: ff f4 fb f7 bl #-7340042
// CHECK4-NEXT: 210000a: ff f0 f9 ff bl #1048562
-// CHECK4: __Thumbv7ABSLongThunk_tfuncl00:
+// CHECK4: <__Thumbv7ABSLongThunk_tfuncl00>:
// CHECK4-NEXT: 2100010: 40 f2 01 0c movw r12, #1
// CHECK4-NEXT: 2100014: c0 f2 20 0c movt r12, #32
// CHECK4-NEXT: 2100018: 60 47 bx r12
@@ -125,7 +125,7 @@ _start:
bl tfuncl31
// CHECK5: Disassembly of section .texth:
// CHECK5-EMPTY:
-// CHECK5-NEXT: tfunch00:
+// CHECK5-NEXT: <tfunch00>:
// CHECK5-NEXT: 2200000: 70 47 bx lr
// CHECK5-NEXT: 2200002: 00 f7 05 f8 bl #-1048566
// CHECK5-NEXT: 2200006: ff f7 fb df bl #-8388618
@@ -164,15 +164,15 @@ _start:
// expect Thunks in .texth
bl tfuncl00
bl tfunch00
-// CHECK6: tfunch31:
+// CHECK6: <tfunch31>:
// CHECK6-NEXT: 4100000: 70 47 bx lr
// CHECK6-NEXT: 4100002: 00 f0 03 f8 bl #6
// CHECK6-NEXT: 4100006: 00 f0 06 f8 bl #12
-// CHECK6: __Thumbv7ABSLongThunk_tfuncl00:
+// CHECK6: <__Thumbv7ABSLongThunk_tfuncl00>:
// CHECK6-NEXT: 410000c: 40 f2 01 0c movw r12, #1
// CHECK6-NEXT: 4100010: c0 f2 20 0c movt r12, #32
// CHECK6-NEXT: 4100014: 60 47 bx r12
-// CHECK6: __Thumbv7ABSLongThunk_tfunch00:
+// CHECK6: <__Thumbv7ABSLongThunk_tfunch00>:
// CHECK6-NEXT: 4100016: 40 f2 01 0c movw r12, #1
// CHECK6-NEXT: 410001a: c0 f2 20 2c movt r12, #544
// CHECK6-NEXT: 410001e: 60 47 bx r12
diff --git a/lld/test/ELF/arm-thunk-linkerscript-orphan.s b/lld/test/ELF/arm-thunk-linkerscript-orphan.s
index 56b0f7f49045..f1eb75a4e549 100644
--- a/lld/test/ELF/arm-thunk-linkerscript-orphan.s
+++ b/lld/test/ELF/arm-thunk-linkerscript-orphan.s
@@ -19,16 +19,16 @@ low_target:
bl orphan_target
// CHECK: Disassembly of section .text_low:
// CHECK-EMPTY:
-// CHECK-NEXT: _start:
+// CHECK-NEXT: <_start>:
// CHECK-NEXT: 100000: 70 47 bx lr
-// CHECK: low_target:
+// CHECK: <low_target>:
// CHECK-NEXT: 100002: 00 f0 03 f8 bl #6
// CHECK-NEXT: 100006: 00 f0 06 f8 bl #12
-// CHECK: __Thumbv7ABSLongThunk_high_target:
+// CHECK: <__Thumbv7ABSLongThunk_high_target>:
// CHECK-NEXT: 10000c: 40 f2 01 0c movw r12, #1
// CHECK-NEXT: 100010: c0 f2 00 2c movt r12, #512
// CHECK-NEXT: 100014: 60 47 bx r12
-// CHECK: __Thumbv7ABSLongThunk_orphan_target:
+// CHECK: <__Thumbv7ABSLongThunk_orphan_target>:
// CHECK-NEXT: 100016: 40 f2 15 0c movw r12, #21
// CHECK-NEXT: 10001a: c0 f2 00 2c movt r12, #512
// CHECK-NEXT: 10001e: 60 47 bx r12
@@ -41,10 +41,10 @@ high_target:
bl orphan_target
// CHECK: Disassembly of section .text_high:
// CHECK-EMPTY:
-// CHECK-NEXT: high_target:
+// CHECK-NEXT: <high_target>:
// CHECK-NEXT: 2000000: 00 f0 02 f8 bl #4
// CHECK-NEXT: 2000004: 00 f0 06 f8 bl #12
-// CHECK: __Thumbv7ABSLongThunk_low_target:
+// CHECK: <__Thumbv7ABSLongThunk_low_target>:
// CHECK-NEXT: 2000008: 40 f2 03 0c movw r12, #3
// CHECK-NEXT: 200000c: c0 f2 10 0c movt r12, #16
// CHECK-NEXT: 2000010: 60 47 bx r12
@@ -58,7 +58,7 @@ orphan_target:
bl high_target
// CHECK: Disassembly of section orphan:
// CHECK-EMPTY:
-// CHECK-NEXT: orphan_target:
+// CHECK-NEXT: <orphan_target>:
// CHECK-NEXT: 2000014: ff f7 f8 ff bl #-16
// CHECK-NEXT: 2000018: ff f7 f2 ff bl #-28
diff --git a/lld/test/ELF/arm-thunk-linkerscript-sort.s b/lld/test/ELF/arm-thunk-linkerscript-sort.s
index 20706d9680f5..555bcb3cf9af 100644
--- a/lld/test/ELF/arm-thunk-linkerscript-sort.s
+++ b/lld/test/ELF/arm-thunk-linkerscript-sort.s
@@ -40,7 +40,7 @@ tfunc\suff\():
FUNCTION 17
FUNCTION 16
FUNCTION 15
-// CHECK2: __Thumbv7ABSLongThunk_tfunc31:
+// CHECK2: <__Thumbv7ABSLongThunk_tfunc31>:
// CHECK2-NEXT: 1000004: ff f3 fc 97 b.w #16777208 <tfunc31>
FUNCTION 14
FUNCTION 13
@@ -64,6 +64,6 @@ _start:
// tfunc31
bl tfunc01
bl tfunc31
-// CHECK1: _start:
+// CHECK1: <_start>:
// CHECK1-NEXT: 100000: ff f0 fe ff bl #1048572
// CHECK1-NEXT: 100004: ff f2 fe d7 bl #15728636
diff --git a/lld/test/ELF/arm-thunk-linkerscript.s b/lld/test/ELF/arm-thunk-linkerscript.s
index f2a40b4b13dd..6a1fe2fd5aa9 100644
--- a/lld/test/ELF/arm-thunk-linkerscript.s
+++ b/lld/test/ELF/arm-thunk-linkerscript.s
@@ -29,20 +29,20 @@ low_target2:
// CHECK: Disassembly of section .text_low:
// CHECK-EMPTY:
-// CHECK-NEXT: _start:
+// CHECK-NEXT: <_start>:
// CHECK-NEXT: 94: 70 47 bx lr
-// CHECK: low_target:
+// CHECK: <low_target>:
// CHECK-NEXT: 96: 00 f0 03 f8 bl #6
// CHECK-NEXT: 9a: 00 f0 06 f8 bl #12
-// CHECK: __Thumbv7ABSLongThunk_high_target:
+// CHECK: <__Thumbv7ABSLongThunk_high_target>:
// CHECK-NEXT: a0: 40 f2 01 0c movw r12, #1
// CHECK-NEXT: a4: c0 f2 00 2c movt r12, #512
// CHECK-NEXT: a8: 60 47 bx r12
-// CHECK: __Thumbv7ABSLongThunk_high_target2:
+// CHECK: <__Thumbv7ABSLongThunk_high_target2>:
// CHECK-NEXT: aa: 40 f2 1d 0c movw r12, #29
// CHECK-NEXT: ae: c0 f2 00 2c movt r12, #512
// CHECK-NEXT: b2: 60 47 bx r12
-// CHECK: low_target2:
+// CHECK: <low_target2>:
// CHECK-NEXT: b4: ff f7 f4 ff bl #-24
// CHECK-NEXT: b8: ff f7 f7 ff bl #-18
@@ -64,17 +64,17 @@ high_target2:
// CHECK: Disassembly of section .text_high:
// CHECK-EMPTY:
-// CHECK-NEXT: high_target:
+// CHECK-NEXT: <high_target>:
// CHECK-NEXT: 2000000: 00 f0 02 f8 bl #4
// CHECK-NEXT: 2000004: 00 f0 05 f8 bl #10
-// CHECK: __Thumbv7ABSLongThunk_low_target:
+// CHECK: <__Thumbv7ABSLongThunk_low_target>:
// CHECK-NEXT: 2000008: 40 f2 97 0c movw r12, #151
// CHECK-NEXT: 200000c: c0 f2 00 0c movt r12, #0
// CHECK-NEXT: 2000010: 60 47 bx r12
-// CHECK: __Thumbv7ABSLongThunk_low_target2:
+// CHECK: <__Thumbv7ABSLongThunk_low_target2>:
// CHECK-NEXT: 2000012: 40 f2 b5 0c movw r12, #181
// CHECK-NEXT: 2000016: c0 f2 00 0c movt r12, #0
// CHECK-NEXT: 200001a: 60 47 bx r12
-// CHECK: high_target2:
+// CHECK: <high_target2>:
// CHECK-NEXT: 200001c: ff f7 f4 ff bl #-24
// CHECK-NEXT: 2000020: ff f7 f7 ff bl #-18
diff --git a/lld/test/ELF/arm-thunk-many-passes.s b/lld/test/ELF/arm-thunk-many-passes.s
index f52efcd10b9c..e7efb81c580e 100644
--- a/lld/test/ELF/arm-thunk-many-passes.s
+++ b/lld/test/ELF/arm-thunk-many-passes.s
@@ -34,7 +34,7 @@
// CHECK-ELF: Name: sym
// CHECK-ELF-NEXT: Value: 0x101104C
-// CHECK: 00011000 _start:
+// CHECK: 00011000 <_start>:
// CHECK-NEXT: 11000: b.w #14680132 <__Thumbv7ABSLongThunk_f3>
// CHECK-NEXT: 11004: b.w #14680128 <__Thumbv7ABSLongThunk_f3>
// CHECK-NEXT: 11008: b.w #14680128 <__Thumbv7ABSLongThunk_f4>
diff --git a/lld/test/ELF/arm-thunk-multipass-plt.s b/lld/test/ELF/arm-thunk-multipass-plt.s
index a6b6719c14f8..97ff755b89d8 100644
--- a/lld/test/ELF/arm-thunk-multipass-plt.s
+++ b/lld/test/ELF/arm-thunk-multipass-plt.s
@@ -42,7 +42,7 @@ needsplt:
.section .text.07, "ax", %progbits
.space (1024 * 1024)
// 0x70000c + 8 + 0x60002c = 0xd00040 = preemptible at plt
-// CHECK: 0070000c __ARMV5PILongThunk_preemptible:
+// CHECK: 0070000c <__ARMV5PILongThunk_preemptible>:
// CHECK-NEXT: 70000c: 0b 00 18 ea b #6291500
.section .text.08, "ax", %progbits
@@ -71,25 +71,25 @@ preemptible2:
// CHECK-PLT: Disassembly of section .plt:
// CHECK-PLT-EMPTY:
-// CHECK-PLT-NEXT: 00d00020 $a:
+// CHECK-PLT-NEXT: 00d00020 <$a>:
// CHECK-PLT-NEXT: d00020: 04 e0 2d e5 str lr, [sp, #-4]!
// CHECK-PLT-NEXT: d00024: 00 e6 8f e2 add lr, pc, #0, #12
// CHECK-PLT-NEXT: d00028: 02 ea 8e e2 add lr, lr, #8192
// CHECK-PLT-NEXT: d0002c: 94 f0 be e5 ldr pc, [lr, #148]!
-// CHECK-PLT: 00d00030 $d:
+// CHECK-PLT: 00d00030 <$d>:
// CHECK-PLT-NEXT: d00030: d4 d4 d4 d4 .word 0xd4d4d4d4
// CHECK-PLT-NEXT: d00034: d4 d4 d4 d4 .word 0xd4d4d4d4
// CHECK-PLT-NEXT: d00038: d4 d4 d4 d4 .word 0xd4d4d4d4
// CHECK-PLT-NEXT: d0003c: d4 d4 d4 d4 .word 0xd4d4d4d4
-// CHECK-PLT: 00d00040 $a:
+// CHECK-PLT: 00d00040 <$a>:
// CHECK-PLT-NEXT: d00040: 00 c6 8f e2 add r12, pc, #0, #12
// CHECK-PLT-NEXT: d00044: 02 ca 8c e2 add r12, r12, #8192
// CHECK-PLT-NEXT: d00048: 7c f0 bc e5 ldr pc, [r12, #124]!
-// CHECK-PLT: 00d0004c $d:
+// CHECK-PLT: 00d0004c <$d>:
// CHECK-PLT-NEXT: d0004c: d4 d4 d4 d4 .word 0xd4d4d4d4
-// CHECK-PLT: 00d00050 $a:
+// CHECK-PLT: 00d00050 <$a>:
// CHECK-PLT-NEXT: d00050: 00 c6 8f e2 add r12, pc, #0, #12
// CHECK-PLT-NEXT: d00054: 02 ca 8c e2 add r12, r12, #8192
// CHECK-PLT-NEXT: d00058: 70 f0 bc e5 ldr pc, [r12, #112]!
-// CHECK-PLT: 00d0005c $d:
+// CHECK-PLT: 00d0005c <$d>:
// CHECK-PLT-NEXT: d0005c: d4 d4 d4 d4 .word 0xd4d4d4d4
diff --git a/lld/test/ELF/arm-thunk-multipass.s b/lld/test/ELF/arm-thunk-multipass.s
index a526205dfb88..ff6b282bd8cb 100644
--- a/lld/test/ELF/arm-thunk-multipass.s
+++ b/lld/test/ELF/arm-thunk-multipass.s
@@ -26,7 +26,7 @@ _start:
bl target
b.w arm_target
// arm_target is in range but needs an interworking thunk
-// CHECK1: _start:
+// CHECK1: <_start>:
// CHECK1-NEXT: 100002: 00 f3 06 d0 bl #15728652
// CHECK1-NEXT: 100006: ff f2 ff 97 b.w #15728638 <__Thumbv7ABSLongThunk_arm_target>
nop
@@ -59,13 +59,13 @@ target2:
.type arm_target, %function
arm_target:
bx lr
-// CHECK2: __Thumbv7ABSLongThunk_arm_target:
+// CHECK2: <__Thumbv7ABSLongThunk_arm_target>:
// CHECK2-NEXT: 1000008: 40 f2 02 0c movw r12, #2
// CHECK2-NEXT: 100000c: c0 f2 00 1c movt r12, #256
// CHECK2-NEXT: 1000010: 60 47 bx r12
-// CHECK2: __Thumbv7ABSLongThunk_target:
+// CHECK2: <__Thumbv7ABSLongThunk_target>:
// CHECK2-NEXT: 1000012: ff f0 ff bf b.w #1048574 <target>
-// CHECK2: __Thumbv7ABSLongThunk_target2:
+// CHECK2: <__Thumbv7ABSLongThunk_target2>:
// CHECK2-NEXT: 1000016: ff f4 fc 97 b.w #-15728648 <target2>
.section .text.17, "ax", %progbits
@@ -85,7 +85,7 @@ target:
nop
nop
bx lr
-// CHECK3: target:
+// CHECK3: <target>:
// CHECK3-NEXT: 1100014: ff f6 ff ff bl #-1048578
// CHECK3-NEXT: 1100018: 00 bf nop
// CHECK3-NEXT: 110001a: 00 bf nop
diff --git a/lld/test/ELF/arm-thunk-nosuitable.s b/lld/test/ELF/arm-thunk-nosuitable.s
index 3334bdb174f1..f149fa9839e7 100644
--- a/lld/test/ELF/arm-thunk-nosuitable.s
+++ b/lld/test/ELF/arm-thunk-nosuitable.s
@@ -19,9 +19,9 @@ _start:
.section .text.1, "ax", %progbits
bx lr
-// CHECK: _start:
+// CHECK: <_start>:
// CHECK-NEXT: 2110b4: 00 f0 00 80 beq.w #0
-// CHECK: __Thumbv7ABSLongThunk_target:
+// CHECK: <__Thumbv7ABSLongThunk_target>:
// CHECK-NEXT: 2110b8: 00 f0 01 90 b.w #12582914
// CHECK: 2110bc: 70 47 bx lr
diff --git a/lld/test/ELF/arm-thunk-re-add.s b/lld/test/ELF/arm-thunk-re-add.s
index 0184c7e03fb9..c65ee90a3e29 100644
--- a/lld/test/ELF/arm-thunk-re-add.s
+++ b/lld/test/ELF/arm-thunk-re-add.s
@@ -65,12 +65,12 @@ tfunc\suff\():
FUNCTION 30
FUNCTION 31
// Precreated Thunk Pool goes here
-// CHECK1: __ThumbV7PILongThunk_imported:
+// CHECK1: <__ThumbV7PILongThunk_imported>:
// CHECK1-NEXT: 1000004: 40 f2 30 0c movw r12, #48
// CHECK1-NEXT: 1000008: c0 f2 10 0c movt r12, #16
// CHECK1-NEXT: 100000c: fc 44 add r12, pc
// CHECK1-NEXT: 100000e: 60 47 bx r12
-// CHECK1: __ThumbV7PILongThunk_imported2:
+// CHECK1: <__ThumbV7PILongThunk_imported2>:
// CHECK1-NEXT: 1000010: 40 f2 34 0c movw r12, #52
// CHECK1-NEXT: 1000014: c0 f2 10 0c movt r12, #16
// CHECK1-NEXT: 1000018: fc 44 add r12, pc
@@ -88,37 +88,37 @@ callers:
b.w imported
beq.w imported
b.w imported2
-// CHECK2: __ThumbV7PILongThunk_imported:
+// CHECK2: <__ThumbV7PILongThunk_imported>:
// CHECK2-NEXT: 1100008: 40 f2 2c 0c movw r12, #44
// CHECK2-NEXT: 110000c: c0 f2 00 0c movt r12, #0
// CHECK2-NEXT: 1100010: fc 44 add r12, pc
// CHECK2-NEXT: 1100012: 60 47 bx r12
-// CHECK2: callers:
+// CHECK2: <callers>:
// CHECK2-NEXT: 1100014: ff f6 f6 bf b.w #-1048596 <__ThumbV7PILongThunk_imported>
// CHECK2-NEXT: 1100018: 3f f4 f6 af beq.w #-20 <__ThumbV7PILongThunk_imported>
// CHECK2-NEXT: 110001c: ff f6 f8 bf b.w #-1048592 <__ThumbV7PILongThunk_imported2>
// CHECK3: Disassembly of section .plt:
// CHECK3-EMPTY:
-// CHECK3-NEXT: $a:
+// CHECK3-NEXT: <$a>:
// CHECK3-NEXT: 1100020: 04 e0 2d e5 str lr, [sp, #-4]!
// CHECK3-NEXT: 1100024: 00 e6 8f e2 add lr, pc, #0, #12
// CHECK3-NEXT: 1100028: 02 ea 8e e2 add lr, lr, #8192
// CHECK3-NEXT: 110002c: 94 f0 be e5 ldr pc, [lr, #148]!
-// CHECK3: $d:
+// CHECK3: <$d>:
// CHECK3-NEXT: 1100030: d4 d4 d4 d4 .word 0xd4d4d4d4
// CHECK3-NEXT: 1100034: d4 d4 d4 d4 .word 0xd4d4d4d4
// CHECK3-NEXT: 1100038: d4 d4 d4 d4 .word 0xd4d4d4d4
// CHECK3-NEXT: 110003c: d4 d4 d4 d4 .word 0xd4d4d4d4
-// CHECK3: $a:
+// CHECK3: <$a>:
// CHECK3-NEXT: 1100040: 00 c6 8f e2 add r12, pc, #0, #12
// CHECK3-NEXT: 1100044: 02 ca 8c e2 add r12, r12, #8192
// CHECK3-NEXT: 1100048: 7c f0 bc e5 ldr pc, [r12, #124]!
-// CHECK3: $d:
+// CHECK3: <$d>:
// CHECK3-NEXT: 110004c: d4 d4 d4 d4 .word 0xd4d4d4d4
-// CHECK3: $a:
+// CHECK3: <$a>:
// CHECK3-NEXT: 1100050: 00 c6 8f e2 add r12, pc, #0, #12
// CHECK3-NEXT: 1100054: 02 ca 8c e2 add r12, r12, #8192
// CHECK3-NEXT: 1100058: 70 f0 bc e5 ldr pc, [r12, #112]!
-// CHECK3: $d:
+// CHECK3: <$d>:
// CHECK3-NEXT: 110005c: d4 d4 d4 d4 .word 0xd4d4d4d4
diff --git a/lld/test/ELF/arm-tls-gd32.s b/lld/test/ELF/arm-tls-gd32.s
index 5cf5429bbb3d..f5ec0a3a456c 100644
--- a/lld/test/ELF/arm-tls-gd32.s
+++ b/lld/test/ELF/arm-tls-gd32.s
@@ -91,7 +91,7 @@ x:
// SEC-NEXT: 0x2270 R_ARM_TLS_DTPOFF32 y
-// CHECK-LABEL: 000011f8 func:
+// CHECK-LABEL: 000011f8 <func>:
// CHECK-NEXT: 11f8: 00 f0 20 e3 nop
// CHECK-NEXT: 11fc: 00 f0 20 e3 nop
// CHECK-NEXT: 1200: 00 f0 20 e3 nop
diff --git a/lld/test/ELF/arm-tls-ie32.s b/lld/test/ELF/arm-tls-ie32.s
index acb4e1ca571b..e87ca06ca6fe 100644
--- a/lld/test/ELF/arm-tls-ie32.s
+++ b/lld/test/ELF/arm-tls-ie32.s
@@ -84,7 +84,7 @@ x:
// CHECK: Disassembly of section .text:
// CHECK-EMPTY:
-// CHECK-NEXT: func:
+// CHECK-NEXT: <func>:
// CHECK-NEXT: 11e8: 00 f0 20 e3 nop
// CHECK-NEXT: 11ec: 00 f0 20 e3 nop
// CHECK-NEXT: 11f0: 00 f0 20 e3 nop
diff --git a/lld/test/ELF/arm-tls-ldm32.s b/lld/test/ELF/arm-tls-ldm32.s
index 02016abaaf4a..980afd4a3497 100644
--- a/lld/test/ELF/arm-tls-ldm32.s
+++ b/lld/test/ELF/arm-tls-ldm32.s
@@ -59,7 +59,7 @@ x:
// CHECK: Disassembly of section .text:
// CHECK-EMPTY:
-// CHECK-NEXT: _start:
+// CHECK-NEXT: <_start>:
// CHECK-NEXT: 11c0: 00 f0 20 e3 nop
// (0x2224 - 0x11c4) + (0x11c4 - 0x11c0 - 8) = 0x105c
@@ -67,7 +67,7 @@ x:
// CHECK-NEXT: 11c8: 00 00 00 00
// CHECK-NEXT: 11cc: 04 00 00 00
-// CHECK-EXE: _start:
+// CHECK-EXE: <_start>:
// CHECK-EXE-NEXT: 11114: 00 f0 20 e3 nop
// CHECK-EXE: 11118: 0c 10 00 00
// CHECK-EXE-NEXT: 1111c: 00 00 00 00
diff --git a/lld/test/ELF/arm-tls-le32.s b/lld/test/ELF/arm-tls-le32.s
index 31a17e051aa1..f7553d3baf63 100644
--- a/lld/test/ELF/arm-tls-le32.s
+++ b/lld/test/ELF/arm-tls-le32.s
@@ -69,7 +69,7 @@ x:
// CHECK: Disassembly of section .text:
// CHECK-EMPTY:
-// CHECK-NEXT: _start:
+// CHECK-NEXT: <_start>:
// offset of x from Thread pointer = (TcbSize + 0x0 = 0x8)
// CHECK-NEXT: 11114: 08 00 00 00
// offset of z from Thread pointer = (TcbSize + 0x8 = 0x10)
diff --git a/lld/test/ELF/arm-undefined-weak.s b/lld/test/ELF/arm-undefined-weak.s
index c7e3f5f7694d..db3fa9a296af 100644
--- a/lld/test/ELF/arm-undefined-weak.s
+++ b/lld/test/ELF/arm-undefined-weak.s
@@ -32,7 +32,7 @@ _start:
// CHECK: Disassembly of section .text:
// CHECK-EMPTY:
-// CHECK-NEXT: 100010b4 _start:
+// CHECK-NEXT: 100010b4 <_start>:
// CHECK-NEXT: 100010b4: b #-4
// CHECK-NEXT: 100010b8: bl #-4
// CHECK-NEXT: 100010bc: bl #-4
diff --git a/lld/test/ELF/basic-avr.s b/lld/test/ELF/basic-avr.s
index c8a3af9536f0..2096446b2fff 100644
--- a/lld/test/ELF/basic-avr.s
+++ b/lld/test/ELF/basic-avr.s
@@ -8,7 +8,7 @@ main:
foo:
jmp foo
-# CHECK: main:
+# CHECK: <main>:
# CHECK-NEXT: 0: 0e 94 02 00 <unknown>
-# CHECK: foo:
+# CHECK: <foo>:
# CHECK-NEXT: 4: 0c 94 02 00 <unknown>
diff --git a/lld/test/ELF/canonical-plt-pcrel.s b/lld/test/ELF/canonical-plt-pcrel.s
index 51ad97bb9753..e2c0b1e2e1be 100644
--- a/lld/test/ELF/canonical-plt-pcrel.s
+++ b/lld/test/ELF/canonical-plt-pcrel.s
@@ -21,7 +21,7 @@
# CHECK-NEXT: }
# CHECK-NEXT: ]
-# DISASM: _start:
+# DISASM: <_start>:
# DISASM-NEXT: callq {{.*}} <func at plt>
# DISASM-NEXT: callq {{.*}} <ifunc at plt>
diff --git a/lld/test/ELF/comdat.s b/lld/test/ELF/comdat.s
index a5ce6942a520..bf754fbbfaf0 100644
--- a/lld/test/ELF/comdat.s
+++ b/lld/test/ELF/comdat.s
@@ -20,7 +20,7 @@ foo:
// CHECK: Disassembly of section .text2:
// CHECK-EMPTY:
-// CHECK-NEXT: foo:
+// CHECK-NEXT: <foo>:
// CHECK-NEXT: 1234: {{.*}} nop
// CHECK-NOT: nop
@@ -29,7 +29,7 @@ foo:
// CHECK: Disassembly of section bar:
// CHECK-EMPTY:
-// CHECK-NEXT: bar:
+// CHECK-NEXT: <bar>:
// 0x1234 - 0x1235 - 5 = -6
// CHECK-NEXT: 1235: {{.*}} callq -6
diff --git a/lld/test/ELF/defsym.s b/lld/test/ELF/defsym.s
index 3e06e83eb39d..2e07ca7c1cfb 100644
--- a/lld/test/ELF/defsym.s
+++ b/lld/test/ELF/defsym.s
@@ -37,7 +37,7 @@
## Check we can use foo2 and it that it is an alias for foo1.
# USE: Disassembly of section .text:
# USE-EMPTY:
-# USE-NEXT: _start:
+# USE-NEXT: <_start>:
# USE-NEXT: movl $0x123, %edx
# RUN: ld.lld -o %t %t.o --defsym=foo2=1
diff --git a/lld/test/ELF/eh-frame-hdr.s b/lld/test/ELF/eh-frame-hdr.s
index dc21fec6a020..0675383a611e 100644
--- a/lld/test/ELF/eh-frame-hdr.s
+++ b/lld/test/ELF/eh-frame-hdr.s
@@ -40,17 +40,17 @@ _start:
// HDRDISASM: Disassembly of section foo:
// HDRDISASM-EMPTY:
-// HDRDISASM-NEXT: foo:
+// HDRDISASM-NEXT: <foo>:
// HDRDISASM-NEXT: 2011e4: 90 nop
// HDRDISASM-EMPTY:
// HDRDISASM-NEXT: Disassembly of section bar:
// HDRDISASM-EMPTY:
-// HDRDISASM-NEXT: bar:
+// HDRDISASM-NEXT: <bar>:
// HDRDISASM-NEXT: 2011e5: 90 nop
// HDRDISASM-EMPTY:
// HDRDISASM-NEXT: Disassembly of section dah:
// HDRDISASM-EMPTY:
-// HDRDISASM-NEXT: dah:
+// HDRDISASM-NEXT: <dah>:
// HDRDISASM-NEXT: 2011e6: 90 nop
// HDR: Section {
diff --git a/lld/test/ELF/ehframe-relocation.s b/lld/test/ELF/ehframe-relocation.s
index 2bfb2a7b3550..32353c563356 100644
--- a/lld/test/ELF/ehframe-relocation.s
+++ b/lld/test/ELF/ehframe-relocation.s
@@ -19,7 +19,7 @@
// 0x200120 + 5 = 2097445
// DISASM: Disassembly of section .text:
// DISASM-EMPTY:
-// DISASM-NEXT: _start:
+// DISASM-NEXT: <_start>:
// DISASM-NEXT: 201154: {{.*}} movq 2097440, %rax
// DISASM-NEXT: 20115c: {{.*}} movq 2097445, %rax
diff --git a/lld/test/ELF/gdb-index.s b/lld/test/ELF/gdb-index.s
index 97cee6b2d592..bb8ecf34bb6a 100644
--- a/lld/test/ELF/gdb-index.s
+++ b/lld/test/ELF/gdb-index.s
@@ -17,12 +17,12 @@
# DISASM: Disassembly of section .text:
# DISASM-EMPTY:
-# DISASM: entrypoint:
+# DISASM: <entrypoint>:
# DISASM-CHECK: 201000: 90 nop
# DISASM-CHECK: 201001: cc int3
# DISASM-CHECK: 201002: cc int3
# DISASM-CHECK: 201003: cc int3
-# DISASM: aaaaaaaaaaaaaaaa:
+# DISASM: <aaaaaaaaaaaaaaaa>:
# DISASM-CHECK: 201004: 90 nop
# DISASM-CHECK: 201005: 90 nop
diff --git a/lld/test/ELF/gnu-ifunc-i386.s b/lld/test/ELF/gnu-ifunc-i386.s
index 0d64faa9cb29..8023872da161 100644
--- a/lld/test/ELF/gnu-ifunc-i386.s
+++ b/lld/test/ELF/gnu-ifunc-i386.s
@@ -108,11 +108,11 @@
// DISASM: Disassembly of section .text:
// DISASM-EMPTY:
-// DISASM-NEXT: foo_resolver:
+// DISASM-NEXT: <foo_resolver>:
// DISASM-NEXT: 4010e4: retl
-// DISASM: bar_resolver:
+// DISASM: <bar_resolver>:
// DISASM-NEXT: 4010e5: retl
-// DISASM: _start:
+// DISASM: <_start>:
// DISASM-NEXT: 4010e6: calll 21 <foo>
// DISASM-NEXT: calll 32 <bar>
// DISASM-NEXT: movl $4194516, %edx
@@ -120,11 +120,11 @@
// DISASM-EMPTY:
// DISASM-NEXT: Disassembly of section .iplt:
// DISASM-EMPTY:
-// DISASM-NEXT: foo:
+// DISASM-NEXT: <foo>:
// DISASM-NEXT: 401100: jmpl *4202784
// DISASM-NEXT: pushl $0
// DISASM-NEXT: jmp -4198672
-// DISASM: bar:
+// DISASM: <bar>:
// DISASM-NEXT: 401110: jmpl *4202788
// DISASM-NEXT: pushl $8
// DISASM-NEXT: jmp -4198688
diff --git a/lld/test/ELF/gnu-ifunc-noplt-i386.s b/lld/test/ELF/gnu-ifunc-noplt-i386.s
index 12e01be30899..0b08912996ff 100644
--- a/lld/test/ELF/gnu-ifunc-noplt-i386.s
+++ b/lld/test/ELF/gnu-ifunc-noplt-i386.s
@@ -20,13 +20,13 @@
// Check that ifunc call sites still require relocation
// DISASM: Disassembly of section .text:
// DISASM-EMPTY:
-// DISASM-NEXT: 004011ec foo:
+// DISASM-NEXT: 004011ec <foo>:
// DISASM-NEXT: retl
// DISASM-EMPTY:
-// DISASM-NEXT: 004011ed bar:
+// DISASM-NEXT: 004011ed <bar>:
// DISASM-NEXT: retl
// DISASM-EMPTY:
-// DISASM-NEXT: 004011ee _start:
+// DISASM-NEXT: 004011ee <_start>:
// DISASM-NEXT: calll -0x4 <_start+0x1>
// DISASM-NEXT: calll -0x4 <_start+0x6>
// DISASM-NEXT: calll 0x23 <bar2 at plt>
@@ -34,7 +34,7 @@
// DISASM-EMPTY:
// DISASM-NEXT: Disassembly of section .plt:
// DISASM-EMPTY:
-// DISASM-NEXT: 00401210 .plt:
+// DISASM-NEXT: 00401210 <.plt>:
// DISASM-NEXT: pushl 0x4032cc
// DISASM-NEXT: jmpl *0x4032d0
// DISASM-NEXT: nop
@@ -42,12 +42,12 @@
// DISASM-NEXT: nop
// DISASM-NEXT: nop
// DISASM-EMPTY:
-// DISASM-NEXT: 00401220 bar2 at plt:
+// DISASM-NEXT: 00401220 <bar2 at plt>:
// DISASM-NEXT: jmpl *0x4032d4
// DISASM-NEXT: pushl $0x0
// DISASM-NEXT: jmp -0x20 <.plt>
// DISASM-EMPTY:
-// DISASM-NEXT: 00401230 zed2 at plt:
+// DISASM-NEXT: 00401230 <zed2 at plt>:
// DISASM-NEXT: jmpl *0x4032d8
// DISASM-NEXT: pushl $0x8
// DISASM-NEXT: jmp -0x30 <.plt>
diff --git a/lld/test/ELF/gnu-ifunc-noplt.s b/lld/test/ELF/gnu-ifunc-noplt.s
index e697e4736d7b..db9edc20b991 100644
--- a/lld/test/ELF/gnu-ifunc-noplt.s
+++ b/lld/test/ELF/gnu-ifunc-noplt.s
@@ -23,13 +23,13 @@
// Check that ifunc call sites still require relocation
// DISASM: Disassembly of section .text:
// DISASM-EMPTY:
-// DISASM-NEXT: 0000000000201320 foo:
+// DISASM-NEXT: 0000000000201320 <foo>:
// DISASM-NEXT: 201320: retq
// DISASM-EMPTY:
-// DISASM-NEXT: 0000000000201321 bar:
+// DISASM-NEXT: 0000000000201321 <bar>:
// DISASM-NEXT: 201321: retq
// DISASM-EMPTY:
-// DISASM-NEXT: 0000000000201322 _start:
+// DISASM-NEXT: 0000000000201322 <_start>:
// DISASM-NEXT: 201322: callq 0 <_start+0x5>
// DISASM-NEXT: 201327: callq 0 <_start+0xa>
// DISASM-NEXT: 20132c: callq 31 <bar2 at plt>
@@ -37,17 +37,17 @@
// DISASM-EMPTY:
// DISASM-NEXT: Disassembly of section .plt:
// DISASM-EMPTY:
-// DISASM-NEXT: 0000000000201340 .plt:
+// DISASM-NEXT: 0000000000201340 <.plt>:
// DISASM-NEXT: 201340: pushq 8514(%rip)
// DISASM-NEXT: 201346: jmpq *8516(%rip)
// DISASM-NEXT: 20134c: nopl (%rax)
// DISASM-EMPTY:
-// DISASM-NEXT: 0000000000201350 bar2 at plt:
+// DISASM-NEXT: 0000000000201350 <bar2 at plt>:
// DISASM-NEXT: 201350: jmpq *8514(%rip)
// DISASM-NEXT: 201356: pushq $0
// DISASM-NEXT: 20135b: jmp -32 <.plt>
// DISASM-EMPTY:
-// DISASM-NEXT: 0000000000201360 zed2 at plt:
+// DISASM-NEXT: 0000000000201360 <zed2 at plt>:
// DISASM-NEXT: 201360: jmpq *8506(%rip)
// DISASM-NEXT: 201366: pushq $1
// DISASM-NEXT: 20136b: jmp -48 <.plt>
diff --git a/lld/test/ELF/gnu-ifunc-plt-i386.s b/lld/test/ELF/gnu-ifunc-plt-i386.s
index 239a95457478..28b039f145fd 100644
--- a/lld/test/ELF/gnu-ifunc-plt-i386.s
+++ b/lld/test/ELF/gnu-ifunc-plt-i386.s
@@ -32,11 +32,11 @@
// Check that a PLT header is written and the ifunc entries appear last
// DISASM: Disassembly of section .text:
// DISASM-EMPTY:
-// DISASM-NEXT: foo:
+// DISASM-NEXT: <foo>:
// DISASM-NEXT: 4011b4: retl
-// DISASM: bar:
+// DISASM: <bar>:
// DISASM-NEXT: 4011b5: retl
-// DISASM: _start:
+// DISASM: <_start>:
// DISASM-NEXT: 4011b6: calll 69 <zed2+0x401200>
// DISASM-NEXT: calll 80 <zed2+0x401210>
// DISASM-NEXT: calll 27 <bar2 at plt>
@@ -44,7 +44,7 @@
// DISASM-EMPTY:
// DISASM-NEXT: Disassembly of section .plt:
// DISASM-EMPTY:
-// DISASM-NEXT: .plt:
+// DISASM-NEXT: <.plt>:
// DISASM-NEXT: 4011d0: pushl 4207260
// DISASM-NEXT: jmpl *4207264
// DISASM-NEXT: nop
@@ -52,19 +52,19 @@
// DISASM-NEXT: nop
// DISASM-NEXT: nop
// DISASM-EMPTY:
-// DISASM-NEXT: bar2 at plt:
+// DISASM-NEXT: <bar2 at plt>:
// DISASM-NEXT: 4011e0: jmpl *4207268
// DISASM-NEXT: pushl $0
// DISASM-NEXT: jmp -32 <.plt>
// DISASM-EMPTY:
-// DISASM-NEXT: zed2 at plt:
+// DISASM-NEXT: <zed2 at plt>:
// DISASM-NEXT: 4011f0: jmpl *4207272
// DISASM-NEXT: pushl $8
// DISASM-NEXT: jmp -48 <.plt>
// DISASM-EMPTY:
// DISASM-NEXT: Disassembly of section .iplt:
// DISASM-EMPTY:
-// DISASM-NEXT: .iplt:
+// DISASM-NEXT: <.iplt>:
// DISASM-NEXT: jmpl *4207276
// DISASM-NEXT: pushl $0
// DISASM-NEXT: jmp -64 <.plt>
diff --git a/lld/test/ELF/gnu-ifunc-plt.s b/lld/test/ELF/gnu-ifunc-plt.s
index 41c0a3d6ebce..d23a2b21b4d3 100644
--- a/lld/test/ELF/gnu-ifunc-plt.s
+++ b/lld/test/ELF/gnu-ifunc-plt.s
@@ -36,11 +36,11 @@
// Check that a PLT header is written and the ifunc entries appear last
// DISASM: Disassembly of section .text:
// DISASM-EMPTY:
-// DISASM-NEXT: foo:
+// DISASM-NEXT: <foo>:
// DISASM-NEXT: 2012d8: retq
-// DISASM: bar:
+// DISASM: <bar>:
// DISASM-NEXT: 2012d9: retq
-// DISASM: _start:
+// DISASM: <_start>:
// DISASM-NEXT: 2012da: callq 65
// DISASM-NEXT: 2012df: callq 76
// DISASM-NEXT: callq {{.*}} <bar2 at plt>
@@ -48,24 +48,24 @@
// DISASM-EMPTY:
// DISASM-NEXT: Disassembly of section .plt:
// DISASM-EMPTY:
-// DISASM-NEXT: .plt:
+// DISASM-NEXT: <.plt>:
// DISASM-NEXT: 2012f0: pushq 8514(%rip)
// DISASM-NEXT: 2012f6: jmpq *8516(%rip)
// DISASM-NEXT: 2012fc: nopl (%rax)
// DISASM-EMPTY:
-// DISASM-NEXT: bar2 at plt:
+// DISASM-NEXT: <bar2 at plt>:
// DISASM-NEXT: 201300: jmpq *8514(%rip)
// DISASM-NEXT: 201306: pushq $0
// DISASM-NEXT: 20130b: jmp -32 <.plt>
// DISASM-EMPTY:
-// DISASM-NEXT: zed2 at plt:
+// DISASM-NEXT: <zed2 at plt>:
// DISASM-NEXT: 201310: jmpq *8506(%rip)
// DISASM-NEXT: 201316: pushq $1
// DISASM-NEXT: 20131b: jmp -48 <.plt>
// DISASM-EMPTY:
// DISASM-NEXT: Disassembly of section .iplt:
// DISASM-EMPTY:
-// DISASM-NEXT: .iplt:
+// DISASM-NEXT: <.iplt>:
// DISASM-NEXT: 201320: jmpq *8498(%rip)
// DISASM-NEXT: 201326: pushq $0
// DISASM-NEXT: 20132b: jmp -64 <.plt>
diff --git a/lld/test/ELF/gnu-ifunc-shared.s b/lld/test/ELF/gnu-ifunc-shared.s
index 8195fa19995d..9a2e8beb9f6b 100644
--- a/lld/test/ELF/gnu-ifunc-shared.s
+++ b/lld/test/ELF/gnu-ifunc-shared.s
@@ -11,37 +11,37 @@
// handler and a JUMP_SLOT is used for a preemptible ifunc
// DISASM: Disassembly of section .text:
// DISASM-EMPTY:
-// DISASM-NEXT: fct:
+// DISASM-NEXT: <fct>:
// DISASM-NEXT: 1308: retq
-// DISASM: fct2:
+// DISASM: <fct2>:
// DISASM-NEXT: 1309: retq
-// DISASM: f1:
+// DISASM: <f1>:
// DISASM-NEXT: 130a: callq 65
// DISASM-NEXT: 130f: callq 28
// DISASM-NEXT: 1314: callq 39
// DISASM-NEXT: 1319: retq
-// DISASM: f2:
+// DISASM: <f2>:
// DISASM-NEXT: 131a: retq
// DISASM-EMPTY:
// DISASM-NEXT: Disassembly of section .plt:
// DISASM-EMPTY:
-// DISASM-NEXT: .plt:
+// DISASM-NEXT: <.plt>:
// DISASM-NEXT: 1320: pushq 8482(%rip)
// DISASM-NEXT: 1326: jmpq *8484(%rip)
// DISASM-NEXT: 132c: nopl (%rax)
// DISASM-EMPTY:
-// DISASM-NEXT: fct2 at plt:
+// DISASM-NEXT: <fct2 at plt>:
// DISASM-NEXT: 1330: jmpq *8482(%rip)
// DISASM-NEXT: 1336: pushq $0
// DISASM-NEXT: 133b: jmp -32 <.plt>
// DISASM-EMPTY:
-// DISASM-NEXT: f2 at plt:
+// DISASM-NEXT: <f2 at plt>:
// DISASM-NEXT: 1340: jmpq *8474(%rip)
// DISASM-NEXT: 1346: pushq $1
// DISASM-NEXT: 134b: jmp -48 <.plt>
// DISASM: Disassembly of section .iplt:
// DISASM-EMPTY:
-// DISASM: .iplt:
+// DISASM: <.iplt>:
// DISASM-NEXT: 1350: jmpq *8466(%rip)
// DISASM-NEXT: 1356: pushq $0
// DISASM-NEXT: 135b: jmp -64 <.plt>
diff --git a/lld/test/ELF/gnu-ifunc.s b/lld/test/ELF/gnu-ifunc.s
index e13a97dcf2f1..60955336d1d2 100644
--- a/lld/test/ELF/gnu-ifunc.s
+++ b/lld/test/ELF/gnu-ifunc.s
@@ -91,11 +91,11 @@
// DISASM: Disassembly of section .text:
// DISASM-EMPTY:
-// DISASM-NEXT: foo:
+// DISASM-NEXT: <foo>:
// DISASM-NEXT: 201188: {{.*}} retq
-// DISASM: bar:
+// DISASM: <bar>:
// DISASM-NEXT: 201189: {{.*}} retq
-// DISASM: _start:
+// DISASM: <_start>:
// DISASM-NEXT: 20118a: {{.*}} callq 33
// DISASM-NEXT: 20118f: {{.*}} callq 44
// DISASM-NEXT: 201194: {{.*}} movl $2097496, %edx
@@ -104,7 +104,7 @@
// DISASM-EMPTY:
// DISASM-NEXT: Disassembly of section .iplt:
// DISASM-EMPTY:
-// DISASM-NEXT: .iplt:
+// DISASM-NEXT: <.iplt>:
// DISASM-NEXT: 2011b0: {{.*}} jmpq *4122(%rip)
// DISASM-NEXT: 2011b6: {{.*}} pushq $0
// DISASM-NEXT: 2011bb: {{.*}} jmp -2101696
diff --git a/lld/test/ELF/got-i386.s b/lld/test/ELF/got-i386.s
index 0a53d00c81f9..01e5e8c321a0 100644
--- a/lld/test/ELF/got-i386.s
+++ b/lld/test/ELF/got-i386.s
@@ -41,7 +41,7 @@
// 0x40200A + 5 - 15 = addr(.got) = 0x402000
// DISASM: Disassembly of section .text:
// DISASM-EMPTY:
-// DISASM-NEXT: _start:
+// DISASM-NEXT: <_start>:
// DISASM-NEXT: 4010d4: c7 81 0c 00 00 00 01 00 00 00 movl $1, 12(%ecx)
// DISASM-NEXT: 4010de: c7 81 16 00 00 00 02 00 00 00 movl $2, 22(%ecx)
// DISASM-NEXT: 4010e8: c7 81 1b 00 00 00 03 00 00 00 movl $3, 27(%ecx)
diff --git a/lld/test/ELF/got.s b/lld/test/ELF/got.s
index 1db9039d192c..194b726935d9 100644
--- a/lld/test/ELF/got.s
+++ b/lld/test/ELF/got.s
@@ -33,7 +33,7 @@
// 0x202338 - (0x201276 + 2) - 4 = 4284
// 0x202340 - (0x20127c + 2) - 4 = 4286
-// DISASM: _start:
+// DISASM: <_start>:
// DISASM-NEXT: 201270: {{.*}} jmpq *4290(%rip)
// DISASM-NEXT: 201276: {{.*}} jmpq *4284(%rip)
// DISASM-NEXT: 20127c: {{.*}} jmpq *4286(%rip)
diff --git a/lld/test/ELF/got32-i386.s b/lld/test/ELF/got32-i386.s
index 6c0b87aff399..d83becd62421 100644
--- a/lld/test/ELF/got32-i386.s
+++ b/lld/test/ELF/got32-i386.s
@@ -16,7 +16,7 @@ _start:
# CHECK: Sections:
# CHECK: Name Size VMA
# CHECK: .got 00000004 004020fc
-# CHECK: _start:
+# CHECK: <_start>:
# CHECK-NEXT: 4010f5: 8b 1d {{.*}} movl 4202748, %ebx
# RUN: not ld.lld %t.o -o /dev/null -pie 2>&1 | FileCheck %s --check-prefix=ERR
diff --git a/lld/test/ELF/got32x-i386.s b/lld/test/ELF/got32x-i386.s
index 8c8e24fd2e41..b72411f6f2b5 100644
--- a/lld/test/ELF/got32x-i386.s
+++ b/lld/test/ELF/got32x-i386.s
@@ -35,7 +35,7 @@
# CHECK: Sections:
# CHECK: Name Size VMA
# CHECK: .got.plt 0000000c 00403134
-# CHECK: _start:
+# CHECK: <_start>:
# CHECK-NEXT: 401115: 8b 05 {{.*}} movl 4202800, %eax
# CHECK-NEXT: 40111b: 8b 1d {{.*}} movl 4202800, %ebx
# CHECK-NEXT: 401121: 8b 80 {{.*}} movl -4100(%eax), %eax
diff --git a/lld/test/ELF/hexagon-plt.s b/lld/test/ELF/hexagon-plt.s
index e390880a2030..8350c353b3d5 100644
--- a/lld/test/ELF/hexagon-plt.s
+++ b/lld/test/ELF/hexagon-plt.s
@@ -27,7 +27,7 @@
# GOTPLT-NEXT: 0x00040068 00000000 00000000 00000000 00000000
# GOTPLT-NEXT: 0x00040078 00000000 00000000
-# DIS: _start:
+# DIS: <_start>:
## Direct call
## Call foo directly
# DIS-NEXT: { call 0x2003c }
@@ -56,13 +56,13 @@
## Call weak via plt
# DIS-NEXT: r0 = #0 ; jump 0x20070 }
-# DIS: foo:
+# DIS: <foo>:
# DIS-NEXT: 2003c:
# DIS: Disassembly of section .plt:
-# DIS: 00020040 .plt:
+# DIS: 00020040 <.plt>:
# DIS-NEXT: 20040: { immext(#131072)
# DIS-NEXT: 20044: r28 = add(pc,##131112) }
# DIS-NEXT: 20048: { r14 -= add(r28,#16)
diff --git a/lld/test/ELF/i386-feature-cet.s b/lld/test/ELF/i386-feature-cet.s
index 1c59ffabd432..b4073a40232e 100644
--- a/lld/test/ELF/i386-feature-cet.s
+++ b/lld/test/ELF/i386-feature-cet.s
@@ -40,13 +40,13 @@
# GOTPLT-NEXT: 0x004032e0 0b124000
# DISASM: Disassembly of section .text:
-# DISASM: 00401200 func1:
+# DISASM: 00401200 <func1>:
# DISASM-NEXT: 401200: calll 0x2b <func2+0x401230>
# DISASM-NEXT: 401205: calll 0x36 <ifunc>
# DISASM-NEXT: retl
# DISASM: Disassembly of section .plt:
-# DISASM: 00401210 .plt:
+# DISASM: 00401210 <.plt>:
# DISASM-NEXT: 401210: pushl 0x4032d4
# DISASM-NEXT: jmpl *0x4032d8
# DISASM-NEXT: nop
@@ -59,13 +59,13 @@
# DISASM-NEXT: nop
# DISASM: Disassembly of section .plt.sec:
-# DISASM: 00401230 .plt.sec:
+# DISASM: 00401230 <.plt.sec>:
# DISASM-NEXT: 401230: endbr32
# DISASM-NEXT: jmpl *0x4032dc
# DISASM-NEXT: nopw (%eax,%eax)
# DISASM: Disassembly of section .iplt:
-# DISASM: 00401240 ifunc:
+# DISASM: 00401240 <ifunc>:
# DISASM-NEXT: 401240: endbr32
# DISASM-NEXT: jmpl *0x4032e0
# DISASM-NEXT: nopw (%eax,%eax)
diff --git a/lld/test/ELF/i386-gotpc.s b/lld/test/ELF/i386-gotpc.s
index 14528351bca7..d674c0e984f4 100644
--- a/lld/test/ELF/i386-gotpc.s
+++ b/lld/test/ELF/i386-gotpc.s
@@ -10,6 +10,6 @@ movl $_GLOBAL_OFFSET_TABLE_, %eax
// DISASM: Disassembly of section .text:
// DISASM-EMPTY:
-// DISASM-NEXT: .text:
+// DISASM-NEXT: <.text>:
// DISASM-NEXT: 1158: movl $8248, %eax
// ^-- 0x3190 (.got.plt) - 0x1158 = 8248
diff --git a/lld/test/ELF/i386-plt.s b/lld/test/ELF/i386-plt.s
index a11f40110744..c8f66c69a730 100644
--- a/lld/test/ELF/i386-plt.s
+++ b/lld/test/ELF/i386-plt.s
@@ -48,10 +48,10 @@
// CHECK-NEXT: }
// CHECK-NEXT: ]
-// DISASM: local:
+// DISASM: <local>:
// DISASM-NEXT: 4011bc:
// DISASM-NEXT: 4011be:
-// DISASM: _start:
+// DISASM: <_start>:
// DISASM-NEXT: 4011c0: jmp 0x2b <bar at plt>
// DISASM-NEXT: 4011c5: jmp 0x26 <bar at plt>
// DISASM-NEXT: 4011ca: jmp 0x31 <zed at plt>
@@ -59,7 +59,7 @@
// DISASM: Disassembly of section .plt:
// DISASM-EMPTY:
-// DISASM-NEXT: .plt:
+// DISASM-NEXT: <.plt>:
/// Push .got.plt[1], then jump to .got.plt[2]
// DISASM-NEXT: 4011e0: pushl 0x40327c
// DISASM-NEXT: jmpl *0x403280
@@ -68,13 +68,13 @@
// DISASM-NEXT: nop
// DISASM-NEXT: nop
// DISASM-EMPTY:
-// DISASM-NEXT: bar at plt:
+// DISASM-NEXT: <bar at plt>:
/// .got.plt[3] = 0x403278 + 12 = 0x403284
// DISASM-NEXT: 4011f0: jmpl *0x403284
// DISASM-NEXT: pushl $0x0
// DISASM-NEXT: jmp -0x20 <.plt>
// DISASM-EMPTY:
-// DISASM-NEXT: zed at plt:
+// DISASM-NEXT: <zed at plt>:
/// .got.plt[4] = 0x403278 + 16 = 0x403288
// DISASM-NEXT: 401200: jmpl *0x403288
// DISASM-NEXT: pushl $0x8
@@ -118,10 +118,10 @@
// CHECKSHARED-NEXT: }
// CHECKSHARED-NEXT: ]
-// DISASMSHARED: local:
+// DISASMSHARED: <local>:
// DISASMSHARED-NEXT: 11e0:
// DISASMSHARED-NEXT: 11e2:
-// DISASMSHARED: _start:
+// DISASMSHARED: <_start>:
// DISASMSHARED-NEXT: 11e4: jmp 39 <bar at plt>
// DISASMSHARED-NEXT: jmp 34 <bar at plt>
// DISASMSHARED-NEXT: jmp 45 <zed at plt>
@@ -129,25 +129,25 @@
// DISASMSHARED-EMPTY:
// DISASMSHARED-NEXT: Disassembly of section .plt:
// DISASMSHARED-EMPTY:
-// DISASMSHARED-NEXT: .plt:
+// DISASMSHARED-NEXT: <.plt>:
// DISASMSHARED-NEXT: 1200: pushl 4(%ebx)
// DISASMSHARED-NEXT: jmpl *8(%ebx)
// DISASMSHARED-NEXT: nop
// DISASMSHARED-NEXT: nop
// DISASMSHARED-NEXT: nop
// DISASMSHARED-NEXT: nop
-// DISASMSHARED: bar at plt:
+// DISASMSHARED: <bar at plt>:
// DISASMSHARED-NEXT: 1210: jmpl *12(%ebx)
// DISASMSHARED-NEXT: pushl $0
// DISASMSHARED-NEXT: jmp -32 <.plt>
-// DISASMSHARED: zed at plt:
+// DISASMSHARED: <zed at plt>:
// DISASMSHARED-NEXT: 1220: jmpl *16(%ebx)
// DISASMSHARED-NEXT: pushl $8
// DISASMSHARED-NEXT: jmp -48 <.plt>
// DISASMPIE: Disassembly of section .plt:
// DISASMPIE-EMPTY:
-// DISASMPIE-NEXT: .plt:
+// DISASMPIE-NEXT: <.plt>:
// DISASMPIE-NEXT: 11e0: pushl 4(%ebx)
// DISASMPIE-NEXT: jmpl *8(%ebx)
// DISASMPIE-NEXT: nop
@@ -155,12 +155,12 @@
// DISASMPIE-NEXT: nop
// DISASMPIE-NEXT: nop
// DISASMPIE-EMPTY:
-// DISASMPIE-NEXT: bar at plt:
+// DISASMPIE-NEXT: <bar at plt>:
// DISASMPIE-NEXT: 11f0: jmpl *12(%ebx)
// DISASMPIE-NEXT: pushl $0
// DISASMPIE-NEXT: jmp -32 <.plt>
// DISASMPIE-EMPTY:
-// DISASMPIE-NEXT: zed at plt:
+// DISASMPIE-NEXT: <zed at plt>:
// DISASMPIE-NEXT: 1200: jmpl *16(%ebx)
// DISASMPIE-NEXT: pushl $8
// DISASMPIE-NEXT: jmp -48 <.plt>
diff --git a/lld/test/ELF/i386-relax-reloc.s b/lld/test/ELF/i386-relax-reloc.s
index a230d658de81..999f15b98c87 100644
--- a/lld/test/ELF/i386-relax-reloc.s
+++ b/lld/test/ELF/i386-relax-reloc.s
@@ -7,7 +7,7 @@
// SEC: .got PROGBITS 000021f0
// SEC-NEXT: .got.plt PROGBITS 000031f4
-// CHECK: foo:
+// CHECK: <foo>:
// CHECK-NEXT: 1194: movl -4100(%ebx), %eax
// CHECK-NEXT: movl -4092(%ebx), %eax
diff --git a/lld/test/ELF/i386-reloc-large-addend.s b/lld/test/ELF/i386-reloc-large-addend.s
index 94cf940073c5..f17e5c6bf7dc 100644
--- a/lld/test/ELF/i386-reloc-large-addend.s
+++ b/lld/test/ELF/i386-reloc-large-addend.s
@@ -9,7 +9,7 @@
// CHECK: Disassembly of section .text:
// CHECK-EMPTY:
-// CHECK-NEXT: _start:
+// CHECK-NEXT: <_start>:
// CHECK-NEXT: 7000: e9 fe 1f jmp 8190
// 0x1 + 0x9000 - 0x7003 == 8190
.global _start
diff --git a/lld/test/ELF/i386-reloc-range.s b/lld/test/ELF/i386-reloc-range.s
index 033a9ed78386..bdaeac24138b 100644
--- a/lld/test/ELF/i386-reloc-range.s
+++ b/lld/test/ELF/i386-reloc-range.s
@@ -11,7 +11,7 @@
// CHECK: Disassembly of section .text:
// CHECK-EMPTY:
-// CHECK-NEXT: _start:
+// CHECK-NEXT: <_start>:
// CHECK-NEXT: 200: jmp -1
// 0x10202 - 0x203 == 0xffff
diff --git a/lld/test/ELF/i386-retpoline-nopic-linkerscript.s b/lld/test/ELF/i386-retpoline-nopic-linkerscript.s
index 571267e92b08..e883a409670c 100644
--- a/lld/test/ELF/i386-retpoline-nopic-linkerscript.s
+++ b/lld/test/ELF/i386-retpoline-nopic-linkerscript.s
@@ -14,7 +14,7 @@
// CHECK: Disassembly of section .plt:
// CHECK-EMPTY:
-// CHECK-NEXT: .plt:
+// CHECK-NEXT: <.plt>:
// CHECK-NEXT: 10: pushl 236
// CHECK-NEXT: 16: pushl %eax
// CHECK-NEXT: 17: movl 240, %eax
diff --git a/lld/test/ELF/i386-retpoline-nopic.s b/lld/test/ELF/i386-retpoline-nopic.s
index 4edd9ef09502..e5eba67d3958 100644
--- a/lld/test/ELF/i386-retpoline-nopic.s
+++ b/lld/test/ELF/i386-retpoline-nopic.s
@@ -12,7 +12,7 @@
// CHECK: Disassembly of section .plt:
// CHECK-EMPTY:
-// CHECK-NEXT: .plt:
+// CHECK-NEXT: <.plt>:
// CHECK-NEXT: 4011d0: pushl 4207276
// CHECK-NEXT: 4011d6: pushl %eax
// CHECK-NEXT: 4011d7: movl 4207280, %eax
diff --git a/lld/test/ELF/i386-retpoline-pic-linkerscript.s b/lld/test/ELF/i386-retpoline-pic-linkerscript.s
index fef364705dcc..5db492bd733e 100644
--- a/lld/test/ELF/i386-retpoline-pic-linkerscript.s
+++ b/lld/test/ELF/i386-retpoline-pic-linkerscript.s
@@ -14,7 +14,7 @@
// CHECK: Disassembly of section .plt:
// CHECK-EMPTY:
-// CHECK-NEXT: .plt:
+// CHECK-NEXT: <.plt>:
// CHECK-NEXT: 10: ff b3 04 00 00 00 pushl 4(%ebx)
// CHECK-NEXT: 16: 50 pushl %eax
// CHECK-NEXT: 17: 8b 83 08 00 00 00 movl 8(%ebx), %eax
diff --git a/lld/test/ELF/i386-retpoline-pic.s b/lld/test/ELF/i386-retpoline-pic.s
index a212f34db905..e5e24da6e3f6 100644
--- a/lld/test/ELF/i386-retpoline-pic.s
+++ b/lld/test/ELF/i386-retpoline-pic.s
@@ -12,7 +12,7 @@
// CHECK: Disassembly of section .plt:
// CHECK-EMPTY:
-// CHECK-NEXT: .plt:
+// CHECK-NEXT: <.plt>:
// CHECK-NEXT: 11d0: pushl 4(%ebx)
// CHECK-NEXT: 11d6: pushl %eax
// CHECK-NEXT: 11d7: movl 8(%ebx), %eax
diff --git a/lld/test/ELF/i386-tls-dynamic.s b/lld/test/ELF/i386-tls-dynamic.s
index 0b47087eba1f..7b5da4ad0b7c 100644
--- a/lld/test/ELF/i386-tls-dynamic.s
+++ b/lld/test/ELF/i386-tls-dynamic.s
@@ -77,7 +77,7 @@ addl tls1 at gotntpoff(%ebx),%eax
# DIS: Disassembly of section .text:
# DIS-EMPTY:
-# DIS-NEXT: _start:
+# DIS-NEXT: <_start>:
## General dynamic model:
## -4128 and -4120 are first and second GOT entries offsets.
## Each one is a pair of records.
diff --git a/lld/test/ELF/i386-tls-gdiele.s b/lld/test/ELF/i386-tls-gdiele.s
index 303f18720f64..315850acf392 100644
--- a/lld/test/ELF/i386-tls-gdiele.s
+++ b/lld/test/ELF/i386-tls-gdiele.s
@@ -15,7 +15,7 @@
// DISASM: Disassembly of section .text:
// DISASM-EMPTY:
-// DISASM-NEXT: _start:
+// DISASM-NEXT: <_start>:
// DISASM-NEXT: 4011d0: movl %gs:0, %eax
// DISASM-NEXT: addl -4104(%ebx), %eax
// DISASM-NEXT: movl %gs:0, %eax
diff --git a/lld/test/ELF/i386-tls-ie-shared.s b/lld/test/ELF/i386-tls-ie-shared.s
index e8e507881cbf..f38267e0b35d 100644
--- a/lld/test/ELF/i386-tls-ie-shared.s
+++ b/lld/test/ELF/i386-tls-ie-shared.s
@@ -41,7 +41,7 @@
// DISASMSHARED: Disassembly of section test:
// DISASMSHARED-EMPTY:
-// DISASMSHARED-NEXT: _start:
+// DISASMSHARED-NEXT: <_start>:
// (.got)[0] = 0x3388 = 13192
// (.got)[1] = 13196
// (.got)[2] = 13200
diff --git a/lld/test/ELF/i386-tls-le.s b/lld/test/ELF/i386-tls-le.s
index e2e5fa6d0edc..be82edb3965c 100644
--- a/lld/test/ELF/i386-tls-le.s
+++ b/lld/test/ELF/i386-tls-le.s
@@ -32,7 +32,7 @@ _start:
# DIS: Disassembly of section test:
# DIS-EMPTY:
-# DIS-NEXT: _start:
+# DIS-NEXT: <_start>:
# DIS-NEXT: 402134: movl $8, %edx
# DIS-NEXT: 402139: movl %gs:0, %ecx
# DIS-NEXT: 402140: subl %edx, %eax
@@ -49,7 +49,7 @@ _start:
# DISSHARED: Disassembly of section test:
# DISSHARED-EMPTY:
-# DISSHARED-NEXT: _start:
+# DISSHARED-NEXT: <_start>:
# DISSHARED-NEXT: 2218: movl $0, %edx
# DISSHARED-NEXT: 221d: movl %gs:0, %ecx
# DISSHARED-NEXT: 2224: subl %edx, %eax
diff --git a/lld/test/ELF/i386-tls-opt-iele-nopic.s b/lld/test/ELF/i386-tls-opt-iele-nopic.s
index b3f36ea911d1..f3ff13fcd057 100644
--- a/lld/test/ELF/i386-tls-opt-iele-nopic.s
+++ b/lld/test/ELF/i386-tls-opt-iele-nopic.s
@@ -31,7 +31,7 @@
// DISASM: Disassembly of section .text:
// DISASM-EMPTY:
-// DISASM-NEXT: _start:
+// DISASM-NEXT: <_start>:
// DISASM-NEXT: 4011b0: movl $0xfffffff8, %ecx
// DISASM-NEXT: movl %gs:(%ecx), %eax
// DISASM-NEXT: movl $0xfffffff8, %eax
diff --git a/lld/test/ELF/i386-tls-opt.s b/lld/test/ELF/i386-tls-opt.s
index 9bc028832d0e..d6838cab7397 100644
--- a/lld/test/ELF/i386-tls-opt.s
+++ b/lld/test/ELF/i386-tls-opt.s
@@ -9,7 +9,7 @@
// DISASM: Disassembly of section .text:
// DISASM-EMPTY:
-// DISASM-NEXT: _start:
+// DISASM-NEXT: <_start>:
// LD -> LE:
// DISASM-NEXT: 4010f4: 65 a1 00 00 00 00 movl %gs:0, %eax
// DISASM-NEXT: 4010fa: 90 nop
diff --git a/lld/test/ELF/linkerscript/excludefile.s b/lld/test/ELF/linkerscript/excludefile.s
index 3f8e55efd0b8..48ef151fcbc1 100644
--- a/lld/test/ELF/linkerscript/excludefile.s
+++ b/lld/test/ELF/linkerscript/excludefile.s
@@ -11,17 +11,17 @@
# CHECK: Disassembly of section .text:
# CHECK-EMPTY:
-# CHECK: _start:
+# CHECK: <_start>:
# CHECK-NEXT: : 48 c7 c0 3c 00 00 00 movq $60, %rax
# CHECK-NEXT: : 48 c7 c7 2a 00 00 00 movq $42, %rdi
# CHECK-NEXT: : cc int3
# CHECK-NEXT: : cc int3
-# CHECK: _potato:
+# CHECK: <_potato>:
# CHECK-NEXT: : 90 nop
# CHECK-NEXT: : 90 nop
# CHECK-NEXT: : cc int3
# CHECK-NEXT: : cc int3
-# CHECK: tomato:
+# CHECK: <tomato>:
# CHECK-NEXT: : b8 01 00 00 00 movl $1, %eax
# RUN: echo "SECTIONS { .patatino : \
@@ -32,17 +32,17 @@
# EXCLUDE: Disassembly of section .patatino:
# EXCLUDE-EMPTY:
-# EXCLUDE: _start:
+# EXCLUDE: <_start>:
# EXCLUDE-NEXT: : 48 c7 c0 3c 00 00 00 movq $60, %rax
# EXCLUDE-NEXT: : 48 c7 c7 2a 00 00 00 movq $42, %rdi
# EXCLUDE-NEXT: : cc int3
# EXCLUDE-NEXT: : cc int3
-# EXCLUDE: _potato:
+# EXCLUDE: <_potato>:
# EXCLUDE-NEXT: : 90 nop
# EXCLUDE-NEXT: : 90 nop
# EXCLUDE: Disassembly of section .text:
# EXCLUDE-EMPTY:
-# EXCLUDE: tomato:
+# EXCLUDE: <tomato>:
# EXCLUDE-NEXT: : b8 01 00 00 00 movl $1, %eax
.section .text
diff --git a/lld/test/ELF/linkerscript/non-absolute.s b/lld/test/ELF/linkerscript/non-absolute.s
index 7d3921c060e4..8ba3f99c92f9 100644
--- a/lld/test/ELF/linkerscript/non-absolute.s
+++ b/lld/test/ELF/linkerscript/non-absolute.s
@@ -9,7 +9,7 @@
# B - (0x94+6) = -0xf - (0x94+6) = -169
# DUMP: Disassembly of section .text:
# DUMP-EMPTY:
-# DUMP-NEXT: foo:
+# DUMP-NEXT: <foo>:
# DUMP-NEXT: 94: {{.*}} -169(%rip), %eax
# SYMBOL: Symbol {
diff --git a/lld/test/ELF/local-got-pie.s b/lld/test/ELF/local-got-pie.s
index 794198c5c420..cab43e42836a 100644
--- a/lld/test/ELF/local-got-pie.s
+++ b/lld/test/ELF/local-got-pie.s
@@ -16,9 +16,9 @@ foo:
// 0x22C8 - 0x1210 - 5 = 4275
// DISASM: Disassembly of section .text:
// DISASM-EMPTY:
-// DISASM-NEXT: _start:
+// DISASM-NEXT: <_start>:
// DISASM-NEXT: 1210: {{.*}} callq 4275
-// DISASM: foo:
+// DISASM: <foo>:
// DISASM-NEXT: 1215: {{.*}} nop
// CHECK: Name: .got
diff --git a/lld/test/ELF/local-got-shared.s b/lld/test/ELF/local-got-shared.s
index 13a7cc775a88..554e2b126eac 100644
--- a/lld/test/ELF/local-got-shared.s
+++ b/lld/test/ELF/local-got-shared.s
@@ -13,10 +13,10 @@ foo:
nop
// 0x22E0 - 0x1228 - 5 = 4275
-// DISASM: bar:
+// DISASM: <bar>:
// DISASM-NEXT: 1228: callq 4275
-// DISASM: foo:
+// DISASM: <foo>:
// DISASM-NEXT: 122d: nop
// CHECK: Name: .got
diff --git a/lld/test/ELF/local-got.s b/lld/test/ELF/local-got.s
index c9f1d9ee9ab4..17cb2da8a165 100644
--- a/lld/test/ELF/local-got.s
+++ b/lld/test/ELF/local-got.s
@@ -17,11 +17,11 @@ foo:
// 0x202320 - 0x201250 - 5 = 4299
// 0x202328 - 0x201255 - 5 = 4302
-// DISASM: _start:
+// DISASM: <_start>:
// DISASM-NEXT: 201250: callq 4299
// DISASM-NEXT: 201255: callq 4302
-// DISASM: foo:
+// DISASM: <foo>:
// DISASM-NEXT: 20125a: nop
// CHECK: Name: .got
diff --git a/lld/test/ELF/lto/codemodel.ll b/lld/test/ELF/lto/codemodel.ll
index 15d32caafd52..549377544535 100644
--- a/lld/test/ELF/lto/codemodel.ll
+++ b/lld/test/ELF/lto/codemodel.ll
@@ -12,9 +12,9 @@ target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16
define i32* @_start() nounwind readonly {
entry:
-; CHECK-SMALL-LABEL: _start:
+; CHECK-SMALL-LABEL: <_start>:
; CHECK-SMALL: movl $2097440, %eax
-; CHECK-LARGE-LABEL: _start:
+; CHECK-LARGE-LABEL: <_start>:
; CHECK-LARGE: movabsq $2097440, %rax
ret i32* getelementptr ([0 x i32], [0 x i32]* @data, i64 0, i64 0)
}
diff --git a/lld/test/ELF/lto/defsym.ll b/lld/test/ELF/lto/defsym.ll
index 1c5c743ea3d1..750c39362906 100644
--- a/lld/test/ELF/lto/defsym.ll
+++ b/lld/test/ELF/lto/defsym.ll
@@ -18,7 +18,7 @@
; Call to bar2() should not be inlined and should be routed to bar3()
; Symbol bar3 should not be eliminated
-; CHECK: foo:
+; CHECK: <foo>:
; CHECK-NEXT: pushq %rax
; CHECK-NEXT: callq
; CHECK-NEXT: callq{{.*}}<bar3>
diff --git a/lld/test/ELF/lto/linker-script-symbols-ipo.ll b/lld/test/ELF/lto/linker-script-symbols-ipo.ll
index f22f13487807..179cc833ffec 100644
--- a/lld/test/ELF/lto/linker-script-symbols-ipo.ll
+++ b/lld/test/ELF/lto/linker-script-symbols-ipo.ll
@@ -7,7 +7,7 @@
; RUN: ld.lld %t1.o %t2.o -o %t3 -save-temps
; RUN: llvm-objdump -d %t3 | FileCheck %s --check-prefix=IPO
; IPO: Disassembly of section .text:
-; IPO: _start:
+; IPO: <_start>:
; IPO-NEXT: movl $1, %eax
; IPO-NEXT: retq
@@ -15,9 +15,9 @@
; RUN: ld.lld %t1.o %t2.o -o %t4 --script %t.script -save-temps
; RUN: llvm-objdump -d %t4 | FileCheck %s --check-prefix=NOIPO
; NOIPO: Disassembly of section .text:
-; NOIPO: foo:
+; NOIPO: <foo>:
; NOIPO-NEXT: movl $2, %eax
-; NOIPO: _start:
+; NOIPO: <_start>:
; NOIPO-NEXT: jmp -21 <foo>
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
diff --git a/lld/test/ELF/lto/weakodr-visibility.ll b/lld/test/ELF/lto/weakodr-visibility.ll
index b041d79a8914..02eee7f9fa0f 100644
--- a/lld/test/ELF/lto/weakodr-visibility.ll
+++ b/lld/test/ELF/lto/weakodr-visibility.ll
@@ -22,14 +22,14 @@
; CHECK-NEXT: ]
; CHECK-NEXT: Section:
; CHECK-NEXT: }
-; FIRST: foo:
+; FIRST: <foo>:
; FIRST-NEXT: movl $41, %eax
; Now swap the files order.
; RUN: ld.lld %t2.o %t1.o -o %t.so -shared
; RUN: llvm-readobj --symbols %t.so | FileCheck %s
; RUN: llvm-objdump -d %t.so | FileCheck %s --check-prefix=SECOND
-; SECOND: foo:
+; SECOND: <foo>:
; SECOND-NEXT: movl $42, %eax
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
diff --git a/lld/test/ELF/lto/wrap-2.ll b/lld/test/ELF/lto/wrap-2.ll
index 205053071940..4c8993aa0424 100644
--- a/lld/test/ELF/lto/wrap-2.ll
+++ b/lld/test/ELF/lto/wrap-2.ll
@@ -16,7 +16,7 @@
; Make sure that calls in foo() are not eliminated and that bar is
; routed to __wrap_bar and __real_bar is routed to bar.
-; CHECK: foo:
+; CHECK: <foo>:
; CHECK-NEXT: pushq %rax
; CHECK-NEXT: callq{{.*}}<__wrap_bar>
; CHECK-NEXT: popq %rax
diff --git a/lld/test/ELF/merge.s b/lld/test/ELF/merge.s
index 381465f0c2fd..d77edd6110f9 100644
--- a/lld/test/ELF/merge.s
+++ b/lld/test/ELF/merge.s
@@ -73,7 +73,7 @@ zed:
_start:
// DISASM: Disassembly of section .text:
// DISASM-EMPTY:
-// DISASM-NEXT: _start:
+// DISASM-NEXT: <_start>:
movl .mysec, %eax
// addr(0x10) = 2097440
diff --git a/lld/test/ELF/mips-26-mask.s b/lld/test/ELF/mips-26-mask.s
index 64c097e08b93..41cdb894f935 100644
--- a/lld/test/ELF/mips-26-mask.s
+++ b/lld/test/ELF/mips-26-mask.s
@@ -7,7 +7,7 @@
# CHECK: Disassembly of section .text:
# CHECK-EMPTY:
-# CHECK: __start:
+# CHECK: <__start>:
# CHECK-NEXT: [[ADDR:[0-9a-f]+]]: jal 0x80[[ADDR]]
.text
diff --git a/lld/test/ELF/mips-26.s b/lld/test/ELF/mips-26.s
index fa747cd65049..1cfa8ba02bed 100644
--- a/lld/test/ELF/mips-26.s
+++ b/lld/test/ELF/mips-26.s
@@ -12,23 +12,23 @@
# CHECK: Disassembly of section .text:
# CHECK-EMPTY:
-# CHECK-NEXT: bar:
+# CHECK-NEXT: <bar>:
# CHECK-NEXT: [[BAR:[0-9a-f]+]]: jal 0x[[LOC:[0-9a-f]+]] <loc>
# CHECK-NEXT: {{.*}}: nop
#
-# CHECK: __start:
+# CHECK: <__start>:
# CHECK-NEXT: {{.*}}: jal 0x[[BAR]] <bar>
# CHECK-NEXT: {{.*}}: nop
# CHECK-NEXT: {{.*}}: jal 0x[[FOO0:[0-9a-f]+]]
# ^-- gotplt[foo0]
# CHECK-NEXT: {{.*}}: nop
#
-# CHECK: loc:
+# CHECK: <loc>:
# CHECK-NEXT: [[LOC]]: nop
# CHECK-EMPTY:
# CHECK-NEXT: Disassembly of section .plt:
# CHECK-EMPTY:
-# CHECK-NEXT: .plt:
+# CHECK-NEXT: <.plt>:
# CHECK-NEXT: {{.*}}: lui $gp, 0x3
# CHECK-NEXT: {{.*}}: lw $25, {{.*}}($gp)
# CHECK-NEXT: {{.*}}: addiu $gp, $gp, {{.*}}
diff --git a/lld/test/ELF/mips-64-disp.s b/lld/test/ELF/mips-64-disp.s
index a26b45073688..9c5e6d2eb186 100644
--- a/lld/test/ELF/mips-64-disp.s
+++ b/lld/test/ELF/mips-64-disp.s
@@ -9,16 +9,16 @@
# RUN: llvm-objdump -d -t --no-show-raw-insn %t.exe | FileCheck %s
# RUN: llvm-readelf -r -s -A %t.exe | FileCheck -check-prefix=GOT %s
-# CHECK: __start:
+# CHECK: <__start>:
# CHECK-NEXT: {{.*}}: addiu $2, $2, -32704
# CHECK-EMPTY:
-# CHECK-NEXT: b4:
+# CHECK-NEXT: <b4>:
# CHECK-NEXT: {{.*}}: addiu $2, $2, -32736
# CHECK-EMPTY:
-# CHECK-NEXT: b8:
+# CHECK-NEXT: <b8>:
# CHECK-NEXT: {{.*}}: addiu $2, $2, -32728
# CHECK-EMPTY:
-# CHECK-NEXT: b12:
+# CHECK-NEXT: <b12>:
# CHECK-NEXT: {{.*}}: addiu $2, $2, -32720
# CHECK-NEXT: {{.*}}: addiu $2, $2, -32712
diff --git a/lld/test/ELF/mips-64-got.s b/lld/test/ELF/mips-64-got.s
index f7bd38743bdf..e414818cf687 100644
--- a/lld/test/ELF/mips-64-got.s
+++ b/lld/test/ELF/mips-64-got.s
@@ -12,7 +12,7 @@
# CHECK: {{[0-9a-f]+}}1c8 l .text 0000000000000000 foo
-# CHECK: __start:
+# CHECK: <__start>:
# CHECK-NEXT: {{.*}} ld $2, -32736($gp)
# CHECK-NEXT: {{.*}} daddiu $2, $2, 456
# CHECK-NEXT: {{.*}} addiu $2, $2, -32704
diff --git a/lld/test/ELF/mips-64-rels.s b/lld/test/ELF/mips-64-rels.s
index bd4fd1bfed76..cda0ea92846b 100644
--- a/lld/test/ELF/mips-64-rels.s
+++ b/lld/test/ELF/mips-64-rels.s
@@ -17,12 +17,12 @@
# CHECK-NEXT: {{[0-9a-f]+}} ffffffff fffe9014
# ^-- 0x21004 - 0x37ff0 = 0xfffffffffffe9014
-# CHECK: __start:
+# CHECK: <__start>:
# CHECK-NEXT: 21000: lui $gp, 0x1
# ^-- 0x21000 - 0x37ff0
# ^-- 0 - 0xffffffffffff9010
# ^-- %hi(0x16ff0)
-# CHECK: loc:
+# CHECK: <loc>:
# CHECK-NEXT: 21004: daddiu $gp, $gp, 0x6ff0
# ^-- 0x21000 - 0x37ff0
# ^-- 0 - 0xfffffffffffe9010
diff --git a/lld/test/ELF/mips-call-hilo.s b/lld/test/ELF/mips-call-hilo.s
index 35d2c414611c..7d6cb39e8888 100644
--- a/lld/test/ELF/mips-call-hilo.s
+++ b/lld/test/ELF/mips-call-hilo.s
@@ -8,7 +8,7 @@
# CHECK: Disassembly of section .text:
# CHECK-EMPTY:
-# CHECK-NEXT: foo:
+# CHECK-NEXT: <foo>:
# CHECK-NEXT: {{.*}}: lui $2, 0
# CHECK-NEXT: {{.*}}: lw $2, -32736($2)
# CHECK-NEXT: {{.*}}: lui $2, 0
diff --git a/lld/test/ELF/mips-call16.s b/lld/test/ELF/mips-call16.s
index c67f3f0cc5ab..e1109dc9fbce 100644
--- a/lld/test/ELF/mips-call16.s
+++ b/lld/test/ELF/mips-call16.s
@@ -18,7 +18,7 @@ g1:
# CHECK: Disassembly of section .text:
# CHECK-EMPTY:
-# CHECK-NEXT: __start:
+# CHECK-NEXT: <__start>:
# CHECK-NEXT: {{.*}}: lw $8, -32744
# GOT: Symbol table '.symtab'
diff --git a/lld/test/ELF/mips-got-hilo.s b/lld/test/ELF/mips-got-hilo.s
index 1c6f609b1ce4..7b89a7937bb2 100644
--- a/lld/test/ELF/mips-got-hilo.s
+++ b/lld/test/ELF/mips-got-hilo.s
@@ -8,7 +8,7 @@
# CHECK: Disassembly of section .text:
# CHECK-EMPTY:
-# CHECK-NEXT: foo:
+# CHECK-NEXT: <foo>:
# CHECK-NEXT: {{.*}}: lui $2, 0
# CHECK-NEXT: {{.*}}: lw $2, -32736($2)
# CHECK-NEXT: {{.*}}: lui $2, 0
diff --git a/lld/test/ELF/mips-got16-relocatable.s b/lld/test/ELF/mips-got16-relocatable.s
index b48d91aee28e..046038664b7d 100644
--- a/lld/test/ELF/mips-got16-relocatable.s
+++ b/lld/test/ELF/mips-got16-relocatable.s
@@ -11,7 +11,7 @@
# OBJ: Disassembly of section .text:
# OBJ-EMPTY:
-# OBJ-NEXT: .text:
+# OBJ-NEXT: <.text>:
# OBJ-NEXT: lw $25, 0($gp)
# OBJ-NEXT: 00000000: R_MIPS_GOT16 .data
# OBJ-NEXT: addiu $4, $25, 0
@@ -27,7 +27,7 @@
# SO: Disassembly of section .text:
# SO-EMPTY:
-# SO-NEXT: .text:
+# SO-NEXT: <.text>:
# SO-NEXT: lw $25, -0x7fe8($gp)
# SO-NEXT: addiu $4, $25, 0x[[D1]]
# SO: lw $25, -0x7fe8($gp)
diff --git a/lld/test/ELF/mips-got16.s b/lld/test/ELF/mips-got16.s
index de7aaaceec58..50f225b545bb 100644
--- a/lld/test/ELF/mips-got16.s
+++ b/lld/test/ELF/mips-got16.s
@@ -14,7 +14,7 @@
# CHECK: 00024008 l .data 00000000 .hidden bar
# CHECK: 00000000 *UND* 00000000 foo
-# CHECK: __start:
+# CHECK: <__start>:
# CHECK-NEXT: lw $8, -32744($gp)
# CHECK-NEXT: addi $8, $8, 8236
# CHECK-NEXT: lw $8, -32732($gp)
diff --git a/lld/test/ELF/mips-gp-disp.s b/lld/test/ELF/mips-gp-disp.s
index deda9c6aeed5..db0f3018129c 100644
--- a/lld/test/ELF/mips-gp-disp.s
+++ b/lld/test/ELF/mips-gp-disp.s
@@ -21,7 +21,7 @@
# DIS: 00002000 g .text 00000000 __start
# DIS: Disassembly of section .text:
# DIS-EMPTY:
-# DIS-NEXT: __start:
+# DIS-NEXT: <__start>:
# DIS-NEXT: lui $8, 3
# DIS-NEXT: addi $8, $8, 24560
# ^-- (_gp - __start) & 0xffff
diff --git a/lld/test/ELF/mips-gp-local.s b/lld/test/ELF/mips-gp-local.s
index 0ff7440e5e39..3e3d5b194a11 100644
--- a/lld/test/ELF/mips-gp-local.s
+++ b/lld/test/ELF/mips-gp-local.s
@@ -12,7 +12,7 @@
# CHECK: 00037ff0 l .got 00000000 .hidden _gp
# CHECK: 00011000 g .text 00000000 __start
-# CHECK: __start:
+# CHECK: <__start>:
# CHECK-NEXT: lui $8, 3
# CHECK-NEXT: addi $8, $8, 32752
diff --git a/lld/test/ELF/mips-higher-highest.s b/lld/test/ELF/mips-higher-highest.s
index 9f243492e674..b130ff8b8e71 100644
--- a/lld/test/ELF/mips-higher-highest.s
+++ b/lld/test/ELF/mips-higher-highest.s
@@ -14,10 +14,10 @@ __start:
lui $7, %highest(_foo+0x300047FFF7FF8)
ld $7, %higher (_foo+0x300047FFF7FF8)($7)
-# CHECK: __start:
+# CHECK: <__start>:
# CHECK-NEXT: lui $6, 3
# CHECK-NEXT: daddiu $6, $6, 5
# CHECK-NEXT: lui $7, 3
# CHECK-NEXT: ld $7, 5($7)
# CHECK-EMPTY:
-# CHECK-NEXT: _foo:
+# CHECK-NEXT: <_foo>:
diff --git a/lld/test/ELF/mips-hilo-gp-disp.s b/lld/test/ELF/mips-hilo-gp-disp.s
index 9e3b26ad1d83..3be462c94fb4 100644
--- a/lld/test/ELF/mips-hilo-gp-disp.s
+++ b/lld/test/ELF/mips-hilo-gp-disp.s
@@ -30,12 +30,12 @@ bar:
# CHECK: Disassembly of section .text:
# CHECK-EMPTY:
-# CHECK-NEXT: __start:
+# CHECK-NEXT: <__start>:
# CHECK-NEXT: 11000: lui $8, 2
# ^-- %hi(0x37ff0-0x11000)
# CHECK-NEXT: 11004: addi $8, $8, 28656
# ^-- %lo(0x37ff0-0x11004+4)
-# CHECK: bar:
+# CHECK: <bar>:
# CHECK-NEXT: 1100c: lui $8, 2
# ^-- %hi(0x37ff0-0x1100c)
# CHECK-NEXT: 11010: addi $8, $8, 28644
diff --git a/lld/test/ELF/mips-hilo-hi-only.s b/lld/test/ELF/mips-hilo-hi-only.s
index f9fca07d5a34..9f320a9133f0 100644
--- a/lld/test/ELF/mips-hilo-hi-only.s
+++ b/lld/test/ELF/mips-hilo-hi-only.s
@@ -19,7 +19,7 @@ _label:
# CHECK: 00020{{0*}}[[VAL:[0-9a-f]+]] l .text 00000000 _label
# CHECK: 00020{{.*}} g .text 00000000 __start
-# CHECK: __start:
+# CHECK: <__start>:
# CHECK-NEXT: lui $8, 0x3
# ^-- %hi(__start) w/o addend
# CHECK-NEXT: addi $8, $8, 0x[[VAL]]
diff --git a/lld/test/ELF/mips-hilo.s b/lld/test/ELF/mips-hilo.s
index d25e2682b4a4..38876f642b89 100644
--- a/lld/test/ELF/mips-hilo.s
+++ b/lld/test/ELF/mips-hilo.s
@@ -35,7 +35,7 @@ g1:
# CHECK: 0021000 g .text 00000000 __start
# CHECK: 0021024 g O .data 00000004 g1
-# CHECK: __start:
+# CHECK: <__start>:
# CHECK-NEXT: 21000: lui $8, 2
# ^-- %hi(__start+4)
# CHECK-NEXT: 21004: lui $9, 2
diff --git a/lld/test/ELF/mips-jalr-non-functions.s b/lld/test/ELF/mips-jalr-non-functions.s
index 70f899c48f6c..0b1cb75ca622 100644
--- a/lld/test/ELF/mips-jalr-non-functions.s
+++ b/lld/test/ELF/mips-jalr-non-functions.s
@@ -49,7 +49,7 @@ reg_obj:
# CHECK-LABEL: Disassembly of section .text:
# CHECK-EMPTY:
-# CHECK-NEXT: test:
+# CHECK-NEXT: <test>:
# CHECK-NEXT: jr $25
# CHECK-NEXT: nop
# CHECK-NEXT: jr $25
diff --git a/lld/test/ELF/mips-micro-cross-calls.s b/lld/test/ELF/mips-micro-cross-calls.s
index 973292d08ef7..deca0ae1934c 100644
--- a/lld/test/ELF/mips-micro-cross-calls.s
+++ b/lld/test/ELF/mips-micro-cross-calls.s
@@ -18,12 +18,12 @@
# REG: {{0*}}[[BAR:[0-9a-f]+]] g F .text 00000000 bar
# REG: {{0*}}[[MIC:[0-9a-f]+]] g .text 00000000 0x80 micro
-# REG: __start:
+# REG: <__start>:
# REG-NEXT: jalx 0x[[MIC]] <micro>
# REG-NEXT: nop
# REG-NEXT: jalx 0x[[FOOT]] <__microLA25Thunk_foo>
-# REG: __LA25Thunk_bar:
+# REG: <__LA25Thunk_bar>:
# REG-NEXT: lui $25, 0x2
# REG-NEXT: j 0x[[BAR]] <bar>
@@ -31,12 +31,12 @@
# MICRO: {{0*}}[[START:[0-9a-f]+]] g .text 00000000 __start
# MICRO: {{0*}}[[FOO:[0-9a-f]+]] g F .text 00000000 0x80 foo
-# MICRO: micro:
+# MICRO: <micro>:
# MICRO-NEXT: jalx 0x[[START]]
# MICRO-NEXT: nop
# MICRO-NEXT: jalx 0x[[BART]]
-# MICRO: __microLA25Thunk_foo:
+# MICRO: <__microLA25Thunk_foo>:
# MICRO-NEXT: lui $25, 0x2
# MICRO-NEXT: j 0x[[FOO]] <foo>
diff --git a/lld/test/ELF/mips-micro-plt.s b/lld/test/ELF/mips-micro-plt.s
index 93a058df44a2..f491190f2a3a 100644
--- a/lld/test/ELF/mips-micro-plt.s
+++ b/lld/test/ELF/mips-micro-plt.s
@@ -35,13 +35,13 @@
# CHECK: Address Initial Sym.Val. Type Ndx Name
# CHECK: 00020301 00020321 FUNC UND foo0
-# ASM: __start:
+# ASM: <__start>:
# ASM-NEXT: 20200: lw $8, -32744($gp)
# ASM-NEXT: addi $8, $8, 529
# ASM-NEXT: lui $8, 2
# ASM-NEXT: addi $8, $8, 801
#
-# ASM: foo:
+# ASM: <foo>:
# ASM-NEXT: 20210: jal 131872
.text
diff --git a/lld/test/ELF/mips-micro-relocs.s b/lld/test/ELF/mips-micro-relocs.s
index 785d0227a620..e72fafb80585 100644
--- a/lld/test/ELF/mips-micro-relocs.s
+++ b/lld/test/ELF/mips-micro-relocs.s
@@ -41,7 +41,7 @@
# EL: Contents of section .debug_info
# EL-NEXT: 0000 11010200
-# ASM: __start:
+# ASM: <__start>:
# ASM-NEXT: 20110: lui $3, 1
# ASM-NEXT: addiu $3, $3, 32495
# ASM-NEXT: lw $3, -32744($gp)
diff --git a/lld/test/ELF/mips-micro-thunks.s b/lld/test/ELF/mips-micro-thunks.s
index 90f984cd52f6..733cef87bbbf 100644
--- a/lld/test/ELF/mips-micro-thunks.s
+++ b/lld/test/ELF/mips-micro-thunks.s
@@ -41,20 +41,20 @@
# RUN: llvm-objdump -d -mattr=+micromips --no-show-raw-insn %t-el-r6.exe \
# RUN: | FileCheck --check-prefix=R6 %s
-# R2: __start:
+# R2: <__start>:
# R2-NEXT: 20100: jal 131336 <__microLA25Thunk_foo>
# R2-NEXT: nop
-# R2: __microLA25Thunk_foo:
+# R2: <__microLA25Thunk_foo>:
# R2-NEXT: 20108: lui $25, 2
# R2-NEXT: j 131360 <foo>
# R2-NEXT: addiu $25, $25, 289
# R2-NEXT: nop
-# R6: __start:
+# R6: <__start>:
# R6-NEXT: 20100: balc 0 <__start>
-# R6: __microLA25Thunk_foo:
+# R6: <__microLA25Thunk_foo>:
# R6-NEXT: 20104: lui $25, 2
# R6-NEXT: addiu $25, $25, 273
# R6-NEXT: bc 0 <__microLA25Thunk_foo+0x8>
diff --git a/lld/test/ELF/mips-micror6-relocs.s b/lld/test/ELF/mips-micror6-relocs.s
index 29b75b8976d7..7497f1306e1e 100644
--- a/lld/test/ELF/mips-micror6-relocs.s
+++ b/lld/test/ELF/mips-micror6-relocs.s
@@ -23,7 +23,7 @@
# CHECK: 00020100 g F .text 00000000 0x80 foo
# CHECK: 00020110 g .text 00000000 0x80 __start
-# CHECK: __start:
+# CHECK: <__start>:
# CHECK-NEXT: 20110: lapc $2, -12
# CHECK-NEXT: beqzc $3, -36
# CHECK-NEXT: balc -24 <foo>
diff --git a/lld/test/ELF/mips-n32-rels.s b/lld/test/ELF/mips-n32-rels.s
index ac4b041617a0..803b32b42dee 100644
--- a/lld/test/ELF/mips-n32-rels.s
+++ b/lld/test/ELF/mips-n32-rels.s
@@ -36,12 +36,12 @@ loc:
# CHECK: Disassembly of section .text:
# CHECK-EMPTY:
-# CHECK-NEXT: __start:
+# CHECK-NEXT: <__start>:
# CHECK-NEXT: 20100: lui $gp, 1
# ^-- 0x20100 - 0x28100
# ^-- 0 - 0xffff8000
# ^-- %hi(0x8000)
-# CHECK: loc:
+# CHECK: <loc>:
# CHECK-NEXT: 20104: daddiu $gp, $gp, -32768
# ^-- 0x20100 - 0x28100
# ^-- 0 - 0xffff8000
diff --git a/lld/test/ELF/mips-npic-call-pic-os.s b/lld/test/ELF/mips-npic-call-pic-os.s
index 3f08129bb3f6..98925c19b8d1 100644
--- a/lld/test/ELF/mips-npic-call-pic-os.s
+++ b/lld/test/ELF/mips-npic-call-pic-os.s
@@ -15,44 +15,44 @@
# CHECK: Disassembly of section .text:
# CHECK-EMPTY:
-# CHECK-NEXT: __LA25Thunk_foo1a:
+# CHECK-NEXT: <__LA25Thunk_foo1a>:
# CHECK-NEXT: lui $25, 0x2
# CHECK-NEXT: j {{.*}} <foo1a>
# CHECK-NEXT: addiu $25, $25, {{.*}}
-# CHECK: __LA25Thunk_foo1b:
+# CHECK: <__LA25Thunk_foo1b>:
# CHECK-NEXT: lui $25, 0x2
# CHECK-NEXT: j {{.*}} <foo1b>
# CHECK-NEXT: addiu $25, $25, {{.*}}
-# CHECK: foo1a:
+# CHECK: <foo1a>:
# CHECK-NEXT: nop
-# CHECK: foo1b:
+# CHECK: <foo1b>:
# CHECK-NEXT: nop
-# CHECK: __LA25Thunk_foo2:
+# CHECK: <__LA25Thunk_foo2>:
# CHECK-NEXT: lui $25, 0x2
# CHECK-NEXT: j {{.*}} <foo2>
# CHECK-NEXT: addiu $25, $25, {{.*}}
-# CHECK: foo2:
+# CHECK: <foo2>:
# CHECK-NEXT: nop
-# CHECK: __LA25Thunk_fpic:
+# CHECK: <__LA25Thunk_fpic>:
# CHECK-NEXT: lui $25, 0x2
# CHECK-NEXT: j {{.*}} <fpic>
# CHECK-NEXT: addiu $25, $25, {{.*}}
-# CHECK: fpic:
+# CHECK: <fpic>:
# CHECK-NEXT: nop
-# CHECK: fnpic:
+# CHECK: <fnpic>:
# CHECK-NEXT: nop
# CHECK-EMPTY:
# CHECK-NEXT: Disassembly of section .
diff erentos:
# CHECK-EMPTY:
-# CHECK-NEXT: __start:
+# CHECK-NEXT: <__start>:
# CHECK-NEXT: jal {{.*}} <__LA25Thunk_foo1a>
# CHECK-NEXT: nop
# CHECK-NEXT: jal {{.*}} <__LA25Thunk_foo2>
diff --git a/lld/test/ELF/mips-npic-call-pic-script.s b/lld/test/ELF/mips-npic-call-pic-script.s
index d529271dae16..ff5a582afb13 100644
--- a/lld/test/ELF/mips-npic-call-pic-script.s
+++ b/lld/test/ELF/mips-npic-call-pic-script.s
@@ -15,34 +15,34 @@
# CHECK: Disassembly of section .out:
# CHECK-EMPTY:
-# CHECK-NEXT: __LA25Thunk_foo1a:
+# CHECK-NEXT: <__LA25Thunk_foo1a>:
# CHECK-NEXT: 20000: lui $25, 2
# CHECK-NEXT: 20004: j 131104 <foo1a>
# CHECK-NEXT: 20008: addiu $25, $25, 32
# CHECK-NEXT: 2000c: nop
-# CHECK: __LA25Thunk_foo1b:
+# CHECK: <__LA25Thunk_foo1b>:
# CHECK-NEXT: 20010: lui $25, 2
# CHECK-NEXT: 20014: j 131108 <foo1b>
# CHECK-NEXT: 20018: addiu $25, $25, 36
# CHECK-NEXT: 2001c: nop
-# CHECK: foo1a:
+# CHECK: <foo1a>:
# CHECK-NEXT: 20020: nop
-# CHECK: foo1b:
+# CHECK: <foo1b>:
# CHECK-NEXT: 20024: nop
-# CHECK: __LA25Thunk_foo2:
+# CHECK: <__LA25Thunk_foo2>:
# CHECK-NEXT: 20028: lui $25, 2
# CHECK-NEXT: 2002c: j 131136 <foo2>
# CHECK-NEXT: 20030: addiu $25, $25, 64
# CHECK-NEXT: 20034: nop
-# CHECK: foo2:
+# CHECK: <foo2>:
# CHECK-NEXT: 20040: nop
-# CHECK: __start:
+# CHECK: <__start>:
# CHECK-NEXT: 20150: jal 131072 <__LA25Thunk_foo1a>
# CHECK-NEXT: 20154: nop
# CHECK-NEXT: 20158: jal 131112 <__LA25Thunk_foo2>
@@ -56,16 +56,16 @@
# CHECK-NEXT: 20178: jal 131488 <fnpic>
# CHECK-NEXT: 2017c: nop
-# CHECK: __LA25Thunk_fpic:
+# CHECK: <__LA25Thunk_fpic>:
# CHECK-NEXT: 20180: lui $25, 2
# CHECK-NEXT: 20184: j 131472 <fpic>
# CHECK-NEXT: 20188: addiu $25, $25, 400
# CHECK-NEXT: 2018c: nop
-# CHECK: fpic:
+# CHECK: <fpic>:
# CHECK-NEXT: 20190: nop
-# CHECK: fnpic:
+# CHECK: <fnpic>:
# CHECK-NEXT: 201a0: nop
.text
@@ -86,7 +86,7 @@ __start:
# ORPH1: Disassembly of section .text:
# ORPH1-EMPTY:
-# ORPH1-NEXT: __start:
+# ORPH1-NEXT: <__start>:
# ORPH1-NEXT: 20000: jal 131156 <__LA25Thunk_foo1a>
# ORPH1-NEXT: 20004: nop
# ORPH1-NEXT: 20008: jal 131208 <__LA25Thunk_foo2>
@@ -100,43 +100,43 @@ __start:
# ORPH1-NEXT: 20028: jal 131152 <fnpic>
# ORPH1-NEXT: 2002c: nop
-# ORPH1: __LA25Thunk_fpic:
+# ORPH1: <__LA25Thunk_fpic>:
# ORPH1-NEXT: 20030: lui $25, 2
# ORPH1-NEXT: 20034: j 131136 <fpic>
# ORPH1-NEXT: 20038: addiu $25, $25, 64
# ORPH1-NEXT: 2003c: nop
-# ORPH1: fpic:
+# ORPH1: <fpic>:
# ORPH1-NEXT: 20040: nop
-# ORPH1: fnpic:
+# ORPH1: <fnpic>:
# ORPH1-NEXT: 20050: nop
-# ORPH1: __LA25Thunk_foo1a:
+# ORPH1: <__LA25Thunk_foo1a>:
# ORPH1-NEXT: 20054: lui $25, 2
# ORPH1-NEXT: 20058: j 131200 <foo1a>
# ORPH1-NEXT: 2005c: addiu $25, $25, 128
# ORPH1-NEXT: 20060: nop
-# ORPH1: __LA25Thunk_foo1b:
+# ORPH1: <__LA25Thunk_foo1b>:
# ORPH1-NEXT: 20064: lui $25, 2
# ORPH1-NEXT: 20068: j 131204 <foo1b>
# ORPH1-NEXT: 2006c: addiu $25, $25, 132
# ORPH1-NEXT: 20070: nop
-# ORPH1: foo1a:
+# ORPH1: <foo1a>:
# ORPH1-NEXT: 20080: nop
-# ORPH1: foo1b:
+# ORPH1: <foo1b>:
# ORPH1-NEXT: 20084: nop
-# ORPH1: __LA25Thunk_foo2:
+# ORPH1: <__LA25Thunk_foo2>:
# ORPH1-NEXT: 20088: lui $25, 2
# ORPH1-NEXT: 2008c: j 131232 <foo2>
# ORPH1-NEXT: 20090: addiu $25, $25, 160
# ORPH1-NEXT: 20094: nop
-# ORPH1: foo2:
+# ORPH1: <foo2>:
# ORPH1-NEXT: 200a0: nop
# Test script with orphans added to new OutputSection, the .text.1 and
@@ -147,7 +147,7 @@ __start:
# ORPH2: Disassembly of section .out:
# ORPH2-EMPTY:
-# ORPH2-NEXT: __start:
+# ORPH2-NEXT: <__start>:
# ORPH2-NEXT: 20000: jal 131168 <__LA25Thunk_foo1a>
# ORPH2-NEXT: 20004: nop
# ORPH2-NEXT: 20008: jal 131208 <__LA25Thunk_foo2>
@@ -161,44 +161,44 @@ __start:
# ORPH2-NEXT: 20028: jal 131152 <fnpic>
# ORPH2-NEXT: 2002c: nop
-# ORPH2: __LA25Thunk_fpic:
+# ORPH2: <__LA25Thunk_fpic>:
# ORPH2-NEXT: 20030: lui $25, 2
# ORPH2-NEXT: 20034: j 131136 <fpic>
# ORPH2-NEXT: 20038: addiu $25, $25, 64
# ORPH2-NEXT: 2003c: nop
-# ORPH2: fpic:
+# ORPH2: <fpic>:
# ORPH2-NEXT: 20040: nop
-# ORPH2: fnpic:
+# ORPH2: <fnpic>:
# ORPH2-NEXT: 20050: nop
# ORPH2-EMPTY:
# ORPH2-NEXT: Disassembly of section .text:
# ORPH2-EMPTY:
-# ORPH2-NEXT: __LA25Thunk_foo1a:
+# ORPH2-NEXT: <__LA25Thunk_foo1a>:
# ORPH2-NEXT: 20060: lui $25, 2
# ORPH2-NEXT: 20064: j 131200 <foo1a>
# ORPH2-NEXT: 20068: addiu $25, $25, 128
# ORPH2-NEXT: 2006c: nop
-# ORPH2: __LA25Thunk_foo1b:
+# ORPH2: <__LA25Thunk_foo1b>:
# ORPH2-NEXT: 20070: lui $25, 2
# ORPH2-NEXT: 20074: j 131204 <foo1b>
# ORPH2-NEXT: 20078: addiu $25, $25, 132
# ORPH2-NEXT: 2007c: nop
-# ORPH2: foo1a:
+# ORPH2: <foo1a>:
# ORPH2-NEXT: 20080: nop
-# ORPH2: foo1b:
+# ORPH2: <foo1b>:
# ORPH2-NEXT: 20084: nop
-# ORPH2: __LA25Thunk_foo2:
+# ORPH2: <__LA25Thunk_foo2>:
# ORPH2-NEXT: 20088: lui $25, 2
# ORPH2-NEXT: 2008c: j 131232 <foo2>
# ORPH2-NEXT: 20090: addiu $25, $25, 160
# ORPH2-NEXT: 20094: nop
-# ORPH2: foo2:
+# ORPH2: <foo2>:
# ORPH2-NEXT: 200a0: nop
diff --git a/lld/test/ELF/mips-npic-call-pic.s b/lld/test/ELF/mips-npic-call-pic.s
index 5959fedd5f14..364476e7fabc 100644
--- a/lld/test/ELF/mips-npic-call-pic.s
+++ b/lld/test/ELF/mips-npic-call-pic.s
@@ -36,7 +36,7 @@
# CHECK: Disassembly of section .text:
# CHECK-EMPTY:
-# CHECK-NEXT: __start:
+# CHECK-NEXT: <__start>:
# CHECK-NEXT: 20100: jal 131412 <__LA25Thunk_foo1a>
# CHECK-NEXT: nop
# CHECK-NEXT: jal 131464 <__LA25Thunk_foo2>
@@ -50,47 +50,47 @@
# CHECK-NEXT: jal 131408 <fnpic>
# CHECK-NEXT: nop
-# CHECK: __LA25Thunk_fpic:
+# CHECK: <__LA25Thunk_fpic>:
# R2: 20130: lui $25, 2
# R6: 20130: aui $25, $zero, 2
# CHECK-NEXT: j 131392 <fpic>
# CHECK-NEXT: addiu $25, $25, 320
# CHECK-NEXT: nop
-# CHECK: fpic:
+# CHECK: <fpic>:
# CHECK-NEXT: 20140: nop
-# CHECK: fnpic:
+# CHECK: <fnpic>:
# CHECK-NEXT: 20150: nop
-# CHECK: __LA25Thunk_foo1a:
+# CHECK: <__LA25Thunk_foo1a>:
# R2: 20154: lui $25, 2
# R6: 20154: aui $25, $zero, 2
# CHECK: j 131456 <foo1a>
# CHECK-NEXT: addiu $25, $25, 384
# CHECK-NEXT: nop
-# CHECK: __LA25Thunk_foo1b:
+# CHECK: <__LA25Thunk_foo1b>:
# R2: 20164: lui $25, 2
# R6: aui $25, $zero, 2
# CHECK-NEXT: j 131460 <foo1b>
# CHECK-NEXT: addiu $25, $25, 388
# CHECK-NEXT: nop
-# CHECK: foo1a:
+# CHECK: <foo1a>:
# CHECK-NEXT: 20180: nop
-# CHECK: foo1b:
+# CHECK: <foo1b>:
# CHECK-NEXT: 20184: nop
-# CHECK: __LA25Thunk_foo2:
+# CHECK: <__LA25Thunk_foo2>:
# R2: 20188: lui $25, 2
# R6: aui $25, $zero, 2
# CHECK-NEXT: j 131488 <foo2>
# CHECK-NEXT: addiu $25, $25, 416
# CHECK-NEXT: nop
-# CHECK: foo2:
+# CHECK: <foo2>:
# CHECK-NEXT: 201a0: nop
.text
diff --git a/lld/test/ELF/mips-pc-relocs.s b/lld/test/ELF/mips-pc-relocs.s
index 1feb9b885e5a..15d729133802 100644
--- a/lld/test/ELF/mips-pc-relocs.s
+++ b/lld/test/ELF/mips-pc-relocs.s
@@ -35,7 +35,7 @@ __start:
# CHECK: Disassembly of section .text:
# CHECK-EMPTY:
-# CHECK-NEXT: __start:
+# CHECK-NEXT: <__start>:
# CHECK-NEXT: 20000: lwpc $6, 32
# ^-- (0x20020-0x20000)>>2
# CHECK-NEXT: 20004: beqc $5, $6, 28
diff --git a/lld/test/ELF/mips-plt-n32.s b/lld/test/ELF/mips-plt-n32.s
index 3d509f8904f9..42ff8fd930d9 100644
--- a/lld/test/ELF/mips-plt-n32.s
+++ b/lld/test/ELF/mips-plt-n32.s
@@ -22,7 +22,7 @@
# CHECK: Disassembly of section .text:
# CHECK-EMPTY:
-# CHECK-NEXT: __start:
+# CHECK-NEXT: <__start>:
# CHECK-NEXT: 20000: jal 131120
# ^-- 0x20030 gotplt[foo0]
# CHECK-NEXT: 20004: nop
@@ -30,7 +30,7 @@
# CHECK-EMPTY:
# CHECK-NEXT: Disassembly of section .plt:
# CHECK-EMPTY:
-# CHECK-NEXT: .plt:
+# CHECK-NEXT: <.plt>:
# CHECK-NEXT: 20010: lui $14, 3
# CHECK-NEXT: 20014: lw $25, 4($14)
# CHECK-NEXT: 20018: addiu $14, $14, 4
diff --git a/lld/test/ELF/mips-plt-n64.s b/lld/test/ELF/mips-plt-n64.s
index dd98513da288..4b49799c54c2 100644
--- a/lld/test/ELF/mips-plt-n64.s
+++ b/lld/test/ELF/mips-plt-n64.s
@@ -20,13 +20,13 @@
# CHECK: Disassembly of section .text:
# CHECK-EMPTY:
-# CHECK-NEXT: __start:
+# CHECK-NEXT: <__start>:
# CHECK-NEXT: 20000: jal 131120
# CHECK-NEXT: 20004: nop
# CHECK-EMPTY:
# CHECK-NEXT: Disassembly of section .plt:
# CHECK-EMPTY:
-# CHECK-NEXT: .plt:
+# CHECK-NEXT: <.plt>:
# CHECK-NEXT: 20010: lui $14, 3
# CHECK-NEXT: 20014: ld $25, 8($14)
# CHECK-NEXT: 20018: addiu $14, $14, 8
diff --git a/lld/test/ELF/mips-plt-r6.s b/lld/test/ELF/mips-plt-r6.s
index 206cdf13f59d..8da41b2279f6 100644
--- a/lld/test/ELF/mips-plt-r6.s
+++ b/lld/test/ELF/mips-plt-r6.s
@@ -19,7 +19,7 @@
# CHECK: Disassembly of section .text:
# CHECK-EMPTY:
-# CHECK-NEXT: __start:
+# CHECK-NEXT: <__start>:
# CHECK-NEXT: 20000: jal 131120
# ^-- 0x20030 gotplt[foo0]
# CHECK-NEXT: 20004: nop
@@ -27,7 +27,7 @@
# CHECK-EMPTY:
# CHECK-NEXT: Disassembly of section .plt:
# CHECK-EMPTY:
-# CHECK-NEXT: .plt:
+# CHECK-NEXT: <.plt>:
# CHECK-NEXT: 20010: aui $gp, $zero, 3
# CHECK-NEXT: 20014: lw $25, 4($gp)
# CHECK-NEXT: 20018: addiu $gp, $gp, 4
diff --git a/lld/test/ELF/mips-tls-64.s b/lld/test/ELF/mips-tls-64.s
index 58cbd56f2492..02722bda49f7 100644
--- a/lld/test/ELF/mips-tls-64.s
+++ b/lld/test/ELF/mips-tls-64.s
@@ -32,7 +32,7 @@
# DIS-NEXT: 30030 00000000 00000001 00000000 00000000
# DIS-NEXT: 30040 00000000 00000001 ffffffff ffff8004
-# DIS: __start:
+# DIS: <__start>:
# DIS-NEXT: addiu $2, $3, -32720
# DIS-NEXT: addiu $2, $3, -32736
# DIS-NEXT: addiu $2, $3, -32704
diff --git a/lld/test/ELF/mips-tls-hilo.s b/lld/test/ELF/mips-tls-hilo.s
index d6756465757d..f37a3118d0ab 100644
--- a/lld/test/ELF/mips-tls-hilo.s
+++ b/lld/test/ELF/mips-tls-hilo.s
@@ -12,7 +12,7 @@
# DIS: 00000000 l O .tdata 00000000 loc0
-# DIS: __start:
+# DIS: <__start>:
# DIS-NEXT: addiu $2, $3, 0
# ^-- %hi(loc0 - .tdata - 0x8000)
# DIS-NEXT: addiu $2, $3, -32768
diff --git a/lld/test/ELF/mips-tls.s b/lld/test/ELF/mips-tls.s
index cf6a6eaba4e2..fd89230c768d 100644
--- a/lld/test/ELF/mips-tls.s
+++ b/lld/test/ELF/mips-tls.s
@@ -30,7 +30,7 @@
# DIS-NEXT: 30010 00000000 00000000 00000001 00000000
# DIS-NEXT: 30020 00000001 ffff8004
-# DIS: __start:
+# DIS: <__start>:
# DIS-NEXT: addiu $2, $3, -32736
# DIS-NEXT: addiu $2, $3, -32744
# DIS-NEXT: addiu $2, $3, -32728
diff --git a/lld/test/ELF/mips-xgot-order.s b/lld/test/ELF/mips-xgot-order.s
index 87e57030fcd1..b3fd9b2085ec 100644
--- a/lld/test/ELF/mips-xgot-order.s
+++ b/lld/test/ELF/mips-xgot-order.s
@@ -9,13 +9,13 @@
# CHECK: Disassembly of section .text:
# CHECK-EMPTY:
-# CHECK-NEXT: __start:
+# CHECK-NEXT: <__start>:
# CHECK-NEXT: lui $2, 0
# CHECK-NEXT: lw $2, -32732($2)
# CHECK-NEXT: lui $2, 0
# CHECK-NEXT: lw $2, -32728($2)
#
-# CHECK: bar:
+# CHECK: <bar>:
# CHECK-NEXT: lw $2, -32736($2)
# CHECK-NEXT: lw $2, -32744($2)
# CHECK-NEXT: addi $2, $2, {{.*}}
diff --git a/lld/test/ELF/msp430.s b/lld/test/ELF/msp430.s
index 58120f6fb8c3..72bc9d28edc9 100644
--- a/lld/test/ELF/msp430.s
+++ b/lld/test/ELF/msp430.s
@@ -25,9 +25,9 @@ foo:
; CHECK: Disassembly of section .text:
; CHECK-EMPTY:
-; CHECK-NEXT: _start:
+; CHECK-NEXT: <_start>:
; CHECK-NEXT: 8000: {{.*}} nop
-; CHECK: foo:
+; CHECK: <foo>:
; CHECK-NEXT: 8004: {{.*}} jmp $-4
;; R_MSP430_16_BYTE
diff --git a/lld/test/ELF/non-abs-reloc.s b/lld/test/ELF/non-abs-reloc.s
index a47dfe8ab4cc..5b4ed27dd287 100644
--- a/lld/test/ELF/non-abs-reloc.s
+++ b/lld/test/ELF/non-abs-reloc.s
@@ -7,7 +7,7 @@
// RUN: llvm-objdump -D %t | FileCheck --check-prefix=DISASM %s
// DISASM: Disassembly of section .nonalloc:
// DISASM-EMPTY:
-// DISASM-NEXT: .nonalloc:
+// DISASM-NEXT: <.nonalloc>:
// DISASM-NEXT: 0: {{.*}} callq {{.*}} <_start>
// DISASM-NEXT: 5: {{.*}} callq {{.*}} <_start>
diff --git a/lld/test/ELF/non-alloc-link-order-gc.s b/lld/test/ELF/non-alloc-link-order-gc.s
index d58c75a9e060..6012a6064263 100644
--- a/lld/test/ELF/non-alloc-link-order-gc.s
+++ b/lld/test/ELF/non-alloc-link-order-gc.s
@@ -10,7 +10,7 @@
# CHECK: Disassembly of section .stack_sizes:
# CHECK-EMPTY:
-# CHECK-NEXT: .stack_sizes:
+# CHECK-NEXT: <.stack_sizes>:
# CHECK-NEXT: 01
.section .text.live,"ax", at progbits
diff --git a/lld/test/ELF/ppc32-call-stub-nopic.s b/lld/test/ELF/ppc32-call-stub-nopic.s
index 2c49a1f32468..03ffa5a1e37c 100644
--- a/lld/test/ELF/ppc32-call-stub-nopic.s
+++ b/lld/test/ELF/ppc32-call-stub-nopic.s
@@ -19,7 +19,7 @@
# RELOC-NEXT: }
## .got2+0x8000-0x10004 = 0x30000+0x8000-0x10004 = 65536*2+32764
-# CHECK-LABEL: _start:
+# CHECK-LABEL: <_start>:
# CHECK-NEXT: bl .+16
# CHECK-NEXT: bl .+12
# CHECK-NEXT: bl .+24
@@ -29,13 +29,13 @@
## -fno-PIC call stubs of f and g.
## .plt[0] = 0x100302c4 = 65536*4099+708
## .plt[1] = 0x100302c8 = 65536*4099+712
-# CHECK-NEXT: 00000000.plt_call32.f:
+# CHECK-NEXT: <00000000.plt_call32.f>:
# CHECK-NEXT: lis 11, 4099
# CHECK-NEXT: lwz 11, 708(11)
# CHECK-NEXT: mtctr 11
# CHECK-NEXT: bctr
# CHECK-EMPTY:
-# CHECK-NEXT: 00000000.plt_call32.g:
+# CHECK-NEXT: <00000000.plt_call32.g>:
# CHECK-NEXT: lis 11, 4099
# CHECK-NEXT: lwz 11, 712(11)
# CHECK-NEXT: mtctr 11
@@ -46,7 +46,7 @@
# HEX: 0x100302c4 10010200 10010204
## These instructions are referenced by .plt entries.
-# CHECK: 10010200 .glink:
+# CHECK: 10010200 <.glink>:
# CHECK-NEXT: b .+8
# CHECK-NEXT: b .+4
diff --git a/lld/test/ELF/ppc32-call-stub-pic.s b/lld/test/ELF/ppc32-call-stub-pic.s
index 26a4aff47a16..e35367d33686 100644
--- a/lld/test/ELF/ppc32-call-stub-pic.s
+++ b/lld/test/ELF/ppc32-call-stub-pic.s
@@ -32,7 +32,7 @@
# DYN: PPC_GOT 0x20368
## .got2+0x8000-0x10004 = 0x30000+0x8000-0x10004 = 65536*2+32764
-# CHECK-LABEL: _start:
+# CHECK-LABEL: <_start>:
# CHECK-NEXT: bcl 20, 31, .+4
# PIE-NEXT: 10210: mflr 30
# PIE-NEXT: addis 30, 30, 3
@@ -59,13 +59,13 @@
# CHECK-EMPTY:
## -fPIC call stubs of f and g.
-# CHECK-NEXT: 00008000.got2.plt_pic32.f:
+# CHECK-NEXT: <00008000.got2.plt_pic32.f>:
# CHECK-NEXT: lwz 11, 32760(30)
# CHECK-NEXT: mtctr 11
# CHECK-NEXT: bctr
# CHECK-NEXT: nop
# CHECK-EMPTY:
-# CHECK-NEXT: 00008000.got2.plt_pic32.g:
+# CHECK-NEXT: <00008000.got2.plt_pic32.g>:
# CHECK-NEXT: lwz 11, 32764(30)
# CHECK-NEXT: mtctr 11
# CHECK-NEXT: bctr
@@ -73,7 +73,7 @@
# CHECK-EMPTY:
## The -fPIC call stub of h needs two instructions addis+lwz to represent the offset 65536*1-32768.
-# CHECK-NEXT: 00008000.got2.plt_pic32.h:
+# CHECK-NEXT: <00008000.got2.plt_pic32.h>:
# CHECK-NEXT: addis 11, 30, 1
# CHECK-NEXT: lwz 11, -32768(11)
# CHECK-NEXT: mtctr 11
@@ -81,7 +81,7 @@
# CHECK-EMPTY:
## -fpic call stub of f.
-# CHECK-NEXT: 00000000.plt_pic32.f:
+# CHECK-NEXT: <00000000.plt_pic32.f>:
# CHECK-NEXT: addis 11, 30, 2
# CHECK-NEXT: lwz 11, 4(11)
# CHECK-NEXT: mtctr 11
@@ -91,14 +91,14 @@
## Another -fPIC call stub of f from another object file %t2.o
## .got2 may have
diff erent addresses in
diff erent object files,
## so the call stub cannot be shared.
-# CHECK-NEXT: 00008000.got2.plt_pic32.f:
+# CHECK-NEXT: <00008000.got2.plt_pic32.f>:
## In Secure PLT ABI, .plt stores function pointers to first instructions of .glink
# HEX: 0x0004036c 00010294 00010298 0001029c
## These instructions are referenced by .plt entries.
-# PIE: 00010294 .glink:
-# SHARED: 000102b4 .glink:
+# PIE: 00010294 <.glink>:
+# SHARED: 000102b4 <.glink>:
# CHECK-NEXT: b .+12
# CHECK-NEXT: b .+8
# CHECK-NEXT: b .+4
diff --git a/lld/test/ELF/ppc32-canonical-plt.s b/lld/test/ELF/ppc32-canonical-plt.s
index 148e65283a94..027f2aa7e222 100644
--- a/lld/test/ELF/ppc32-canonical-plt.s
+++ b/lld/test/ELF/ppc32-canonical-plt.s
@@ -36,7 +36,7 @@
## Canonical PLT entry of func2.
## 0x1003031C = 65536*4099+796
-# CHECK: 1001022c .glink:
+# CHECK: 1001022c <.glink>:
# CHECK-NEXT: lis 11, 4099
# CHECK-NEXT: lwz 11, 796(11)
# CHECK-NEXT: mtctr 11
diff --git a/lld/test/ELF/ppc32-ifunc-nonpreemptible-nopic.s b/lld/test/ELF/ppc32-ifunc-nonpreemptible-nopic.s
index 097417d225f9..9c2b44558483 100644
--- a/lld/test/ELF/ppc32-ifunc-nonpreemptible-nopic.s
+++ b/lld/test/ELF/ppc32-ifunc-nonpreemptible-nopic.s
@@ -13,14 +13,14 @@
# HEX: 0x10020110 10010100
# CHECK: Disassembly of section .text:
-# CHECK: .text:
+# CHECK: <.text>:
# CHECK-NEXT: 100100e0: blr
-# CHECK: _start:
+# CHECK: <_start>:
# CHECK-NEXT: bl .+12
# CHECK-NEXT: lis 9, 4097
# CHECK-NEXT: addi 9, 9, 256
# CHECK-EMPTY:
-# CHECK-NEXT: 00000000.plt_call32.func:
+# CHECK-NEXT: <00000000.plt_call32.func>:
## 0x10020110 = 65536*4098+272
# CHECK-NEXT: lis 11, 4098
# CHECK-NEXT: lwz 11, 272(11)
diff --git a/lld/test/ELF/ppc32-ifunc-nonpreemptible-pic.s b/lld/test/ELF/ppc32-ifunc-nonpreemptible-pic.s
index 16edee08c01d..2e52939642ca 100644
--- a/lld/test/ELF/ppc32-ifunc-nonpreemptible-pic.s
+++ b/lld/test/ELF/ppc32-ifunc-nonpreemptible-pic.s
@@ -18,14 +18,14 @@
.long func
# CHECK: Disassembly of section .text:
-# CHECK: .text:
+# CHECK: <.text>:
# CHECK-NEXT: 10188: blr
-# CHECK: _start:
+# CHECK: <_start>:
# CHECK-NEXT: bl .+12
# CHECK-NEXT: lis 9, 1
# CHECK-NEXT: addi 9, 9, 424
# CHECK-EMPTY:
-# CHECK-NEXT: 00008000.got2.plt_pic32.func:
+# CHECK-NEXT: <00008000.got2.plt_pic32.func>:
## 0x10020114 = 65536*4098+276
# CHECK-NEXT: lwz 11, -32764(30)
# CHECK-NEXT: mtctr 11
diff --git a/lld/test/ELF/ppc32-local-branch.s b/lld/test/ELF/ppc32-local-branch.s
index 2abf92638686..526bea609122 100644
--- a/lld/test/ELF/ppc32-local-branch.s
+++ b/lld/test/ELF/ppc32-local-branch.s
@@ -7,12 +7,12 @@
## R_PPC_REL24 and R_PPC_PLTREL24 are converted to PC relative relocations if the
## symbol is non-preemptable. The addend of R_PPC_PLTREL24 should be ignored.
-# CHECK: _start:
+# CHECK: <_start>:
# CHECK-NEXT: b .+12
# CHECK-NEXT: b .+8
# CHECK-NEXT: b .+4
# CHECK-EMPTY:
-# CHECK-NEXT: foo:
+# CHECK-NEXT: <foo>:
.globl _start
_start:
diff --git a/lld/test/ELF/ppc32-long-thunk.s b/lld/test/ELF/ppc32-long-thunk.s
index 2a3a6f096a6f..21b1eaeff285 100644
--- a/lld/test/ELF/ppc32-long-thunk.s
+++ b/lld/test/ELF/ppc32-long-thunk.s
@@ -15,7 +15,7 @@
# SEC: There are no relocations in this file.
-# CHECK: _start:
+# CHECK: <_start>:
# CHECK-NEXT: 2000: bl .+24
# CHECK-NEXT: bl .+20
# CHECK-NEXT: bl .+16
@@ -24,21 +24,21 @@
# PI-NEXT: bl .+40
## high = 0x02002008 = 65536*512+8200
-# PD: __LongThunk_high:
+# PD: <__LongThunk_high>:
# PD-NEXT: 2018: lis 12, 512
# PD-NEXT: addi 12, 12, 8200
# PD-NEXT: mtctr 12
# PD-NEXT: bctr
## .text_high+16 = 0x02002010 = 65536*512+8208
-# PD: __LongThunk_:
+# PD: <__LongThunk_>:
# PD-NEXT: 2028: lis 12, 512
# PD-NEXT: addi 12, 12, 8208
# PD-NEXT: mtctr 12
# PD-NEXT: bctr
## high-0x2028 = 0x02002008-0x2020 = 65536*512-24
-# PI: __LongThunk_high:
+# PI: <__LongThunk_high>:
# PI-NEXT: 2018: mflr 0
# PI-NEXT: bcl 20, 31, .+4
# PI-NEXT: 2020: mflr 12
@@ -49,7 +49,7 @@
# PI-NEXT: bctr
## .text_high+16-0x2048 = 0x02002010-0x2048 = 65536*512-48
-# PI: __LongThunk_:
+# PI: <__LongThunk_>:
# PI-NEXT: 2038: mflr 0
# PI-NEXT: bcl 20, 31, .+4
# PI-NEXT: 2040: mflr 12
@@ -69,10 +69,10 @@ bl high
bl .text_high+16 # Need a thunk
blr
-# PD: 02002008 high:
+# PD: 02002008 <high>:
# PD-NEXT: bl .-33554432
# PD-NEXT: bl .+4
-# PD: __LongThunk_:
+# PD: <__LongThunk_>:
# PD-NEXT: 2002010: lis 12, 0
# PD-NEXT: addi 12, 12, 8200
# PD-NEXT: mtctr 12
diff --git a/lld/test/ELF/ppc32-weak-undef-call.s b/lld/test/ELF/ppc32-weak-undef-call.s
index 95c36b7eed53..3371e429a0c4 100644
--- a/lld/test/ELF/ppc32-weak-undef-call.s
+++ b/lld/test/ELF/ppc32-weak-undef-call.s
@@ -13,7 +13,7 @@
## With -pie or -shared, create a call stub. ld.bfd produces bl .+0
# PIC: bl .+4
-# PIC: 00000000.plt_pic32.foo:
+# PIC: <00000000.plt_pic32.foo>:
.weak foo
bl foo
diff --git a/lld/test/ELF/ppc64-bsymbolic-toc-restore.s b/lld/test/ELF/ppc64-bsymbolic-toc-restore.s
index 45110cef8030..1e3148e24392 100644
--- a/lld/test/ELF/ppc64-bsymbolic-toc-restore.s
+++ b/lld/test/ELF/ppc64-bsymbolic-toc-restore.s
@@ -61,7 +61,7 @@ caller:
# CHECK-NEXT: mtlr 0
# CHECK-NEXT: blr
# CHECK-EMPTY:
-# CHECK-NEXT: def:
+# CHECK-NEXT: <def>:
# CHECK-NEXT: addis 2, 12, 2
# CHECK-NEXT: addi 2, 2, -32456
# CHECK-NEXT: li 3, 55
diff --git a/lld/test/ELF/ppc64-call-reach.s b/lld/test/ELF/ppc64-call-reach.s
index 4b5615b69f12..c54bb051ff3c 100644
--- a/lld/test/ELF/ppc64-call-reach.s
+++ b/lld/test/ELF/ppc64-call-reach.s
@@ -65,19 +65,19 @@ test:
# NEGOFFSET: 10010014: bl .-33554432
# NEGOFFSET: 10010024: b .+33554432
-# THUNK-LABEL: test:
+# THUNK-LABEL: <test>:
# THUNK: 10010014: bl .+20
# THUNK: 10010024: b .+20
# .branch_lt[0]
-# THUNK-LABEL: __long_branch_callee:
+# THUNK-LABEL: <__long_branch_callee>:
# THUNK-NEXT: 10010028: addis 12, 2, 1
# THUNK-NEXT: ld 12, -32760(12)
# THUNK-NEXT: mtctr 12
# THUNK-NEXT: bctr
# .branch_lt[1]
-# THUNK-LABEL: __long_branch_tail_callee:
+# THUNK-LABEL: <__long_branch_tail_callee>:
# THUNK-NEXT: 10010038: addis 12, 2, 1
# THUNK-NEXT: ld 12, -32752(12)
# THUNK-NEXT: mtctr 12
diff --git a/lld/test/ELF/ppc64-dtprel.s b/lld/test/ELF/ppc64-dtprel.s
index f9c5bb09d435..97076117b88f 100644
--- a/lld/test/ELF/ppc64-dtprel.s
+++ b/lld/test/ELF/ppc64-dtprel.s
@@ -147,7 +147,7 @@ k:
// HEX-BE-NEXT: 4209c8 00000000 004289c8 00000000 00000000
// HEX-BE-NEXT: 4209d8 00000000 00000000
-// Dis: test:
+// Dis: <test>:
// Dis: addi 4, 3, -31744
// Dis-NEXT: lwa 4, -31744(3)
@@ -157,7 +157,7 @@ k:
// #highera(k at dtprel) --> ((0x400404 - 0x8000 + 0x8000) >> 32) & 0xffff = 0
// #ha(k at dtprel) --> ((0x400404 - 0x8000 + 0x8000) >> 16) & 0xffff = 64
// #lo(k at dtprel) --> ((0x400404 - 0x8000) & 0xffff = -31740
-// Dis: test_adjusted:
+// Dis: <test_adjusted>:
// Dis: lis 4, 0
// Dis: ori 4, 4, 0
// Dis: lis 5, 64
@@ -167,7 +167,7 @@ k:
// #higher(k at dtprel) --> ((0x400404 - 0x8000) >> 32) & 0xffff = 0
// #hi(k at dtprel) --> ((0x400404 - 0x8000) >> 16) & 0xffff = 63
// #lo(k at dtprel) --> ((0x400404 - 0x8000) & 0xffff = 33796
-// Dis: test_not_adjusted:
+// Dis: <test_not_adjusted>:
// Dis: lis 4, 0
// Dis: ori 4, 4, 0
// Dis: oris 4, 4, 63
diff --git a/lld/test/ELF/ppc64-func-entry-points.s b/lld/test/ELF/ppc64-func-entry-points.s
index c322f6563426..30336afa6c8f 100644
--- a/lld/test/ELF/ppc64-func-entry-points.s
+++ b/lld/test/ELF/ppc64-func-entry-points.s
@@ -69,12 +69,12 @@ glob:
# foo_external_
diff +8. Also check that foo_external_same has no global entry
# point and we branch to start of foo_external_same.
-// CHECK-LABEL: _start:
+// CHECK-LABEL: <_start>:
// CHECK: 100101f0: bl .+144
// CHECK: 10010204: bl .+84
-// CHECK-LABEL: foo_external_
diff :
+// CHECK-LABEL: <foo_external_
diff >:
// CHECK-NEXT: 10010250: addis 2, 12, 2
// CHECK-NEXT: 10010254: addi 2, 2, -32696
// CHECK-NEXT: 10010258: addis 5, 2, 1
-// CHECK-LABEL: foo_external_same:
+// CHECK-LABEL: <foo_external_same>:
// CHECK-NEXT: 10010280: add 3, 4, 3
diff --git a/lld/test/ELF/ppc64-ifunc.s b/lld/test/ELF/ppc64-ifunc.s
index 590f95ff74f8..804b991990dd 100644
--- a/lld/test/ELF/ppc64-ifunc.s
+++ b/lld/test/ELF/ppc64-ifunc.s
@@ -24,7 +24,7 @@
# __plt_ifunc - . = 0x10010218 - 0x10010208 = 16
# __plt_ifunc2 - . = 0x1001022c - 0x10010210 = 28
-# CHECK: _start:
+# CHECK: <_start>:
# CHECK-NEXT: addis 2, 12, 2
# CHECK-NEXT: addi 2, 2, -32636
# CHECK-NEXT: 1001021c: bl .+32
@@ -37,7 +37,7 @@
# CHECK-NEXT: addi 3, 3, 32732
# .plt[0] - .TOC. = 0x100302a0 - 0x10028298 = (1<<16) - 32760
-# CHECK: __plt_ifunc2:
+# CHECK: <__plt_ifunc2>:
# CHECK-NEXT: std 2, 24(1)
# CHECK-NEXT: addis 12, 2, 1
# CHECK-NEXT: ld 12, -32760(12)
@@ -45,7 +45,7 @@
# CHECK-NEXT: bctr
# .plt[1] - .TOC. = 0x100302a0+8 - 0x10028298 = (1<<16) - 32752
-# CHECK: __plt_ifunc3:
+# CHECK: <__plt_ifunc3>:
# CHECK-NEXT: std 2, 24(1)
# CHECK-NEXT: addis 12, 2, 1
# CHECK-NEXT: ld 12, -32752(12)
@@ -57,19 +57,19 @@
## ifunc2 and ifunc3 have the same code sequence as their PLT call stubs.
# CHECK: Disassembly of section .glink:
# CHECK-EMPTY:
-# CHECK-NEXT: 0000000010010264 .glink:
+# CHECK-NEXT: 0000000010010264 <.glink>:
# CHECK-NEXT: addis 12, 2, 1
# CHECK-NEXT: ld 12, -32760(12)
# CHECK-NEXT: mtctr 12
# CHECK-NEXT: bctr
# CHECK-EMPTY:
-# CHECK-NEXT: 0000000010010274 ifunc3:
+# CHECK-NEXT: 0000000010010274 <ifunc3>:
# CHECK-NEXT: addis 12, 2, 1
# CHECK-NEXT: ld 12, -32752(12)
# CHECK-NEXT: mtctr 12
# CHECK-NEXT: bctr
# CHECK-EMPTY:
-# CHECK-NEXT: 0000000010010284 ifunc1:
+# CHECK-NEXT: 0000000010010284 <ifunc1>:
# CHECK-NEXT: addis 12, 2, 1
# CHECK-NEXT: ld 12, -32744(12)
# CHECK-NEXT: mtctr 12
diff --git a/lld/test/ELF/ppc64-local-dynamic.s b/lld/test/ELF/ppc64-local-dynamic.s
index 371b56614a98..884e9c158393 100644
--- a/lld/test/ELF/ppc64-local-dynamic.s
+++ b/lld/test/ELF/ppc64-local-dynamic.s
@@ -110,7 +110,7 @@ k:
// its TLS block.
// #ha(i at dtprel) --> (0x0 -0x8000 + 0x8000) >> 16 = 0
// #lo(i at dtprel) --> (0x0 -0x8000) = -0x8000 = -32768
-// Dis: test:
+// Dis: <test>:
// Dis: addis 3, 2, 0
// Dis-NEXT: addi 3, 3, -32760
// Dis-NEXT: bl .+60
@@ -120,9 +120,9 @@ k:
// #hi(j at got@tlsld) --> (0x20108 - 0x28100 ) > 16 = -1
-// Dis: test_hi:
+// Dis: <test_hi>:
// Dis: lis 3, -1
// k at got@tlsld --> (0x20108 - 0x28100) = -7ff8 = -32760
-// Dis: test_16:
+// Dis: <test_16>:
// Dis: li 3, -32760
diff --git a/lld/test/ELF/ppc64-local-exec-tls.s b/lld/test/ELF/ppc64-local-exec-tls.s
index 27e973dc4eb1..f657d96ad1f1 100644
--- a/lld/test/ELF/ppc64-local-exec-tls.s
+++ b/lld/test/ELF/ppc64-local-exec-tls.s
@@ -120,33 +120,33 @@ b:
// We are building the address of the first TLS variable, relative to the thread pointer.
// #ha(a at tprel) --> (0 - 0x7000 + 0x8000) >> 16 = 0
// #lo(a at tprel)) --> (0 - 0x7000) & 0xFFFF = -0x7000 = -28672
-// Dis: test_local_exec:
+// Dis: <test_local_exec>:
// Dis: addis 3, 13, 0
// Dis: addi 3, 3, -28672
// We are building the offset for the second TLS variable
// Offset within tls storage - 0x7000
// b at tprel = 8 - 0x7000 = 28664
-// Dis: test_tprel:
+// Dis: <test_tprel>:
// Dis: addi 3, 13, -28664
// #hi(b at tprel) --> (8 - 0x7000) >> 16 = -1
-// Dis: test_hi:
+// Dis: <test_hi>:
// Dis: addis 3, 13, -1
// b at tprel = 8 - 0x7000 = -28664
-// Dis: test_ds:
+// Dis: <test_ds>:
// Dis: ld 3, -28664(13)
// #lo(b at tprel) --> (8 - 0x7000) & 0xFFFF = -28664
-// Dis: test_lo_ds:
+// Dis: <test_lo_ds>:
// Dis: ld 3, -28664(13)
// #highesta(b at tprel) --> ((0x8 - 0x7000 + 0x8000) >> 48) & 0xFFFF = 0
// #highera(b at tprel) --> ((0x8 - 0x7000 + 0x8000) >> 32) & 0xFFFF = 0
// #ha(k at dtprel) --> ((0x8 - 0x7000 + 0x8000) >> 16) & 0xFFFF = 0
// #lo(k at dtprel) --> ((0x8 - 0x7000) & 0xFFFF = -28664
-// Dis: test_highest_a:
+// Dis: <test_highest_a>:
// Dis: lis 4, 0
// Dis: ori 4, 4, 0
// Dis: lis 5, 0
@@ -156,7 +156,7 @@ b:
// #higher(b at tprel) --> ((0x8 - 0x7000) >> 32) & 0xFFFF = 0xFFFF = 65535
// #hi(k at dtprel) --> ((0x8 - 0x7000) >> 16) & 0xFFFF = 0xFFFF = 65535
// #lo(k at dtprel) --> ((0x8 - 0x7000) & 0xFFFF = 33796
-// Dis: test_highest:
+// Dis: <test_highest>:
// Dis: lis 4, -1
// Dis: ori 4, 4, 65535
// Dis: oris 4, 4, 65535
diff --git a/lld/test/ELF/ppc64-long-branch-init.s b/lld/test/ELF/ppc64-long-branch-init.s
index cc2f73c6666f..a045407b52e2 100644
--- a/lld/test/ELF/ppc64-long-branch-init.s
+++ b/lld/test/ELF/ppc64-long-branch-init.s
@@ -12,10 +12,10 @@
# CHECK: Disassembly of section .init:
# CHECK-EMPTY:
-# CHECK-LABEL: _init:
+# CHECK-LABEL: <_init>:
# CHECK: blr
# CHECK-EMPTY:
-# CHECK-LABEL: __long_branch_foo:
+# CHECK-LABEL: <__long_branch_foo>:
.globl foo
foo:
diff --git a/lld/test/ELF/ppc64-long-branch-pi.s b/lld/test/ELF/ppc64-long-branch-pi.s
index 8fe05e7ba600..f49b09ef8f81 100644
--- a/lld/test/ELF/ppc64-long-branch-pi.s
+++ b/lld/test/ELF/ppc64-long-branch-pi.s
@@ -29,28 +29,28 @@
# RELOC-NEXT: 0x2002108 R_PPC64_RELATIVE - 0x2000
# RELOC-NEXT: }
-# CHECK: _start:
+# CHECK: <_start>:
# CHECK-NEXT: 2000: bl .+16
# CHECK-NEXT: bl .+33554428
# CHECK-NEXT: bl .+24
# CHECK-NEXT: bl .+36
## &.branch_lt[0] - .TOC. = .branch_lt - (.got+0x8000) = -32752
-# CHECK: __long_branch_:
+# CHECK: <__long_branch_>:
# CHECK-NEXT: 2010: addis 12, 2, 0
# CHECK-NEXT: ld 12, -32752(12)
# CHECK-NEXT: mtctr 12
# CHECK-NEXT: bctr
## &.branch_lt[1] - .TOC. = .branch_lt - (.got+0x8000) = -32744
-# CHECK: __long_branch_:
+# CHECK: <__long_branch_>:
# CHECK-NEXT: 2020: addis 12, 2, 0
# CHECK-NEXT: ld 12, -32744(12)
# CHECK-NEXT: mtctr 12
# CHECK-NEXT: bctr
## &.branch_lt[2] - .TOC. = .branch_lt - (.got+0x8000) = -32736
-# CHECK: __long_branch_:
+# CHECK: <__long_branch_>:
# CHECK-NEXT: 2030: addis 12, 2, 0
# CHECK-NEXT: ld 12, -32736(12)
# CHECK-NEXT: mtctr 12
@@ -64,13 +64,13 @@ bl .text_high
bl .text_high+8 # Need a thunk
bl .text_high+0xc # Need a thunk
-# CHECK: high_target:
+# CHECK: <high_target>:
# CHECK-NEXT: 2002000: bl .-33554428
# CHECK-NEXT: bl .-33554432
# CHECK-NEXT: bl .+8
## &.branch_lt[3] - .TOC. = .branch_lt - (.got+0x8000) = -32728
-# CHECK: __long_branch_:
+# CHECK: <__long_branch_>:
# CHECK-NEXT: 2002010: addis 12, 2, 0
# CHECK-NEXT: ld 12, -32728(12)
# CHECK-NEXT: mtctr 12
diff --git a/lld/test/ELF/ppc64-long-branch.s b/lld/test/ELF/ppc64-long-branch.s
index 5d3ee00d7984..c6979e70e1da 100644
--- a/lld/test/ELF/ppc64-long-branch.s
+++ b/lld/test/ELF/ppc64-long-branch.s
@@ -28,21 +28,21 @@
# BRANCH-BE: 0x02002030 00000000 02002008 00000000 02002010
# BRANCH-BE-NEXT: 0x02002040 00000000 00002008
-# CHECK: _start:
+# CHECK: <_start>:
# CHECK-NEXT: 2000: bl .+24
# CHECK-NEXT: bl .+20
# CHECK-NEXT: bl .+16
# CHECK-NEXT: bl .+33554428
## &.branch_lt[0] - .TOC. = .branch_lt - (.got+0x8000) = -32760
-# CHECK: __long_branch_high:
+# CHECK: <__long_branch_high>:
# CHECK-NEXT: 2018: addis 12, 2, 0
# CHECK-NEXT: ld 12, -32760(12)
# CHECK-NEXT: mtctr 12
# CHECK-NEXT: bctr
## &.branch_lt[1] - .TOC. = .branch_lt - (.got+0x8000) = -32752
-# CHECK: __long_branch_:
+# CHECK: <__long_branch_>:
# CHECK-NEXT: 2028: addis 12, 2, 0
# CHECK-NEXT: ld 12, -32752(12)
# CHECK-NEXT: mtctr 12
@@ -60,12 +60,12 @@ blr
# CHECK: Disassembly of section .text_high:
# CHECK-EMPTY:
-# CHECK-NEXT: high:
+# CHECK-NEXT: <high>:
# CHECK-NEXT: 2002000: addis 2, 12, 1
# CHECK-NEXT: addi 2, 2, -32728
# CHECK-NEXT: bl .-33554432
# CHECK-NEXT: bl .+8
-# CHECK: __long_branch_:
+# CHECK: <__long_branch_>:
# CHECK-NEXT: 2002014: addis 12, 2, 0
# CHECK-NEXT: ld 12, -32744(12)
# CHECK-NEXT: mtctr 12
diff --git a/lld/test/ELF/ppc64-plt-stub.s b/lld/test/ELF/ppc64-plt-stub.s
index 1420f43e263f..9f89d731f2fb 100644
--- a/lld/test/ELF/ppc64-plt-stub.s
+++ b/lld/test/ELF/ppc64-plt-stub.s
@@ -23,10 +23,10 @@
## The JMP_SLOT relocation is stored at .plt[2]
# RELOC: 0x10030010 R_PPC64_JMP_SLOT foo 0x0
-# CHECK: _start:
+# CHECK: <_start>:
# CHECK: 10010298: bl .+16
-# CHECK-LABEL: 00000000100102a8 __plt_foo:
+# CHECK-LABEL: 00000000100102a8 <__plt_foo>:
# CHECK-NEXT: std 2, 24(1)
# CHECK-NEXT: addis 12, 2, 1
# CHECK-NEXT: ld 12, -32744(12)
diff --git a/lld/test/ELF/ppc64-tls-ie.s b/lld/test/ELF/ppc64-tls-ie.s
index 3913f666ddf1..8430ab3a4fd0 100644
--- a/lld/test/ELF/ppc64-tls-ie.s
+++ b/lld/test/ELF/ppc64-tls-ie.s
@@ -33,11 +33,11 @@
# INPUT-REL: R_PPC64_GOT_TPREL16_LO_DS c 0x0
# INPUT-REL: R_PPC64_TLS c 0x0
## &.got[0] - .TOC. = -32768
-# IE-LABEL: test1:
+# IE-LABEL: <test1>:
# IE-NEXT: addis 3, 2, 0
# IE-NEXT: ld 3, -32768(3)
# IE-NEXT: lbzx 3, 3, 13
-# LE-LABEL: test1:
+# LE-LABEL: <test1>:
# LE-NEXT: nop
# LE-NEXT: addis 3, 13, 0
# LE-NEXT: lbz 3, -28672(3)
@@ -50,11 +50,11 @@ test1:
# INPUT-REL: R_PPC64_GOT_TPREL16_LO_DS s 0x0
# INPUT-REL: R_PPC64_TLS s 0x0
## &.got[1] - .TOC. = -32760
-# IE-LABEL: test2:
+# IE-LABEL: <test2>:
# IE-NEXT: addis 3, 2, 0
# IE-NEXT: ld 3, -32760(3)
# IE-NEXT: lhzx 3, 3, 13
-# LE-LABEL: test2:
+# LE-LABEL: <test2>:
# LE-NEXT: nop
# LE-NEXT: addis 3, 13, 0
# LE-NEXT: lhz 3, -28670(3)
@@ -67,11 +67,11 @@ test2:
# INPUT-REL: R_PPC64_GOT_TPREL16_LO_DS i 0x0
# INPUT-REL: R_PPC64_TLS i 0x0
## &.got[2] - .TOC. = -32752
-# IE-LABEL: test3:
+# IE-LABEL: <test3>:
# IE-NEXT: addis 3, 2, 0
# IE-NEXT: ld 3, -32752(3)
# IE-NEXT: lwzx 3, 3, 13
-# LE-LABEL: test3:
+# LE-LABEL: <test3>:
# LE-NEXT: nop
# LE-NEXT: addis 3, 13, 0
# LE-NEXT: lwz 3, -28668(3)
@@ -84,11 +84,11 @@ test3:
# INPUT-REL: R_PPC64_GOT_TPREL16_LO_DS l 0x0
# INPUT-REL: R_PPC64_TLS l 0x0
## &.got[3] - .TOC. = -32744
-# IE-LABEL: test4:
+# IE-LABEL: <test4>:
# IE-NEXT: addis 3, 2, 0
# IE-NEXT: ld 3, -32744(3)
# IE-NEXT: ldx 3, 3, 13
-# LE-LABEL: test4:
+# LE-LABEL: <test4>:
# LE-NEXT: nop
# LE-NEXT: addis 3, 13, 0
# LE-NEXT: ld 3, -28664(3)
@@ -97,7 +97,7 @@ test4:
ld 3, l at got@tprel at l(3)
ldx 3, 3, l at tls
-# LE-LABEL: test5:
+# LE-LABEL: <test5>:
# LE-NEXT: nop
# LE-NEXT: addis 4, 13, 0
# LE-NEXT: stb 3, -28672(4)
@@ -107,7 +107,7 @@ test5:
stbx 3, 4, c at tls
-# LE-LABEL: test6:
+# LE-LABEL: <test6>:
# LE-NEXT: nop
# LE-NEXT: addis 4, 13, 0
# LE-NEXT: sth 3, -28670(4)
@@ -117,7 +117,7 @@ test6:
sthx 3, 4, s at tls
-# LE-LABEL: test7:
+# LE-LABEL: <test7>:
# LE-NEXT: nop
# LE-NEXT: addis 4, 13, 0
# LE-NEXT: stw 3, -28668(4)
@@ -126,7 +126,7 @@ test7:
ld 4, i at got@tprel at l(4)
stwx 3, 4, i at tls
-# LE-LABEL: test8:
+# LE-LABEL: <test8>:
# LE-NEXT: nop
# LE-NEXT: addis 4, 13, 0
# LE-NEXT: std 3, -28664(4)
@@ -135,7 +135,7 @@ test8:
ld 4, l at got@tprel at l(4)
stdx 3, 4, l at tls
-# LE-LABEL: test9:
+# LE-LABEL: <test9>:
# LE-NEXT: nop
# LE-NEXT: addis 3, 13, 0
# LE-NEXT: addi 3, 3, -28668
@@ -144,7 +144,7 @@ test9:
ld 3, i at got@tprel at l(3)
add 3, 3, i at tls
-# LE-LABEL: test_ds:
+# LE-LABEL: <test_ds>:
# LE-NEXT: addis 4, 13, 0
# LE-NEXT: std 3, -28664(4)
test_ds:
diff --git a/lld/test/ELF/ppc64-tls-ld-le.s b/lld/test/ELF/ppc64-tls-ld-le.s
index f348bb9a4f43..c25fa2767d1a 100644
--- a/lld/test/ELF/ppc64-tls-ld-le.s
+++ b/lld/test/ELF/ppc64-tls-ld-le.s
@@ -67,7 +67,7 @@ a:
// InputRelocs: R_PPC64_TLSLD {{0+}} a + 0
// Verify that the local-dynamic sequence is relaxed to local exec.
-// Dis: _start:
+// Dis: <_start>:
// Dis: nop
// Dis: addis 3, 13, 0
// Dis: nop
diff --git a/lld/test/ELF/ppc64-toc-addis-nop.s b/lld/test/ELF/ppc64-toc-addis-nop.s
index 067c5b36323e..ebf53f28b280 100644
--- a/lld/test/ELF/ppc64-toc-addis-nop.s
+++ b/lld/test/ELF/ppc64-toc-addis-nop.s
@@ -38,7 +38,7 @@ bytes:
addis 4, 2, byteSt at toc@ha
stb 3, byteSt at toc@l(4)
blr
-# Dis-LABEL: bytes:
+# Dis-LABEL: <bytes>:
# Dis-NEXT: addis
# Dis-NEXT: addi
# Dis-NEXT: nop
@@ -47,7 +47,7 @@ bytes:
# Dis-NEXT: stb 3, -32751(2)
# Dis-NEXT: blr
-# NoOpt-LABEL: bytes:
+# NoOpt-LABEL: <bytes>:
# NoOpt-NEXT: addis
# NoOpt-NEXT: addi
# NoOpt-NEXT: addis 3, 2, 0
@@ -72,7 +72,7 @@ halfs:
addis 5, 2, halfSt at toc@ha
sth 4, halfSt at toc@l(5)
blr
-# Dis-LABEL: halfs:
+# Dis-LABEL: <halfs>:
# Dis-NEXT: addis
# Dis-NEXT: addi
# Dis-NEXT: nop
@@ -83,7 +83,7 @@ halfs:
# Dis-NEXT: sth 4, -32748(2)
# Dis-NEXT: blr
-# NoOpt-LABEL: halfs:
+# NoOpt-LABEL: <halfs>:
# NoOpt-NEXT: addis
# NoOpt-NEXT: addi
# NoOpt-NEXT: addis 3, 2, 0
@@ -181,7 +181,7 @@ vec_dq:
stxv 3, vecSt at toc@l(3)
blr
-# Dis-LABEL: vec_dq:
+# Dis-LABEL: <vec_dq>:
# Dis-NEXT: addis
# Dis-NEXT: addi
# Dis-NEXT: nop
@@ -190,7 +190,7 @@ vec_dq:
# Dis-NEXT: stxv 3, -32704(2)
# Dis-NEXT: blr
-# NoOpt-LABEL: vec_dq:
+# NoOpt-LABEL: <vec_dq>:
# NoOpt-NEXT: addis
# NoOpt-NEXT: addi
# NoOpt-NEXT: addis 3, 2, 0
@@ -217,7 +217,7 @@ vec_ds:
addis 3, 2, vecSt at toc@ha
stxssp 3, vecSt at toc@l(3)
blr
-# Dis-LABEL: vec_ds:
+# Dis-LABEL: <vec_ds>:
# Dis-NEXT: addis
# Dis-NEXT: addi
# Dis-NEXT: nop
@@ -230,7 +230,7 @@ vec_ds:
# Dis-NEXT: stxssp 3, -32704(2)
# Dis-NEXT: blr
-# NoOpt-LABEL: vec_ds:
+# NoOpt-LABEL: <vec_ds>:
# NoOpt-NEXT: addis
# NoOpt-NEXT: addi
# NoOpt-NEXT: addis 3, 2, 0
diff --git a/lld/test/ELF/ppc64-toc-rel.s b/lld/test/ELF/ppc64-toc-rel.s
index 4fff50c3ab71..be9046e8389f 100644
--- a/lld/test/ELF/ppc64-toc-rel.s
+++ b/lld/test/ELF/ppc64-toc-rel.s
@@ -71,6 +71,6 @@ _start:
# r2 stores the TOC base address. To access global_a with r3, it
# computes the address with TOC plus an offset.
# global_a - .TOC. = 0x100301f0 - 0x100281e8 = (1 << 16) - 32760
-# CHECK: _start:
+# CHECK: <_start>:
# CHECK: 100101d0: addis 3, 2, 1
# CHECK-NEXT: 100101d4: addi 3, 3, -32760
diff --git a/lld/test/ELF/ppc64-toc-restore-recursive-call.s b/lld/test/ELF/ppc64-toc-restore-recursive-call.s
index d6eb154e13d5..aae4a75e909c 100644
--- a/lld/test/ELF/ppc64-toc-restore-recursive-call.s
+++ b/lld/test/ELF/ppc64-toc-restore-recursive-call.s
@@ -14,11 +14,11 @@
# for recursive calls as well as keeps the logic for recursive calls consistent
# with non-recursive calls.
-# CHECK-LABEL: 0000000000010290 recursive_func:
+# CHECK-LABEL: 0000000000010290 <recursive_func>:
# CHECK: 102b8: bl .+32
# CHECK-NEXT: ld 2, 24(1)
-# CHECK-LABEL: 00000000000102d8 __plt_recursive_func:
+# CHECK-LABEL: 00000000000102d8 <__plt_recursive_func>:
.abiversion 2
.section ".text"
diff --git a/lld/test/ELF/ppc64-toc-restore.s b/lld/test/ELF/ppc64-toc-restore.s
index 7f68a50e8353..4db8358e1268 100644
--- a/lld/test/ELF/ppc64-toc-restore.s
+++ b/lld/test/ELF/ppc64-toc-restore.s
@@ -28,7 +28,7 @@ _start:
bl foo
nop
bl bar_local
-// CHECK-LABEL: _start:
+// CHECK-LABEL: <_start>:
// CHECK-NEXT: 100102c8: bl .+60
// CHECK-NEXT: 100102cc: ld 2, 24(1)
// CHECK-NEXT: 100102d0: bl .-16
@@ -42,7 +42,7 @@ _
diff _object:
bl foo_not_shared
bl foo_not_shared
nop
-// CHECK-LABEL: _
diff _object:
+// CHECK-LABEL: <_
diff _object>:
// CHECK-NEXT: 100102d4: bl .+28
// CHECK-NEXT: 100102d8: bl .+24
// CHECK-NEXT: 100102dc: nop
@@ -51,7 +51,7 @@ _
diff _object:
.global noretbranch
noretbranch:
b bar_local
-// CHECK-LABEL: noretbranch:
+// CHECK-LABEL: <noretbranch>:
// CHECK: 100102e0: b .+67108832
// CHECK-EMPTY:
@@ -60,6 +60,6 @@ noretbranch:
last:
bl foo
nop
-// CHECK-LABEL: last:
+// CHECK-LABEL: <last>:
// CHECK-NEXT: 100102e4: bl .+32
// CHECK-NEXT: 100102e8: ld 2, 24(1)
diff --git a/lld/test/ELF/pr34660.s b/lld/test/ELF/pr34660.s
index 5181d3fac4ce..054ec27bdc73 100644
--- a/lld/test/ELF/pr34660.s
+++ b/lld/test/ELF/pr34660.s
@@ -14,7 +14,7 @@
# DISASM: Disassembly of section .text:
# DISASM-EMPTY:
-# DISASM-NEXT: $x.0:
+# DISASM-NEXT: <$x.0>:
# DISASM-NEXT: 1022c: ldr x8, #131176
# SYM: Symbol table '.symtab'
diff --git a/lld/test/ELF/pre_init_fini_array.s b/lld/test/ELF/pre_init_fini_array.s
index dacd74d8ae0e..95bc4778c1e0 100644
--- a/lld/test/ELF/pre_init_fini_array.s
+++ b/lld/test/ELF/pre_init_fini_array.s
@@ -136,7 +136,7 @@ _start:
// CHECK-NEXT: Section: .preinit_array
// CHECK-NEXT: }
-// DISASM: _start:
+// DISASM: <_start>:
// DISASM-NEXT: callq {{.*}} <__preinit_array_start>
// DISASM-NEXT: callq {{.*}} <__fini_array_start>
// DISASM-NEXT: callq {{.*}} <__init_array_start>
diff --git a/lld/test/ELF/pre_init_fini_array_missing.s b/lld/test/ELF/pre_init_fini_array_missing.s
index 0b0477ef2608..5f7c02bfb81d 100644
--- a/lld/test/ELF/pre_init_fini_array_missing.s
+++ b/lld/test/ELF/pre_init_fini_array_missing.s
@@ -21,7 +21,7 @@ _start:
// CHECK: Disassembly of section .text:
// CHECK-EMPTY:
-// CHECK-NEXT: _start:
+// CHECK-NEXT: <_start>:
// CHECK-NEXT: 201120: callq -5
// CHECK-NEXT: callq -10
// CHECK-NEXT: callq -15
@@ -33,7 +33,7 @@ _start:
// PIE: Disassembly of section .text:
// PIE-EMPTY:
-// PIE-NEXT: _start:
+// PIE-NEXT: <_start>:
// PIE-NEXT: 1210: callq -5
// PIE-NEXT: callq -10
// PIE-NEXT: callq -15
diff --git a/lld/test/ELF/relocatable-symbols.s b/lld/test/ELF/relocatable-symbols.s
index 2c22c7f422bb..37dc1952d9cc 100644
--- a/lld/test/ELF/relocatable-symbols.s
+++ b/lld/test/ELF/relocatable-symbols.s
@@ -5,7 +5,7 @@
# RUN: llvm-readobj -r %t | FileCheck -check-prefix=RELOC %s
# RUN: llvm-readobj --symbols -r %tout | FileCheck -check-prefix=SYMBOL %s
-# DISASM: _start:
+# DISASM: <_start>:
# DISASM-NEXT: 0: {{.*}} callq 0
# DISASM-NEXT: 5: {{.*}} callq 0
# DISASM-NEXT: a: {{.*}} callq 0
@@ -21,14 +21,14 @@
# DISASM-EMPTY:
# DISASM-NEXT: Disassembly of section foo:
# DISASM-EMPTY:
-# DISASM-NEXT: foo:
+# DISASM-NEXT: <foo>:
# DISASM-NEXT: 0: 90 nop
# DISASM-NEXT: 1: 90 nop
# DISASM-NEXT: 2: 90 nop
# DISASM-EMPTY:
# DISASM-NEXT: Disassembly of section bar:
# DISASM-EMPTY:
-# DISASM-NEXT: bar:
+# DISASM-NEXT: <bar>:
# DISASM-NEXT: 0: 90 nop
# DISASM-NEXT: 1: 90 nop
# DISASM-NEXT: 2: 90 nop
diff --git a/lld/test/ELF/relocatable.s b/lld/test/ELF/relocatable.s
index 90ec024395c3..5811b14361cb 100644
--- a/lld/test/ELF/relocatable.s
+++ b/lld/test/ELF/relocatable.s
@@ -65,13 +65,13 @@
# CHECKTEXT: Disassembly of section .text:
# CHECKTEXT-EMPTY:
-# CHECKTEXT-NEXT: main:
+# CHECKTEXT-NEXT: <main>:
# CHECKTEXT-NEXT: 0: c7 04 25 00 00 00 00 05 00 00 00 movl $5, 0
# CHECKTEXT-NEXT: b: c7 04 25 00 00 00 00 07 00 00 00 movl $7, 0
-# CHECKTEXT: foo:
+# CHECKTEXT: <foo>:
# CHECKTEXT-NEXT: 20: c7 04 25 00 00 00 00 01 00 00 00 movl $1, 0
# CHECKTEXT-NEXT: 2b: c7 04 25 00 00 00 00 02 00 00 00 movl $2, 0
-# CHECKTEXT: bar:
+# CHECKTEXT: <bar>:
# CHECKTEXT-NEXT: 40: c7 04 25 00 00 00 00 08 00 00 00 movl $8, 0
# CHECKTEXT-NEXT: 4b: c7 04 25 00 00 00 00 09 00 00 00 movl $9, 0
diff --git a/lld/test/ELF/relocation-absolute.s b/lld/test/ELF/relocation-absolute.s
index b882987bb694..f3ebf7f72c46 100644
--- a/lld/test/ELF/relocation-absolute.s
+++ b/lld/test/ELF/relocation-absolute.s
@@ -8,5 +8,5 @@
_start:
movl $abs, %edx
-//CHECK: start:
+//CHECK: <_start>:
//CHECK-NEXT: movl $66, %edx
diff --git a/lld/test/ELF/relocation-b-aarch64.test b/lld/test/ELF/relocation-b-aarch64.test
index b5244db5eb6f..fd3780925330 100644
--- a/lld/test/ELF/relocation-b-aarch64.test
+++ b/lld/test/ELF/relocation-b-aarch64.test
@@ -9,9 +9,9 @@
# CHECK: Disassembly of section .text:
# CHECK-EMPTY:
-# CHECK-NEXT: foo:
+# CHECK-NEXT: <foo>:
# CHECK-NEXT: 210120: b #4
-# CHECK: bar:
+# CHECK: <bar>:
# CHECK-NEXT: 210124: b #-4
!ELF
diff --git a/lld/test/ELF/relocation-copy-i686.s b/lld/test/ELF/relocation-copy-i686.s
index d8f59bd821d9..efccea3b4ae5 100644
--- a/lld/test/ELF/relocation-copy-i686.s
+++ b/lld/test/ELF/relocation-copy-i686.s
@@ -55,7 +55,7 @@ movl $9, z
// 16 is alignment here
// CODE: Disassembly of section .text:
// CODE-EMPTY:
-// CODE-NEXT: main:
+// CODE-NEXT: <main>:
/// .bss + 0 = 0x403270
// CODE-NEXT: 4011f0: movl $0x5, 0x403270
/// .bss + 16 = 0x403270 + 16 = 0x403280
diff --git a/lld/test/ELF/relocation-copy.s b/lld/test/ELF/relocation-copy.s
index e427cc91721b..7f0c083a8e38 100644
--- a/lld/test/ELF/relocation-copy.s
+++ b/lld/test/ELF/relocation-copy.s
@@ -56,7 +56,7 @@ movl $z, %edx
// 16 is alignment here
// CODE: Disassembly of section .text:
// CODE-EMPTY:
-// CODE-NEXT: _start:
+// CODE-NEXT: <_start>:
// CODE-NEXT: movl $0x5, 0x203400
// CODE-NEXT: movl $0x7, 0x203410
// CODE-NEXT: movl $0x9, 0x203414
diff --git a/lld/test/ELF/relocation-i686.s b/lld/test/ELF/relocation-i686.s
index 9a3e1a24dbc1..3ae6f4dec64a 100644
--- a/lld/test/ELF/relocation-i686.s
+++ b/lld/test/ELF/relocation-i686.s
@@ -27,15 +27,15 @@ R_386_PC32_2:
// CHECK: Disassembly of section .R_386_32:
// CHECK-EMPTY:
-// CHECK-NEXT: R_386_32:
+// CHECK-NEXT: <R_386_32>:
// CHECK-NEXT: movl $4198829, %edx
// CHECK: Disassembly of section .R_386_PC32:
// CHECK-EMPTY:
-// CHECK-NEXT: R_386_PC32:
+// CHECK-NEXT: <R_386_PC32>:
// CHECK-NEXT: calll 4
-// CHECK: R_386_PC32_2:
+// CHECK: <R_386_PC32_2>:
// CHECK-NEXT: nop
// Create a .got
@@ -68,7 +68,7 @@ R_386_GOTPC:
// .got.plt - 0x4011c0 = 0x403280 - 0x4011c0 = 8384
// CHECK: Disassembly of section .R_386_GOTPC:
// CHECK-EMPTY:
-// CHECK-NEXT: R_386_GOTPC:
+// CHECK-NEXT: <R_386_GOTPC>:
// CHECK-NEXT: 4011c0: movl $8384, %eax
.section .dynamic_reloc, "ax", at progbits
@@ -76,7 +76,7 @@ R_386_GOTPC:
// .plt + 16 - (0x4011c5 + 5) = 0x4011e0 + 16 - 0x4011ca = 38
// CHECK: Disassembly of section .dynamic_reloc:
// CHECK-EMPTY:
-// CHECK-NEXT: .dynamic_reloc:
+// CHECK-NEXT: <.dynamic_reloc>:
// CHECK-NEXT: 4011c5: calll 38 <bar at plt>
.section .R_386_GOT32,"ax", at progbits
@@ -92,7 +92,7 @@ R_386_GOT32:
// &.got[2] - .got.plt = 0x402278 + 8 - 0x403280 = 4294963200
// CHECK: Disassembly of section .R_386_GOT32:
// CHECK-EMPTY:
-// CHECK-NEXT: R_386_GOT32:
+// CHECK-NEXT: <R_386_GOT32>:
// CHECK-NEXT: 4011ca: movl 4294963192, %eax
// CHECK-NEXT: movl 4294963196, %eax
// CHECK-NEXT: movl 4294963200, %eax
diff --git a/lld/test/ELF/relocation.s b/lld/test/ELF/relocation.s
index fe51882b454a..7a7eaef06abf 100644
--- a/lld/test/ELF/relocation.s
+++ b/lld/test/ELF/relocation.s
@@ -92,11 +92,11 @@ lulz:
// CHECK: Disassembly of section .text:
// CHECK-EMPTY:
-// CHECK-NEXT: _start:
+// CHECK-NEXT: <_start>:
// CHECK-NEXT: 201310: e8 04 00 00 00 callq 4
// CHECK-NEXT: 201315:
-// CHECK: lulz:
+// CHECK: <lulz>:
// CHECK-NEXT: 201319: 90 nop
@@ -109,7 +109,7 @@ R_X86_64_32:
// constants in hex.
// CHECK: Disassembly of section .text2:
// CHECK-EMPTY:
-// CHECK-NEXT: R_X86_64_32:
+// CHECK-NEXT: <R_X86_64_32>:
// CHECK-NEXT: 20131a: {{.*}} movl $2102042, %edx
.section .R_X86_64_32S,"ax", at progbits
@@ -119,7 +119,7 @@ R_X86_64_32S:
// CHECK: Disassembly of section .R_X86_64_32S:
// CHECK-EMPTY:
-// CHECK-NEXT: R_X86_64_32S:
+// CHECK-NEXT: <R_X86_64_32S>:
// CHECK-NEXT: {{.*}}: {{.*}} movq 1053465, %rdx
.section .R_X86_64_PC32,"ax", at progbits
@@ -131,7 +131,7 @@ R_X86_64_PC32:
// 0x201340 + 16 - (0x201327 + 5) = 36
// CHECK: Disassembly of section .R_X86_64_PC32:
// CHECK-EMPTY:
-// CHECK-NEXT: R_X86_64_PC32:
+// CHECK-NEXT: <R_X86_64_PC32>:
// CHECK-NEXT: 201327: {{.*}} callq 36
// CHECK-NEXT: 20132c: {{.*}} movl $2102096, %eax
@@ -142,5 +142,5 @@ R_X86_64_32S_2:
// plt is at 0x201340. The second plt entry is at 0x201360 == 2102112
// CHECK: Disassembly of section .R_X86_64_32S_2:
// CHECK-EMPTY:
-// CHECK-NEXT: R_X86_64_32S_2:
+// CHECK-NEXT: <R_X86_64_32S_2>:
// CHECK-NEXT: 201331: {{.*}} movl 2102112, %eax
diff --git a/lld/test/ELF/riscv-ifunc-nonpreemptible.s b/lld/test/ELF/riscv-ifunc-nonpreemptible.s
index f5052f54fa3a..3e255456ad21 100644
--- a/lld/test/ELF/riscv-ifunc-nonpreemptible.s
+++ b/lld/test/ELF/riscv-ifunc-nonpreemptible.s
@@ -17,11 +17,11 @@
# SYM32: 0001190 0 FUNC GLOBAL DEFAULT {{.*}} func
-# DIS32: _start:
+# DIS32: <_start>:
# DIS32-NEXT: 1180: auipc a0, 0
# DIS32-NEXT: addi a0, a0, 16
# DIS32: Disassembly of section .iplt:
-# DIS32: func:
+# DIS32: <func>:
## 32-bit: &.got.plt[func]-. = 0x3218-0x1190 = 4096*2+136
# DIS32-NEXT: 1190: auipc t3, 2
# DIS32-NEXT: lw t3, 136(t3)
@@ -34,11 +34,11 @@
# SYM64: 000000000001270 0 FUNC GLOBAL DEFAULT {{.*}} func
-# DIS64: _start:
+# DIS64: <_start>:
# DIS64-NEXT: 1264: auipc a0, 0
# DIS64-NEXT: addi a0, a0, 12
# DIS64: Disassembly of section .iplt:
-# DIS64: func:
+# DIS64: <func>:
## 64-bit: &.got.plt[func]-. = 0x3370-0x1270 = 4096*2+256
# DIS64-NEXT: 1270: auipc t3, 2
# DIS64-NEXT: ld t3, 256(t3)
diff --git a/lld/test/ELF/riscv-plt.s b/lld/test/ELF/riscv-plt.s
index 0f0567692ea8..489eadd68b0e 100644
--- a/lld/test/ELF/riscv-plt.s
+++ b/lld/test/ELF/riscv-plt.s
@@ -43,7 +43,7 @@
# GOTPLT64-NEXT: 0x000130d0 00000000 00000000 00000000 00000000
# GOTPLT64-NEXT: 0x000130e0 30100100 00000000 30100100 00000000
-# DIS: _start:
+# DIS: <_start>:
## Direct call
## foo - . = 0x11020-0x11000 = 32
# DIS-NEXT: 11000: auipc ra, 0
@@ -57,11 +57,11 @@
## weak at plt - . = 0x11060-0x11018 = 72
# DIS-NEXT: 11018: auipc ra, 0
# DIS-NEXT: jalr 72(ra)
-# DIS: foo:
+# DIS: <foo>:
# DIS-NEXT: 11020:
# DIS: Disassembly of section .plt:
-# DIS: .plt:
+# DIS: <.plt>:
# DIS-NEXT: auipc t2, 2
# DIS-NEXT: sub t1, t1, t3
## .got.plt - .plt = 0x13068 - 0x11030 = 4096*2+56
diff --git a/lld/test/ELF/riscv-undefined-weak.s b/lld/test/ELF/riscv-undefined-weak.s
index 237e96b3d99d..acc5693cd5f9 100644
--- a/lld/test/ELF/riscv-undefined-weak.s
+++ b/lld/test/ELF/riscv-undefined-weak.s
@@ -17,7 +17,7 @@
# RELOC: 0x0 R_RISCV_HI20 target 0x1
# RELOC-NEXT: 0x4 R_RISCV_LO12_I target 0x1
-# CHECK-LABEL: absolute:
+# CHECK-LABEL: <absolute>:
# CHECK-NEXT: lui t0, 0
# CHECK-NEXT: addi t0, t0, 1
absolute:
@@ -31,11 +31,11 @@ absolute:
# RELOC-NEXT: 0x14 R_RISCV_PCREL_LO12_S .Lpcrel_hi1 0x0
## 1048559 should be -0x11.
-# CHECK-LABEL: relative:
+# CHECK-LABEL: <relative>:
# CHECK-NEXT: 11{{...}}: auipc a1, 1048559
# PC-NEXT: addi a1, a1, -352
# PLT-NEXT: addi a1, a1, -792
-# CHECK-LABEL: .Lpcrel_hi1:
+# CHECK-LABEL: <.Lpcrel_hi1>:
# CHECK-NEXT: 11{{...}}: auipc t1, 1048559
# PC-NEXT: sd a2, -358(t1)
# PLT-NEXT: sd a2, -798(t1)
@@ -49,7 +49,7 @@ relative:
# RELOC: 0x18 R_RISCV_CALL target 0x0
# RELOC-NEXT: 0x20 R_RISCV_JAL target 0x0
-# PC-LABEL: branch:
+# PC-LABEL: <branch>:
# PC-NEXT: auipc ra, 1048559
# PC-NEXT: jalr -368(ra)
## FIXME: llvm-objdump -d should print the address, instead of the offset.
@@ -57,7 +57,7 @@ relative:
## If .dynsym exists, an undefined weak symbol is preemptible.
## We create a PLT entry and redirect the reference to it.
-# PLT-LABEL: branch:
+# PLT-LABEL: <branch>:
# PLT-NEXT: auipc ra, 0
# PLT-NEXT: jalr 56(ra)
# PLT-NEXT: j -70448
diff --git a/lld/test/ELF/startstop-gccollect.s b/lld/test/ELF/startstop-gccollect.s
index a53ac81ec4d9..300fb19d586b 100644
--- a/lld/test/ELF/startstop-gccollect.s
+++ b/lld/test/ELF/startstop-gccollect.s
@@ -17,18 +17,18 @@
# RUN: ld.lld %t --gc-sections -o %tout %t2.so
# RUN: llvm-objdump -d %tout | FileCheck -check-prefix=DISASM %s
-# DISASM: _start:
+# DISASM: <_start>:
# DISASM-NEXT: callq {{.*}} <__start_foo>
# DISASM-NEXT: callq {{.*}} <__stop_bar>
# DISASM-EMPTY:
# DISASM-NEXT: Disassembly of section foo:
# DISASM-EMPTY:
-# DISASM-NEXT: __start_foo:
+# DISASM-NEXT: <__start_foo>:
# DISASM-NEXT: nop
# DISASM-EMPTY:
# DISASM-NEXT: Disassembly of section bar:
# DISASM-EMPTY:
-# DISASM-NEXT: bar:
+# DISASM-NEXT: <bar>:
# DISASM-NEXT: nop
.global _start
diff --git a/lld/test/ELF/startstop.s b/lld/test/ELF/startstop.s
index a311fc7484a4..0b318ae943d7 100644
--- a/lld/test/ELF/startstop.s
+++ b/lld/test/ELF/startstop.s
@@ -4,19 +4,19 @@
// RUN: llvm-objdump -d --no-show-raw-insn %t.so | FileCheck -check-prefix=DISASM %s
// RUN: llvm-readobj --symbols -r %t.so | FileCheck -check-prefix=SYMBOL %s
-// DISASM: _start:
+// DISASM: <_start>:
// DISASM: 1330: callq 10 <__start_foo>
// DISASM: 1335: callq 8 <__start_bar>
// DISASM: 133a: callq 3 <__start_bar>
// DISASM: Disassembly of section foo:
// DISASM-EMPTY:
-// DISASM: __start_foo:
+// DISASM: <__start_foo>:
// DISASM: 133f: nop
// DISASM: nop
// DISASM: nop
// DISASM: Disassembly of section bar:
// DISASM-EMPTY:
-// DISASM: __start_bar:
+// DISASM: <__start_bar>:
// DISASM: 1342: nop
// DISASM: nop
// DISASM: nop
diff --git a/lld/test/ELF/tls-opt.s b/lld/test/ELF/tls-opt.s
index 1ad51e560a57..13f62508a189 100644
--- a/lld/test/ELF/tls-opt.s
+++ b/lld/test/ELF/tls-opt.s
@@ -7,7 +7,7 @@
// NORELOC: Relocations [
// NORELOC-NEXT: ]
-// DISASM: _start:
+// DISASM: <_start>:
// DISASM-NEXT: movq $-8, %rax
// DISASM-NEXT: movq $-8, %r15
// DISASM-NEXT: leaq -8(%rax), %rax
@@ -34,9 +34,9 @@
// DISASM-NEXT: leaq -4(%rax), %rax
// LD to LE:
-// DISASM: _DTPOFF64_1:
+// DISASM: <_DTPOFF64_1>:
// DISASM-NEXT: clc
-// DISASM: _DTPOFF64_2:
+// DISASM: <_DTPOFF64_2>:
// DISASM-NEXT: cld
.type tls0, at object
diff --git a/lld/test/ELF/tls.s b/lld/test/ELF/tls.s
index e8db3723a7a5..353a056ee20d 100644
--- a/lld/test/ELF/tls.s
+++ b/lld/test/ELF/tls.s
@@ -164,7 +164,7 @@ d:
// DIS: Disassembly of section .text:
// DIS-EMPTY:
-// DIS-NEXT: _start:
+// DIS-NEXT: <_start>:
// DIS-NEXT: movl %fs:-8, %eax
// DIS-NEXT: movl %fs:-16, %eax
// DIS-NEXT: movl %fs:-4, %eax
diff --git a/lld/test/ELF/weak-undef-got-pie.s b/lld/test/ELF/weak-undef-got-pie.s
index a93b7e44aae4..c695ecdbafb1 100644
--- a/lld/test/ELF/weak-undef-got-pie.s
+++ b/lld/test/ELF/weak-undef-got-pie.s
@@ -17,6 +17,6 @@
.globl _start
_start:
-# DISASM: _start:
+# DISASM: <_start>:
# DISASM-NEXT: movq {{.*}}(%rip), %rax
mov foo at gotpcrel(%rip), %rax
diff --git a/lld/test/ELF/wrap-no-real.s b/lld/test/ELF/wrap-no-real.s
index 20c68b5181d5..2c30d06c67c2 100644
--- a/lld/test/ELF/wrap-no-real.s
+++ b/lld/test/ELF/wrap-no-real.s
@@ -10,7 +10,7 @@
// RUN: ld.lld -o %t %t1.o %t2.o %t3.so -wrap foo
// RUN: llvm-objdump -d -print-imm-hex %t | FileCheck %s
-// CHECK: _start:
+// CHECK: <_start>:
// CHECK-NEXT: movl $0x11010, %edx
// CHECK-NEXT: movl $0x11010, %edx
// CHECK-NEXT: movl $0x11000, %edx
diff --git a/lld/test/ELF/wrap-plt.s b/lld/test/ELF/wrap-plt.s
index f888db821be0..2584d6ac09bb 100644
--- a/lld/test/ELF/wrap-plt.s
+++ b/lld/test/ELF/wrap-plt.s
@@ -15,7 +15,7 @@
// CHECK-NEXT: }
// CHECK-NEXT: ]
-// DISASM: _start:
+// DISASM: <_start>:
// DISASM-NEXT: jmp {{.*}} <__wrap_foo at plt>
// DISASM-NEXT: jmp {{.*}} <__wrap_foo at plt>
// DISASM-NEXT: jmp {{.*}} <_start at plt>
diff --git a/lld/test/ELF/wrap.s b/lld/test/ELF/wrap.s
index 627154fcfb3a..2f76208a3538 100644
--- a/lld/test/ELF/wrap.s
+++ b/lld/test/ELF/wrap.s
@@ -9,7 +9,7 @@
// RUN: ld.lld -o %t3 %t %t2 --wrap foo --wrap foo -wrap=nosuchsym
// RUN: llvm-objdump -d -print-imm-hex %t3 | FileCheck %s
-// CHECK: _start:
+// CHECK: <_start>:
// CHECK-NEXT: movl $0x11010, %edx
// CHECK-NEXT: movl $0x11010, %edx
// CHECK-NEXT: movl $0x11000, %edx
diff --git a/lld/test/ELF/x86-64-feature-cet.s b/lld/test/ELF/x86-64-feature-cet.s
index 9899bec1e084..0361a291c4c8 100644
--- a/lld/test/ELF/x86-64-feature-cet.s
+++ b/lld/test/ELF/x86-64-feature-cet.s
@@ -41,13 +41,13 @@
# GOTPLT-NEXT: 2034a0 00000000 00000000
# DISASM: Disassembly of section .text:
-# DISASM: 0000000000201330 func1:
+# DISASM: 0000000000201330 <func1>:
# DISASM-NEXT: 201330: callq 0x2b <func2+0x201360>
# DISASM-NEXT: 201335: callq 0x36 <func2+0x201370>
# DISASM-NEXT: retq
# DISASM: Disassembly of section .plt:
-# DISASM: 0000000000201340 .plt:
+# DISASM: 0000000000201340 <.plt>:
# DISASM-NEXT: 201340: pushq 0x2142(%rip)
# DISASM-NEXT: jmpq *0x2144(%rip)
# DISASM-NEXT: nopl (%rax)
@@ -57,13 +57,13 @@
# DISASM-NEXT: nop
# DISASM: Disassembly of section .plt.sec:
-# DISASM: 0000000000201360 .plt.sec:
+# DISASM: 0000000000201360 <.plt.sec>:
# DISASM-NEXT: 201360: endbr64
# DISASM-NEXT: jmpq *0x212e(%rip)
# DISASM-NEXT: nopw (%rax,%rax)
# DISASM: Disassembly of section .iplt:
-# DISASM: 0000000000201370 .iplt:
+# DISASM: 0000000000201370 <.iplt>:
# DISASM-NEXT: 201370: endbr64
# DISASM-NEXT: jmpq *0x2126(%rip)
# DISASM-NEXT: nopw (%rax,%rax)
diff --git a/lld/test/ELF/x86-64-gotpc-relax-nopic.s b/lld/test/ELF/x86-64-gotpc-relax-nopic.s
index 66ca9c8f1265..b927ecff6383 100644
--- a/lld/test/ELF/x86-64-gotpc-relax-nopic.s
+++ b/lld/test/ELF/x86-64-gotpc-relax-nopic.s
@@ -15,7 +15,7 @@
## 2105751 = 0x202197 (bar)
# DISASM: Disassembly of section .text:
# DISASM-EMPTY:
-# DISASM-NEXT: _start:
+# DISASM-NEXT: <_start>:
# DISASM-NEXT: 201158: adcq $2105751, %rax
# DISASM-NEXT: addq $2105751, %rbx
# DISASM-NEXT: andq $2105751, %rcx
@@ -57,7 +57,7 @@
## 0x102a + 4207 + 7 = 0x20A0
# DISASM-PIC: Disassembly of section .text:
# DISASM-PIC-EMPTY:
-# DISASM-PIC-NEXT: _start:
+# DISASM-PIC-NEXT: <_start>:
# DISASM-PIC-NEXT: 1268: adcq 4313(%rip), %rax
# DISASM-PIC-NEXT: addq 4306(%rip), %rbx
# DISASM-PIC-NEXT: andq 4299(%rip), %rcx
diff --git a/lld/test/ELF/x86-64-gotpc-relax-und-dso.s b/lld/test/ELF/x86-64-gotpc-relax-und-dso.s
index 5aded8f52b4d..fbcbca1d1b68 100644
--- a/lld/test/ELF/x86-64-gotpc-relax-und-dso.s
+++ b/lld/test/ELF/x86-64-gotpc-relax-und-dso.s
@@ -18,11 +18,11 @@
# 0x1025 + 7 - 43 = 0x1001
# DISASM: Disassembly of section .text:
# DISASM-EMPTY:
-# DISASM-NEXT: foo:
+# DISASM-NEXT: <foo>:
# DISASM-NEXT: nop
-# DISASM: hid:
+# DISASM: <hid>:
# DISASM-NEXT: nop
-# DISASM: _start:
+# DISASM: <_start>:
# DISASM-NEXT: movq 4367(%rip), %rax
# DISASM-NEXT: movq 4360(%rip), %rax
# DISASM-NEXT: movq 4361(%rip), %rax
diff --git a/lld/test/ELF/x86-64-gotpc-relax.s b/lld/test/ELF/x86-64-gotpc-relax.s
index bf935f693e04..0541bb66baa8 100644
--- a/lld/test/ELF/x86-64-gotpc-relax.s
+++ b/lld/test/ELF/x86-64-gotpc-relax.s
@@ -14,13 +14,13 @@
# 0x201188 + 7 - 30 = 0x201171
# DISASM: Disassembly of section .text:
# DISASM-EMPTY:
-# DISASM-NEXT: foo:
+# DISASM-NEXT: <foo>:
# DISASM-NEXT: 201170: 90 nop
-# DISASM: hid:
+# DISASM: <hid>:
# DISASM-NEXT: 201171: 90 nop
-# DISASM: ifunc:
+# DISASM: <ifunc>:
# DISASM-NEXT: 201172: c3 retq
-# DISASM: _start:
+# DISASM: <_start>:
# DISASM-NEXT: leaq -10(%rip), %rax
# DISASM-NEXT: leaq -17(%rip), %rax
# DISASM-NEXT: leaq -23(%rip), %rax
diff --git a/lld/test/ELF/x86-64-plt.s b/lld/test/ELF/x86-64-plt.s
index 33caf98c82d6..72cfb8c1f526 100644
--- a/lld/test/ELF/x86-64-plt.s
+++ b/lld/test/ELF/x86-64-plt.s
@@ -50,7 +50,7 @@
// CHECK2-NEXT: }
// CHECK2-NEXT: ]
-// DISASM: _start:
+// DISASM: <_start>:
// DISASM-NEXT: jmp {{.*}} <bar at plt>
// DISASM-NEXT: jmp {{.*}} <bar at plt>
// DISASM-NEXT: jmp {{.*}} <zed at plt>
@@ -62,22 +62,22 @@
// DISASM: Disassembly of section .plt:
// DISASM-EMPTY:
-// DISASM-NEXT: .plt:
+// DISASM-NEXT: <.plt>:
// DISASM-NEXT: 1320: pushq 8450(%rip)
// DISASM-NEXT: jmpq *8452(%rip)
// DISASM-NEXT: nopl (%rax)
// DISASM-EMPTY:
-// DISASM-NEXT: bar at plt:
+// DISASM-NEXT: <bar at plt>:
// DISASM-NEXT: 1330: jmpq *8450(%rip)
// DISASM-NEXT: pushq $0
// DISASM-NEXT: jmp -32 <.plt>
// DISASM-EMPTY:
-// DISASM-NEXT: zed at plt:
+// DISASM-NEXT: <zed at plt>:
// DISASM-NEXT: 1340: jmpq *8442(%rip)
// DISASM-NEXT: pushq $1
// DISASM-NEXT: jmp -48 <.plt>
// DISASM-EMPTY:
-// DISASM-NEXT: _start at plt:
+// DISASM-NEXT: <_start at plt>:
// DISASM-NEXT: 1350: jmpq *8434(%rip)
// DISASM-NEXT: pushq $2
// DISASM-NEXT: jmp -64 <.plt>
@@ -87,7 +87,7 @@
// 0x201040 - (0x20100a + 1) - 4 = 49
// 0x201000 - (0x20100f + 1) - 4 = -20
-// DISASM2: _start:
+// DISASM2: <_start>:
// DISASM2-NEXT: jmp 43 <bar at plt>
// DISASM2-NEXT: jmp 38 <bar at plt>
// DISASM2-NEXT: jmp 49 <zed at plt>
@@ -98,17 +98,17 @@
// DISASM2: Disassembly of section .plt:
// DISASM2-EMPTY:
-// DISASM2-NEXT: .plt:
+// DISASM2-NEXT: <.plt>:
// DISASM2-NEXT: 2012e0: pushq 8450(%rip)
// DISASM2-NEXT: jmpq *8452(%rip)
// DISASM2-NEXT: nopl (%rax)
// DISASM2-EMPTY:
-// DISASM2-NEXT: bar at plt:
+// DISASM2-NEXT: <bar at plt>:
// DISASM2-NEXT: 2012f0: jmpq *8450(%rip)
// DISASM2-NEXT: pushq $0
// DISASM2-NEXT: jmp -32 <.plt>
// DISASM2-EMPTY:
-// DISASM2-NEXT: zed at plt:
+// DISASM2-NEXT: <zed at plt>:
// DISASM2-NEXT: 201300: jmpq *8442(%rip)
// DISASM2-NEXT: pushq $1
// DISASM2-NEXT: jmp -48 <.plt>
diff --git a/lld/test/ELF/x86-64-reloc-gotpc64.s b/lld/test/ELF/x86-64-reloc-gotpc64.s
index cb59baee9e15..adf809ea8be6 100644
--- a/lld/test/ELF/x86-64-reloc-gotpc64.s
+++ b/lld/test/ELF/x86-64-reloc-gotpc64.s
@@ -7,7 +7,7 @@
// SECTION: .got.plt PROGBITS 00000000000032f0 0002f0 000018
// 0x3300 (.got.plt) - 0x1274 = 8316
-// CHECK: gotpc64:
+// CHECK: <gotpc64>:
// CHECK-NEXT: 1274: {{.*}} movabsq $8316, %r11
.global gotpc64
gotpc64:
diff --git a/lld/test/ELF/x86-64-reloc-size-shared.s b/lld/test/ELF/x86-64-reloc-size-shared.s
index de2e0da9a8b4..170ee8c604db 100644
--- a/lld/test/ELF/x86-64-reloc-size-shared.s
+++ b/lld/test/ELF/x86-64-reloc-size-shared.s
@@ -25,7 +25,7 @@
// DATA-NEXT: 00000000 00000000 00000000 00000000
// DATA-NEXT: 00000000 00000000 0000
-// DISASM: _start:
+// DISASM: <_start>:
// DISASM-NEXT: movl 25, %eax
// DISASM-NEXT: movl 26, %eax
// DISASM-NEXT: movl 27, %eax
diff --git a/lld/test/ELF/x86-64-reloc-size.s b/lld/test/ELF/x86-64-reloc-size.s
index dbf2b2ca221e..7d42cfe3e597 100644
--- a/lld/test/ELF/x86-64-reloc-size.s
+++ b/lld/test/ELF/x86-64-reloc-size.s
@@ -19,7 +19,7 @@
# DATA-NEXT: 0x002031cc 00001b00 00000000 00001900 00000000
# DATA-NEXT: 0x002031dc 00001b00 00000000 0000
-# DISASM: _start:
+# DISASM: <_start>:
# DISASM-NEXT: movl 25, %eax
# DISASM-NEXT: movl 27, %eax
# DISASM-NEXT: movl 25, %eax
@@ -40,7 +40,7 @@
# DATA2-NEXT: 00000000 00000000 00001900 00000000
# DATA2-NEXT: 00001b00 00000000 0000
-# DISASM2: _start:
+# DISASM2: <_start>:
# DISASM2-NEXT: movl 0, %eax
# DISASM2-NEXT: movl 0, %eax
# DISASM2-NEXT: movl 25, %eax
diff --git a/lld/test/ELF/x86-64-retpoline-linkerscript.s b/lld/test/ELF/x86-64-retpoline-linkerscript.s
index c46f32a609e2..5a14595b4844 100644
--- a/lld/test/ELF/x86-64-retpoline-linkerscript.s
+++ b/lld/test/ELF/x86-64-retpoline-linkerscript.s
@@ -14,7 +14,7 @@
// CHECK: Disassembly of section .plt:
// CHECK-EMPTY:
-// CHECK-NEXT: .plt:
+// CHECK-NEXT: <.plt>:
// CHECK-NEXT: 10: ff 35 32 01 00 00 pushq 306(%rip)
// CHECK-NEXT: 16: 4c 8b 1d 33 01 00 00 movq 307(%rip), %r11
// CHECK-NEXT: 1d: e8 0e 00 00 00 callq 14 <.plt+0x20>
diff --git a/lld/test/ELF/x86-64-retpoline-znow-linkerscript.s b/lld/test/ELF/x86-64-retpoline-znow-linkerscript.s
index 2fda122dd26a..61e5d28cd680 100644
--- a/lld/test/ELF/x86-64-retpoline-znow-linkerscript.s
+++ b/lld/test/ELF/x86-64-retpoline-znow-linkerscript.s
@@ -14,7 +14,7 @@
// CHECK: Disassembly of section .plt:
// CHECK-EMPTY:
-// CHECK-NEXT: .plt:
+// CHECK-NEXT: <.plt>:
// CHECK-NEXT: 10: e8 0b 00 00 00 callq 11 <.plt+0x10>
// CHECK-NEXT: 15: f3 90 pause
// CHECK-NEXT: 17: 0f ae e8 lfence
diff --git a/lld/test/ELF/x86-64-retpoline-znow-static-iplt.s b/lld/test/ELF/x86-64-retpoline-znow-static-iplt.s
index 2ffc03df77a6..e0c54c3310fa 100644
--- a/lld/test/ELF/x86-64-retpoline-znow-static-iplt.s
+++ b/lld/test/ELF/x86-64-retpoline-znow-static-iplt.s
@@ -4,11 +4,11 @@
# RUN: llvm-objdump -d -no-show-raw-insn %t | FileCheck %s
#0x2011a9+5 + 34 = 0x2011d0 (foo at plt)
-# CHECK: _start:
+# CHECK: <_start>:
# CHECK-NEXT: 2011a9: callq 34
#Static IPLT header due to -z retpolineplt
-# CHECK: 00000000002011b0 .plt:
+# CHECK: 00000000002011b0 <.plt>:
# CHECK-NEXT: 2011b0: callq 11 <.plt+0x10>
# CHECK-NEXT: 2011b5: pause
# CHECK-NEXT: 2011b7: lfence
diff --git a/lld/test/ELF/x86-64-retpoline-znow.s b/lld/test/ELF/x86-64-retpoline-znow.s
index 44b799a13297..20f13ab290ba 100644
--- a/lld/test/ELF/x86-64-retpoline-znow.s
+++ b/lld/test/ELF/x86-64-retpoline-znow.s
@@ -13,7 +13,7 @@
// CHECK: Disassembly of section .plt:
// CHECK-EMPTY:
-// CHECK-NEXT: .plt:
+// CHECK-NEXT: <.plt>:
// CHECK-NEXT: 12d0: callq 11 <.plt+0x10>
// CHECK-NEXT: pause
// CHECK-NEXT: lfence
diff --git a/lld/test/ELF/x86-64-retpoline.s b/lld/test/ELF/x86-64-retpoline.s
index ff17b2dcf1dd..874e20423578 100644
--- a/lld/test/ELF/x86-64-retpoline.s
+++ b/lld/test/ELF/x86-64-retpoline.s
@@ -13,7 +13,7 @@
// CHECK: Disassembly of section .plt:
// CHECK-EMPTY:
-// CHECK-NEXT: .plt:
+// CHECK-NEXT: <.plt>:
// CHECK-NEXT: 1300: pushq 8498(%rip)
// CHECK-NEXT: movq 8499(%rip), %r11
// CHECK-NEXT: callq 14 <.plt+0x20>
diff --git a/lld/test/ELF/x86-64-split-stack-prologue-adjust-shared.s b/lld/test/ELF/x86-64-split-stack-prologue-adjust-shared.s
index 9da2dde2e208..ab4b56b67e47 100644
--- a/lld/test/ELF/x86-64-split-stack-prologue-adjust-shared.s
+++ b/lld/test/ELF/x86-64-split-stack-prologue-adjust-shared.s
@@ -7,7 +7,7 @@
# RUN: llvm-objdump -d %t | FileCheck %s
# For a cross .so call, make sure lld produced the conservative call to __morestack_non_split.
-# CHECK: prologue1_cross_so_call:
+# CHECK: <prologue1_cross_so_call>:
# CHECK-NEXT: stc{{.*$}}
# CHECK-NEXT: nopl{{.*$}}
# CHECK: jae{{.*$}}
diff --git a/lld/test/ELF/x86-64-split-stack-prologue-adjust-success.s b/lld/test/ELF/x86-64-split-stack-prologue-adjust-success.s
index fb3493f2c3e7..69636b7803c8 100644
--- a/lld/test/ELF/x86-64-split-stack-prologue-adjust-success.s
+++ b/lld/test/ELF/x86-64-split-stack-prologue-adjust-success.s
@@ -55,7 +55,7 @@ foo:
# For split-stack code calling split-stack code, ensure prologue v1 still
# calls plain __morestack, and that any raw bytes written to the prologue
# make sense.
-# CHECK: prologue1_calls_split:
+# CHECK: <prologue1_calls_split>:
# CHECK-NEXT: cmp{{.*}}%fs:{{[^,]*}},{{.*}}%rsp
# CHECK: jae{{.*$}}
# CHECK-NEXT: callq{{.*}}<__morestack>
@@ -65,7 +65,7 @@ prologue1 split
# For split-stack code calling split-stack code, ensure prologue v2 still
# calls plain __morestack, that any raw bytes written to the prologue
# make sense, and that the register number is preserved.
-# CHECK: prologue2_calls_splitr10:
+# CHECK: <prologue2_calls_splitr10>:
# CHECK-NEXT: lea{{.*}} -512(%rsp),{{.*}}%r10
# CHECK: cmp{{.*}}%fs:{{[^,]*}},{{.*}}%r{{[0-9]+}}
# CHECK: jae{{.*}}
@@ -73,7 +73,7 @@ prologue1 split
prologue2 split r10 0x200
-# CHECK: prologue2_calls_splitr11:
+# CHECK: <prologue2_calls_splitr11>:
# CHECK-NEXT: lea{{.*}} -256(%rsp),{{.*}}%r11
# CHECK: cmp{{.*}}%fs:{{[^,]*}},{{.*}}%r{{[0-9]+}}
# CHECK: jae{{.*}}
@@ -84,7 +84,7 @@ prologue2 split r11 0x100
# For split-stack code calling non-split-stack code, ensure prologue v1
# calls __morestack_non_split, and that any raw bytes written to the prologue
# make sense.
-# CHECK: prologue1_calls_non_split:
+# CHECK: <prologue1_calls_non_split>:
# CHECK-NEXT: stc{{.*$}}
# CHECK-NEXT: nopl{{.*$}}
# CHECK: jae{{.*$}}
@@ -95,7 +95,7 @@ prologue1 non_split
# For split-stack code calling non-split-stack code, ensure prologue v2
# calls __morestack_non_split, that any raw bytes written to the prologue
# make sense, and that the register number is preserved
-# CHECK: prologue2_calls_non_splitr10:
+# CHECK: <prologue2_calls_non_splitr10>:
# CHECK-NEXT: lea{{.*}} -16640(%rsp),{{.*}}%r10
# CHECK: cmp{{.*}}%fs:{{[^,]*}},{{.*}}%r10
# CHECK: jae{{.*$}}
@@ -103,7 +103,7 @@ prologue1 non_split
prologue2 non_split r10 0x100
-# CHECK: prologue2_calls_non_splitr11:
+# CHECK: <prologue2_calls_non_splitr11>:
# CHECK-NEXT: lea{{.*}} -16896(%rsp),{{.*}}%r11
# CHECK: cmp{{.*}}%fs:{{[^,]*}},{{.*}}%r11
# CHECK: jae{{.*$}}
diff --git a/lld/test/ELF/x86-64-tls-dynamic.s b/lld/test/ELF/x86-64-tls-dynamic.s
index d78ae84e44aa..910a7d2db4c4 100644
--- a/lld/test/ELF/x86-64-tls-dynamic.s
+++ b/lld/test/ELF/x86-64-tls-dynamic.s
@@ -67,7 +67,7 @@ c:
// DIS: Disassembly of section .text:
// DIS-EMPTY:
-// DIS-NEXT: .text:
+// DIS-NEXT: <.text>:
// DIS-NEXT: 1330: {{.+}} leaq 4457(%rip), %rdi
// DIS-NEXT: {{.+}} callq
// DIS-NEXT: 133c: {{.+}} leaq 4445(%rip), %rdi
diff --git a/lld/test/ELF/x86-64-tls-gd-got.s b/lld/test/ELF/x86-64-tls-gd-got.s
index f86c3aa14f08..08d6fc75e7e7 100644
--- a/lld/test/ELF/x86-64-tls-gd-got.s
+++ b/lld/test/ELF/x86-64-tls-gd-got.s
@@ -13,7 +13,7 @@ _start:
call *__tls_get_addr at GOTPCREL(%rip)
ret
-// CHECK: _start:
+// CHECK: <_start>:
// CHECK-NEXT: movq %fs:0, %rax
// CHECK-NEXT: leaq -4(%rax), %rax
// CHECK-NEXT: retq
diff --git a/lld/test/ELF/x86-64-tls-gdie.s b/lld/test/ELF/x86-64-tls-gdie.s
index 366f562752b8..d3edd1fa5069 100644
--- a/lld/test/ELF/x86-64-tls-gdie.s
+++ b/lld/test/ELF/x86-64-tls-gdie.s
@@ -20,7 +20,7 @@
// 0x2023B0 - (2012e1+7) = 4296
// DISASM: Disassembly of section .text:
// DISASM-EMPTY:
-// DISASM-NEXT: _start:
+// DISASM-NEXT: <_start>:
// DISASM-NEXT: movq %fs:0, %rax
// DISASM-NEXT: 2012d1: addq 4304(%rip), %rax
// DISASM-NEXT: movq %fs:0, %rax
diff --git a/lld/test/ELF/x86-64-tls-ie-opt-local.s b/lld/test/ELF/x86-64-tls-ie-opt-local.s
index 9b0ae6e3757c..6d78b56fd074 100644
--- a/lld/test/ELF/x86-64-tls-ie-opt-local.s
+++ b/lld/test/ELF/x86-64-tls-ie-opt-local.s
@@ -9,7 +9,7 @@
// DISASM: Disassembly of section .text:
// DISASM-EMPTY:
-// DISASM-NEXT: _start:
+// DISASM-NEXT: <_start>:
// DISASM-NEXT: movq $-8, %rax
// DISASM-NEXT: movq $-8, %r15
// DISASM-NEXT: leaq -8(%rax), %rax
diff --git a/lld/test/ELF/x86-64-tls-ie.s b/lld/test/ELF/x86-64-tls-ie.s
index ab351191120a..37345ed6dc5b 100644
--- a/lld/test/ELF/x86-64-tls-ie.s
+++ b/lld/test/ELF/x86-64-tls-ie.s
@@ -35,7 +35,7 @@
// 0x2012e4 + 4317 + 7 = 0x2023C8
// DISASM: Disassembly of section .text:
// DISASM-EMPTY:
-// DISASM-NEXT: main:
+// DISASM-NEXT: <main>:
// DISASM-NEXT: 2012d0: {{.*}} movq 4329(%rip), %rax
// DISASM-NEXT: 2012d7: {{.*}} movl %fs:(%rax), %eax
// DISASM-NEXT: 2012da: {{.*}} movq 4327(%rip), %rax
diff --git a/lld/test/ELF/x86-64-tls-opt-noplt.s b/lld/test/ELF/x86-64-tls-opt-noplt.s
index 931e9616493b..01d9fb623fac 100644
--- a/lld/test/ELF/x86-64-tls-opt-noplt.s
+++ b/lld/test/ELF/x86-64-tls-opt-noplt.s
@@ -17,7 +17,7 @@
// RELOC-NEXT: }
// RELOC-NEXT: ]
-// DISASM: _start:
+// DISASM: <_start>:
// Table 11.5: GD -> IE Code Transition (LP64)
// DISASM-NEXT: movq %fs:0, %rax
diff --git a/llvm/test/CodeGen/AArch64/arm64-simplest-elf.ll b/llvm/test/CodeGen/AArch64/arm64-simplest-elf.ll
index 58691f8ffcd2..2d6863d129d0 100644
--- a/llvm/test/CodeGen/AArch64/arm64-simplest-elf.ll
+++ b/llvm/test/CodeGen/AArch64/arm64-simplest-elf.ll
@@ -14,5 +14,5 @@ define void @foo() nounwind {
; CHECK-ELF: file format elf64-aarch64
; CHECK-ELF: Disassembly of section .text
-; CHECK-ELF-LABEL: foo:
+; CHECK-ELF-LABEL: <foo>:
; CHECK-ELF: ret
diff --git a/llvm/test/CodeGen/AArch64/callbr-asm-obj-file.ll b/llvm/test/CodeGen/AArch64/callbr-asm-obj-file.ll
index 345c3f9c4552..a79ccc5ad3b0 100644
--- a/llvm/test/CodeGen/AArch64/callbr-asm-obj-file.ll
+++ b/llvm/test/CodeGen/AArch64/callbr-asm-obj-file.ll
@@ -6,11 +6,11 @@
@l = common hidden local_unnamed_addr global i32 0, align 4
-; CHECK-LABEL: test1:
-; CHECK-LABEL: $d.1:
-; CHECK-LABEL: $x.2:
+; CHECK-LABEL: <test1>:
+; CHECK-LABEL: <$d.1>:
+; CHECK-LABEL: <$x.2>:
; CHECK-NEXT: b #16 <$x.4+0x4>
-; CHECK-LABEL: $x.4:
+; CHECK-LABEL: <$x.4>:
; CHECK-NEXT: b #4 <$x.4+0x4>
; CHECK-NEXT: mov w0, wzr
; CHECK-NEXT: ldr x30, [sp], #16
@@ -40,10 +40,10 @@ declare dso_local i32 @g(...) local_unnamed_addr
declare dso_local i32 @i(...) local_unnamed_addr
-; CHECK-LABEL: test2:
+; CHECK-LABEL: <test2>:
; CHECK: bl #0 <test2+0x10>
-; CHECK-LABEL: $d.5:
-; CHECK-LABEL: $x.6:
+; CHECK-LABEL: <$d.5>:
+; CHECK-LABEL: <$x.6>:
; CHECK-NEXT: b #16 <$x.8+0x4>
define hidden i32 @test2() local_unnamed_addr {
%1 = load i32, i32* @l, align 4
@@ -70,11 +70,11 @@ define hidden i32 @test2() local_unnamed_addr {
ret i32 undef
}
-; CHECK-LABEL: test3:
-; CHECK-LABEL: $d.9:
-; CHECK-LABEL: $x.10:
+; CHECK-LABEL: <test3>:
+; CHECK-LABEL: <$d.9>:
+; CHECK-LABEL: <$x.10>:
; CHECK-NEXT: b #-20 <test3+0x18>
-; CHECK-LABEL: $x.12:
+; CHECK-LABEL: <$x.12>:
; CHECK-NEXT: b #4 <$x.12+0x4>
; CHECK-NEXT: mov w0, wzr
; CHECK-NEXT: ldr x30, [sp], #16
diff --git a/llvm/test/CodeGen/AArch64/inlineasm-ldr-pseudo.ll b/llvm/test/CodeGen/AArch64/inlineasm-ldr-pseudo.ll
index ca24fc9c8807..afd367b22f6e 100644
--- a/llvm/test/CodeGen/AArch64/inlineasm-ldr-pseudo.ll
+++ b/llvm/test/CodeGen/AArch64/inlineasm-ldr-pseudo.ll
@@ -4,7 +4,7 @@
; demonstrate the bug. Going the asm->obj route does not show the issue.
; RUN: llc -mtriple=aarch64 < %s -filetype=obj | llvm-objdump -arch=aarch64 -d - | FileCheck %s
-; CHECK-LABEL: foo:
+; CHECK-LABEL: <foo>:
; CHECK: a0 79 95 d2 mov x0, #43981
; CHECK: c0 03 5f d6 ret
define i32 @foo() nounwind {
@@ -12,11 +12,11 @@ entry:
%0 = tail call i32 asm sideeffect "ldr $0,=0xabcd", "=r"() nounwind
ret i32 %0
}
-; CHECK-LABEL: bar:
+; CHECK-LABEL: <bar>:
; CHECK: 40 00 00 58 ldr x0, #8
; CHECK: c0 03 5f d6 ret
; Make sure the constant pool entry comes after the return
-; CHECK-LABEL: $d.1:
+; CHECK-LABEL: <$d.1>:
define i32 @bar() nounwind {
entry:
%0 = tail call i32 asm sideeffect "ldr $0,=0x10001", "=r"() nounwind
diff --git a/llvm/test/CodeGen/AArch64/space.ll b/llvm/test/CodeGen/AArch64/space.ll
index 746d0377200d..d58a7594136e 100644
--- a/llvm/test/CodeGen/AArch64/space.ll
+++ b/llvm/test/CodeGen/AArch64/space.ll
@@ -10,7 +10,7 @@ entry:
}
; CHECK: // SPACE
; CHECK-NEXT: ret
-; DUMP-LABEL: f:
+; DUMP-LABEL: <f>:
; DUMP-NEXT: ret
declare dso_local i64 @llvm.aarch64.space(i32, i64) local_unnamed_addr #0
diff --git a/llvm/test/CodeGen/AMDGPU/nop-data.ll b/llvm/test/CodeGen/AMDGPU/nop-data.ll
index b3e6a6cb8552..0635c76cd858 100644
--- a/llvm/test/CodeGen/AMDGPU/nop-data.ll
+++ b/llvm/test/CodeGen/AMDGPU/nop-data.ll
@@ -1,6 +1,6 @@
; RUN: llc -mtriple=amdgcn--amdhsa -mattr=-code-object-v3 -mcpu=fiji -filetype=obj < %s | llvm-objdump -d - -mcpu=fiji | FileCheck %s
-; CHECK: kernel0:
+; CHECK: <kernel0>:
; CHECK-NEXT: s_endpgm
define amdgpu_kernel void @kernel0() align 256 {
entry:
@@ -79,7 +79,7 @@ entry:
; CHECK-NEXT: s_nop 0 // 0000000001FC: BF800000
; CHECK-EMPTY:
-; CHECK-NEXT: kernel1:
+; CHECK-NEXT: <kernel1>:
; CHECK-NEXT: s_endpgm
define amdgpu_kernel void @kernel1(i32 addrspace(1)* addrspace(4)* %ptr.out) align 256 {
entry:
diff --git a/llvm/test/CodeGen/AMDGPU/s_code_end.ll b/llvm/test/CodeGen/AMDGPU/s_code_end.ll
index 0cf2276b2396..47ded0ad8c43 100644
--- a/llvm/test/CodeGen/AMDGPU/s_code_end.ll
+++ b/llvm/test/CodeGen/AMDGPU/s_code_end.ll
@@ -4,7 +4,7 @@
; RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1010 -asm-verbose=0 < %s | FileCheck -check-prefixes=GCN,GCN-ASM,GFX10NOEND,GFX10NOEND-ASM %s
; RUN: llc -mtriple=amdgcn-- -mcpu=gfx1010 -filetype=obj < %s | llvm-objdump -arch=amdgcn -mcpu=gfx1010 -disassemble - | FileCheck -check-prefixes=GCN,GCN-OBJ,GFX10NOEND,GFX10NOEND-OBJ %s
-; GCN: a_kernel1:
+; GCN: a_kernel1{{>?}}:
; GCN: s_endpgm
; GCN-ASM: [[END_LABEL1:\.Lfunc_end.*]]:
; GCN-ASM-NEXT: .size a_kernel1, [[END_LABEL1]]-a_kernel1
@@ -15,7 +15,7 @@ define amdgpu_kernel void @a_kernel1() {
ret void
}
-; GCN: a_kernel2:
+; GCN: a_kernel2{{>?}}:
; GCN: s_endpgm
; GCN-ASM: [[END_LABEL2:\.Lfunc_end.*]]:
; GCN-ASM-NEXT: .size a_kernel2, [[END_LABEL2]]-a_kernel2
@@ -30,7 +30,7 @@ define amdgpu_kernel void @a_kernel2() {
; GCN-ASM-NEXT: .p2align 2
; GCN-ASM-NEXT: .type a_function, at function
-; GCN-NEXT: a_function:
+; GCN-NEXT: a_function{{>?}}:
; GCN: s_setpc_b64
; GCN-ASM-NEXT: [[END_LABEL3:\.Lfunc_end.*]]:
; GCN-ASM-NEXT: .size a_function, [[END_LABEL3]]-a_function
diff --git a/llvm/test/CodeGen/ARM/Windows/trivial-gnu-object.ll b/llvm/test/CodeGen/ARM/Windows/trivial-gnu-object.ll
index 2d55f218ddce..06bec29ec3d8 100644
--- a/llvm/test/CodeGen/ARM/Windows/trivial-gnu-object.ll
+++ b/llvm/test/CodeGen/ARM/Windows/trivial-gnu-object.ll
@@ -4,7 +4,7 @@
define void @foo() {
; CHECK: file format coff-arm
-; CHECK-LABEL: foo:
+; CHECK-LABEL: <foo>:
; CHECK: bx lr
ret void
}
diff --git a/llvm/test/CodeGen/ARM/inlineasm-ldr-pseudo.ll b/llvm/test/CodeGen/ARM/inlineasm-ldr-pseudo.ll
index 98665f056a21..da7134530e81 100644
--- a/llvm/test/CodeGen/ARM/inlineasm-ldr-pseudo.ll
+++ b/llvm/test/CodeGen/ARM/inlineasm-ldr-pseudo.ll
@@ -5,7 +5,7 @@
; demonstrate the bug. Going the asm->obj route does not show the issue.
; RUN: llc -mtriple=arm-none-linux < %s -filetype=obj | llvm-objdump -d - | FileCheck %s
; RUN: llc -mtriple=arm-apple-darwin < %s -filetype=obj | llvm-objdump -d - | FileCheck %s
-; CHECK-LABEL: foo:
+; CHECK-LABEL: <{{_?}}foo>:
; CHECK: 0: 00 00 9f e5 ldr r0, [pc]
; CHECK: 4: 0e f0 a0 e1 mov pc, lr
; Make sure the constant pool entry comes after the return
diff --git a/llvm/test/CodeGen/ARM/struct_byval_arm_t1_t2.ll b/llvm/test/CodeGen/ARM/struct_byval_arm_t1_t2.ll
index de53d91e0d85..819662e7beb9 100644
--- a/llvm/test/CodeGen/ARM/struct_byval_arm_t1_t2.ll
+++ b/llvm/test/CodeGen/ARM/struct_byval_arm_t1_t2.ll
@@ -53,11 +53,11 @@ declare void @use_M(%struct.M* byval)
%struct.N = type { [ 128 x i8 ] } ; 128 bytes
declare void @use_N(%struct.N* byval)
-;ARM-LABEL: test_A_1:
-;THUMB2-LABEL: test_A_1:
-;NO_NEON-LABEL:test_A_1:
-;THUMB1-LABEL: test_A_1:
-;T1POST-LABEL: test_A_1:
+;ARM-LABEL: <test_A_1>:
+;THUMB2-LABEL: <test_A_1>:
+;NO_NEON-LABEL:<test_A_1>:
+;THUMB1-LABEL: <test_A_1>:
+;T1POST-LABEL: <test_A_1>:
define void @test_A_1() {
;ARM: ldrb r{{[0-9]+}}, [{{.*}}], #1
@@ -74,11 +74,11 @@ declare void @use_N(%struct.N* byval)
call void @use_A(%struct.A* byval align 1 %a)
ret void
}
-;ARM-LABEL: test_A_2:
-;THUMB2-LABEL: test_A_2:
-;NO_NEON-LABEL:test_A_2:
-;THUMB1-LABEL: test_A_2:
-;T1POST-LABEL: test_A_2:
+;ARM-LABEL: <test_A_2>:
+;THUMB2-LABEL: <test_A_2>:
+;NO_NEON-LABEL:<test_A_2>:
+;THUMB1-LABEL: <test_A_2>:
+;T1POST-LABEL: <test_A_2>:
define void @test_A_2() {
;ARM: ldrh r{{[0-9]+}}, [{{.*}}], #2
@@ -95,11 +95,11 @@ declare void @use_N(%struct.N* byval)
call void @use_A(%struct.A* byval align 2 %a)
ret void
}
-;ARM-LABEL: test_A_4:
-;THUMB2-LABEL: test_A_4:
-;NO_NEON-LABEL:test_A_4:
-;THUMB1-LABEL: test_A_4:
-;T1POST-LABEL: test_A_4:
+;ARM-LABEL: <test_A_4>:
+;THUMB2-LABEL: <test_A_4>:
+;NO_NEON-LABEL:<test_A_4>:
+;THUMB1-LABEL: <test_A_4>:
+;T1POST-LABEL: <test_A_4>:
define void @test_A_4() {
;ARM: ldr r{{[0-9]+}}, [{{.*}}], #4
@@ -116,11 +116,11 @@ declare void @use_N(%struct.N* byval)
call void @use_A(%struct.A* byval align 4 %a)
ret void
}
-;ARM-LABEL: test_A_8:
-;THUMB2-LABEL: test_A_8:
-;NO_NEON-LABEL:test_A_8:
-;THUMB1-LABEL: test_A_8:
-;T1POST-LABEL: test_A_8:
+;ARM-LABEL: <test_A_8>:
+;THUMB2-LABEL: <test_A_8>:
+;NO_NEON-LABEL:<test_A_8>:
+;THUMB1-LABEL: <test_A_8>:
+;T1POST-LABEL: <test_A_8>:
define void @test_A_8() {
;ARM: vld1.32 {d{{[0-9]+}}}, [{{.*}}]!
@@ -138,11 +138,11 @@ declare void @use_N(%struct.N* byval)
call void @use_A(%struct.A* byval align 8 %a)
ret void
}
-;ARM-LABEL: test_A_16:
-;THUMB2-LABEL: test_A_16:
-;NO_NEON-LABEL:test_A_16:
-;THUMB1-LABEL: test_A_16:
-;T1POST-LABEL: test_A_16:
+;ARM-LABEL: <test_A_16>:
+;THUMB2-LABEL: <test_A_16>:
+;NO_NEON-LABEL:<test_A_16>:
+;THUMB1-LABEL: <test_A_16>:
+;T1POST-LABEL: <test_A_16>:
define void @test_A_16() {
;ARM: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [{{.*}}]!
;ARM: ldrb r{{[0-9]+}}, [{{.*}}], #1
@@ -162,11 +162,11 @@ declare void @use_N(%struct.N* byval)
call void @use_A(%struct.A* byval align 16 %a)
ret void
}
-;ARM-LABEL: test_B_1:
-;THUMB2-LABEL: test_B_1:
-;NO_NEON-LABEL:test_B_1:
-;THUMB1-LABEL: test_B_1:
-;T1POST-LABEL: test_B_1:
+;ARM-LABEL: <test_B_1>:
+;THUMB2-LABEL: <test_B_1>:
+;NO_NEON-LABEL:<test_B_1>:
+;THUMB1-LABEL: <test_B_1>:
+;T1POST-LABEL: <test_B_1>:
define void @test_B_1() {
;ARM: ldrb r{{[0-9]+}}, [{{.*}}], #1
@@ -183,11 +183,11 @@ declare void @use_N(%struct.N* byval)
call void @use_B(%struct.B* byval align 1 %a)
ret void
}
-;ARM-LABEL: test_B_2:
-;THUMB2-LABEL: test_B_2:
-;NO_NEON-LABEL:test_B_2:
-;THUMB1-LABEL: test_B_2:
-;T1POST-LABEL: test_B_2:
+;ARM-LABEL: <test_B_2>:
+;THUMB2-LABEL: <test_B_2>:
+;NO_NEON-LABEL:<test_B_2>:
+;THUMB1-LABEL: <test_B_2>:
+;T1POST-LABEL: <test_B_2>:
define void @test_B_2() {
;ARM: ldrh r{{[0-9]+}}, [{{.*}}], #2
;ARM: ldrb r{{[0-9]+}}, [{{.*}}], #1
@@ -208,11 +208,11 @@ declare void @use_N(%struct.N* byval)
call void @use_B(%struct.B* byval align 2 %a)
ret void
}
-;ARM-LABEL: test_B_4:
-;THUMB2-LABEL: test_B_4:
-;NO_NEON-LABEL:test_B_4:
-;THUMB1-LABEL: test_B_4:
-;T1POST-LABEL: test_B_4:
+;ARM-LABEL: <test_B_4>:
+;THUMB2-LABEL: <test_B_4>:
+;NO_NEON-LABEL:<test_B_4>:
+;THUMB1-LABEL: <test_B_4>:
+;T1POST-LABEL: <test_B_4>:
define void @test_B_4() {
;ARM: ldr r{{[0-9]+}}, [{{.*}}], #4
;ARM: ldrb r{{[0-9]+}}, [{{.*}}], #1
@@ -233,11 +233,11 @@ declare void @use_N(%struct.N* byval)
call void @use_B(%struct.B* byval align 4 %a)
ret void
}
-;ARM-LABEL: test_B_8:
-;THUMB2-LABEL: test_B_8:
-;NO_NEON-LABEL:test_B_8:
-;THUMB1-LABEL: test_B_8:
-;T1POST-LABEL: test_B_8:
+;ARM-LABEL: <test_B_8>:
+;THUMB2-LABEL: <test_B_8>:
+;NO_NEON-LABEL:<test_B_8>:
+;THUMB1-LABEL: <test_B_8>:
+;T1POST-LABEL: <test_B_8>:
define void @test_B_8() {
;ARM: vld1.32 {d{{[0-9]+}}}, [{{.*}}]!
;ARM: ldrb r{{[0-9]+}}, [{{.*}}], #1
@@ -259,11 +259,11 @@ declare void @use_N(%struct.N* byval)
call void @use_B(%struct.B* byval align 8 %a)
ret void
}
-;ARM-LABEL: test_B_16:
-;THUMB2-LABEL: test_B_16:
-;NO_NEON-LABEL:test_B_16:
-;THUMB1-LABEL: test_B_16:
-;T1POST-LABEL: test_B_16:
+;ARM-LABEL: <test_B_16>:
+;THUMB2-LABEL: <test_B_16>:
+;NO_NEON-LABEL:<test_B_16>:
+;THUMB1-LABEL: <test_B_16>:
+;T1POST-LABEL: <test_B_16>:
define void @test_B_16() {
;ARM: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [{{.*}}]!
;ARM: ldrb r{{[0-9]+}}, [{{.*}}], #1
@@ -285,11 +285,11 @@ declare void @use_N(%struct.N* byval)
call void @use_B(%struct.B* byval align 16 %a)
ret void
}
-;ARM-LABEL: test_C_1:
-;THUMB2-LABEL: test_C_1:
-;NO_NEON-LABEL:test_C_1:
-;THUMB1-LABEL: test_C_1:
-;T1POST-LABEL: test_C_1:
+;ARM-LABEL: <test_C_1>:
+;THUMB2-LABEL: <test_C_1>:
+;NO_NEON-LABEL:<test_C_1>:
+;THUMB1-LABEL: <test_C_1>:
+;T1POST-LABEL: <test_C_1>:
define void @test_C_1() {
;ARM: ldrb r{{[0-9]+}}, [{{.*}}], #1
@@ -306,11 +306,11 @@ declare void @use_N(%struct.N* byval)
call void @use_C(%struct.C* byval align 1 %a)
ret void
}
-;ARM-LABEL: test_C_2:
-;THUMB2-LABEL: test_C_2:
-;NO_NEON-LABEL:test_C_2:
-;THUMB1-LABEL: test_C_2:
-;T1POST-LABEL: test_C_2:
+;ARM-LABEL: <test_C_2>:
+;THUMB2-LABEL: <test_C_2>:
+;NO_NEON-LABEL:<test_C_2>:
+;THUMB1-LABEL: <test_C_2>:
+;T1POST-LABEL: <test_C_2>:
define void @test_C_2() {
;ARM: ldrh r{{[0-9]+}}, [{{.*}}], #2
;ARM: ldrb r{{[0-9]+}}, [{{.*}}], #1
@@ -331,11 +331,11 @@ declare void @use_N(%struct.N* byval)
call void @use_C(%struct.C* byval align 2 %a)
ret void
}
-;ARM-LABEL: test_C_4:
-;THUMB2-LABEL: test_C_4:
-;NO_NEON-LABEL:test_C_4:
-;THUMB1-LABEL: test_C_4:
-;T1POST-LABEL: test_C_4:
+;ARM-LABEL: <test_C_4>:
+;THUMB2-LABEL: <test_C_4>:
+;NO_NEON-LABEL:<test_C_4>:
+;THUMB1-LABEL: <test_C_4>:
+;T1POST-LABEL: <test_C_4>:
define void @test_C_4() {
;ARM: ldr r{{[0-9]+}}, [{{.*}}], #4
;ARM: ldrb r{{[0-9]+}}, [{{.*}}], #1
@@ -357,11 +357,11 @@ declare void @use_N(%struct.N* byval)
call void @use_C(%struct.C* byval align 4 %a)
ret void
}
-;ARM-LABEL: test_C_8:
-;THUMB2-LABEL: test_C_8:
-;NO_NEON-LABEL:test_C_8:
-;THUMB1-LABEL: test_C_8:
-;T1POST-LABEL: test_C_8:
+;ARM-LABEL: <test_C_8>:
+;THUMB2-LABEL: <test_C_8>:
+;NO_NEON-LABEL:<test_C_8>:
+;THUMB1-LABEL: <test_C_8>:
+;T1POST-LABEL: <test_C_8>:
define void @test_C_8() {
;ARM: vld1.32 {d{{[0-9]+}}}, [{{.*}}]!
;ARM: ldrb r{{[0-9]+}}, [{{.*}}], #1
@@ -384,11 +384,11 @@ declare void @use_N(%struct.N* byval)
call void @use_C(%struct.C* byval align 8 %a)
ret void
}
-;ARM-LABEL: test_C_16:
-;THUMB2-LABEL: test_C_16:
-;NO_NEON-LABEL:test_C_16:
-;THUMB1-LABEL: test_C_16:
-;T1POST-LABEL: test_C_16:
+;ARM-LABEL: <test_C_16>:
+;THUMB2-LABEL: <test_C_16>:
+;NO_NEON-LABEL:<test_C_16>:
+;THUMB1-LABEL: <test_C_16>:
+;T1POST-LABEL: <test_C_16>:
define void @test_C_16() {
;ARM: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [{{.*}}]!
;ARM: ldrb r{{[0-9]+}}, [{{.*}}], #1
@@ -411,11 +411,11 @@ declare void @use_N(%struct.N* byval)
call void @use_C(%struct.C* byval align 16 %a)
ret void
}
-;ARM-LABEL: test_D_1:
-;THUMB2-LABEL: test_D_1:
-;NO_NEON-LABEL:test_D_1:
-;THUMB1-LABEL: test_D_1:
-;T1POST-LABEL: test_D_1:
+;ARM-LABEL: <test_D_1>:
+;THUMB2-LABEL: <test_D_1>:
+;NO_NEON-LABEL:<test_D_1>:
+;THUMB1-LABEL: <test_D_1>:
+;T1POST-LABEL: <test_D_1>:
define void @test_D_1() {
;ARM: ldrb r{{[0-9]+}}, [{{.*}}], #1
;ARM: bne
@@ -436,11 +436,11 @@ declare void @use_N(%struct.N* byval)
call void @use_D(%struct.D* byval align 1 %a)
ret void
}
-;ARM-LABEL: test_D_2:
-;THUMB2-LABEL: test_D_2:
-;NO_NEON-LABEL:test_D_2:
-;THUMB1-LABEL: test_D_2:
-;T1POST-LABEL: test_D_2:
+;ARM-LABEL: <test_D_2>:
+;THUMB2-LABEL: <test_D_2>:
+;NO_NEON-LABEL:<test_D_2>:
+;THUMB1-LABEL: <test_D_2>:
+;T1POST-LABEL: <test_D_2>:
define void @test_D_2() {
;ARM: ldrh r{{[0-9]+}}, [{{.*}}], #2
;ARM: bne
@@ -461,11 +461,11 @@ declare void @use_N(%struct.N* byval)
call void @use_D(%struct.D* byval align 2 %a)
ret void
}
-;ARM-LABEL: test_D_4:
-;THUMB2-LABEL: test_D_4:
-;NO_NEON-LABEL:test_D_4:
-;THUMB1-LABEL: test_D_4:
-;T1POST-LABEL: test_D_4:
+;ARM-LABEL: <test_D_4>:
+;THUMB2-LABEL: <test_D_4>:
+;NO_NEON-LABEL:<test_D_4>:
+;THUMB1-LABEL: <test_D_4>:
+;T1POST-LABEL: <test_D_4>:
define void @test_D_4() {
;ARM: ldr r{{[0-9]+}}, [{{.*}}], #4
;ARM: bne
@@ -486,11 +486,11 @@ declare void @use_N(%struct.N* byval)
call void @use_D(%struct.D* byval align 4 %a)
ret void
}
-;ARM-LABEL: test_D_8:
-;THUMB2-LABEL: test_D_8:
-;NO_NEON-LABEL:test_D_8:
-;THUMB1-LABEL: test_D_8:
-;T1POST-LABEL: test_D_8:
+;ARM-LABEL: <test_D_8>:
+;THUMB2-LABEL: <test_D_8>:
+;NO_NEON-LABEL:<test_D_8>:
+;THUMB1-LABEL: <test_D_8>:
+;T1POST-LABEL: <test_D_8>:
define void @test_D_8() {
;ARM: vld1.32 {d{{[0-9]+}}}, [{{.*}}]!
;ARM: bne
@@ -512,11 +512,11 @@ declare void @use_N(%struct.N* byval)
call void @use_D(%struct.D* byval align 8 %a)
ret void
}
-;ARM-LABEL: test_D_16:
-;THUMB2-LABEL: test_D_16:
-;NO_NEON-LABEL:test_D_16:
-;THUMB1-LABEL: test_D_16:
-;T1POST-LABEL: test_D_16:
+;ARM-LABEL: <test_D_16>:
+;THUMB2-LABEL: <test_D_16>:
+;NO_NEON-LABEL:<test_D_16>:
+;THUMB1-LABEL: <test_D_16>:
+;T1POST-LABEL: <test_D_16>:
define void @test_D_16() {
;ARM: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [{{.*}}]!
;ARM: bne
@@ -538,11 +538,11 @@ declare void @use_N(%struct.N* byval)
call void @use_D(%struct.D* byval align 16 %a)
ret void
}
-;ARM-LABEL: test_E_1:
-;THUMB2-LABEL: test_E_1:
-;NO_NEON-LABEL:test_E_1:
-;THUMB1-LABEL: test_E_1:
-;T1POST-LABEL: test_E_1:
+;ARM-LABEL: <test_E_1>:
+;THUMB2-LABEL: <test_E_1>:
+;NO_NEON-LABEL:<test_E_1>:
+;THUMB1-LABEL: <test_E_1>:
+;T1POST-LABEL: <test_E_1>:
define void @test_E_1() {
;ARM: ldrb r{{[0-9]+}}, [{{.*}}], #1
;ARM: bne
@@ -563,11 +563,11 @@ declare void @use_N(%struct.N* byval)
call void @use_E(%struct.E* byval align 1 %a)
ret void
}
-;ARM-LABEL: test_E_2:
-;THUMB2-LABEL: test_E_2:
-;NO_NEON-LABEL:test_E_2:
-;THUMB1-LABEL: test_E_2:
-;T1POST-LABEL: test_E_2:
+;ARM-LABEL: <test_E_2>:
+;THUMB2-LABEL: <test_E_2>:
+;NO_NEON-LABEL:<test_E_2>:
+;THUMB1-LABEL: <test_E_2>:
+;T1POST-LABEL: <test_E_2>:
define void @test_E_2() {
;ARM: ldrh r{{[0-9]+}}, [{{.*}}], #2
;ARM: bne
@@ -592,11 +592,11 @@ declare void @use_N(%struct.N* byval)
call void @use_E(%struct.E* byval align 2 %a)
ret void
}
-;ARM-LABEL: test_E_4:
-;THUMB2-LABEL: test_E_4:
-;NO_NEON-LABEL:test_E_4:
-;THUMB1-LABEL: test_E_4:
-;T1POST-LABEL: test_E_4:
+;ARM-LABEL: <test_E_4>:
+;THUMB2-LABEL: <test_E_4>:
+;NO_NEON-LABEL:<test_E_4>:
+;THUMB1-LABEL: <test_E_4>:
+;T1POST-LABEL: <test_E_4>:
define void @test_E_4() {
;ARM: ldr r{{[0-9]+}}, [{{.*}}], #4
;ARM: bne
@@ -621,11 +621,11 @@ declare void @use_N(%struct.N* byval)
call void @use_E(%struct.E* byval align 4 %a)
ret void
}
-;ARM-LABEL: test_E_8:
-;THUMB2-LABEL: test_E_8:
-;NO_NEON-LABEL:test_E_8:
-;THUMB1-LABEL: test_E_8:
-;T1POST-LABEL: test_E_8:
+;ARM-LABEL: <test_E_8>:
+;THUMB2-LABEL: <test_E_8>:
+;NO_NEON-LABEL:<test_E_8>:
+;THUMB1-LABEL: <test_E_8>:
+;T1POST-LABEL: <test_E_8>:
define void @test_E_8() {
;ARM: vld1.32 {d{{[0-9]+}}}, [{{.*}}]!
;ARM: bne
@@ -651,11 +651,11 @@ declare void @use_N(%struct.N* byval)
call void @use_E(%struct.E* byval align 8 %a)
ret void
}
-;ARM-LABEL: test_E_16:
-;THUMB2-LABEL: test_E_16:
-;NO_NEON-LABEL:test_E_16:
-;THUMB1-LABEL: test_E_16:
-;T1POST-LABEL: test_E_16:
+;ARM-LABEL: <test_E_16>:
+;THUMB2-LABEL: <test_E_16>:
+;NO_NEON-LABEL:<test_E_16>:
+;THUMB1-LABEL: <test_E_16>:
+;T1POST-LABEL: <test_E_16>:
define void @test_E_16() {
;ARM: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [{{.*}}]!
;ARM: bne
@@ -681,11 +681,11 @@ declare void @use_N(%struct.N* byval)
call void @use_E(%struct.E* byval align 16 %a)
ret void
}
-;ARM-LABEL: test_F_1:
-;THUMB2-LABEL: test_F_1:
-;NO_NEON-LABEL:test_F_1:
-;THUMB1-LABEL: test_F_1:
-;T1POST-LABEL: test_F_1:
+;ARM-LABEL: <test_F_1>:
+;THUMB2-LABEL: <test_F_1>:
+;NO_NEON-LABEL:<test_F_1>:
+;THUMB1-LABEL: <test_F_1>:
+;T1POST-LABEL: <test_F_1>:
define void @test_F_1() {
;ARM: ldrb r{{[0-9]+}}, [{{.*}}], #1
;ARM: bne
@@ -706,11 +706,11 @@ declare void @use_N(%struct.N* byval)
call void @use_F(%struct.F* byval align 1 %a)
ret void
}
-;ARM-LABEL: test_F_2:
-;THUMB2-LABEL: test_F_2:
-;NO_NEON-LABEL:test_F_2:
-;THUMB1-LABEL: test_F_2:
-;T1POST-LABEL: test_F_2:
+;ARM-LABEL: <test_F_2>:
+;THUMB2-LABEL: <test_F_2>:
+;NO_NEON-LABEL:<test_F_2>:
+;THUMB1-LABEL: <test_F_2>:
+;T1POST-LABEL: <test_F_2>:
define void @test_F_2() {
;ARM: ldrh r{{[0-9]+}}, [{{.*}}], #2
;ARM: bne
@@ -735,11 +735,11 @@ declare void @use_N(%struct.N* byval)
call void @use_F(%struct.F* byval align 2 %a)
ret void
}
-;ARM-LABEL: test_F_4:
-;THUMB2-LABEL: test_F_4:
-;NO_NEON-LABEL:test_F_4:
-;THUMB1-LABEL: test_F_4:
-;T1POST-LABEL: test_F_4:
+;ARM-LABEL: <test_F_4>:
+;THUMB2-LABEL: <test_F_4>:
+;NO_NEON-LABEL:<test_F_4>:
+;THUMB1-LABEL: <test_F_4>:
+;T1POST-LABEL: <test_F_4>:
define void @test_F_4() {
;ARM: ldr r{{[0-9]+}}, [{{.*}}], #4
;ARM: bne
@@ -765,11 +765,11 @@ declare void @use_N(%struct.N* byval)
call void @use_F(%struct.F* byval align 4 %a)
ret void
}
-;ARM-LABEL: test_F_8:
-;THUMB2-LABEL: test_F_8:
-;NO_NEON-LABEL:test_F_8:
-;THUMB1-LABEL: test_F_8:
-;T1POST-LABEL: test_F_8:
+;ARM-LABEL: <test_F_8>:
+;THUMB2-LABEL: <test_F_8>:
+;NO_NEON-LABEL:<test_F_8>:
+;THUMB1-LABEL: <test_F_8>:
+;T1POST-LABEL: <test_F_8>:
define void @test_F_8() {
;ARM: vld1.32 {d{{[0-9]+}}}, [{{.*}}]!
;ARM: bne
@@ -796,11 +796,11 @@ declare void @use_N(%struct.N* byval)
call void @use_F(%struct.F* byval align 8 %a)
ret void
}
-;ARM-LABEL: test_F_16:
-;THUMB2-LABEL: test_F_16:
-;NO_NEON-LABEL:test_F_16:
-;THUMB1-LABEL: test_F_16:
-;T1POST-LABEL: test_F_16:
+;ARM-LABEL: <test_F_16>:
+;THUMB2-LABEL: <test_F_16>:
+;NO_NEON-LABEL:<test_F_16>:
+;THUMB1-LABEL: <test_F_16>:
+;T1POST-LABEL: <test_F_16>:
define void @test_F_16() {
;ARM: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [{{.*}}]!
;ARM: bne
@@ -827,11 +827,11 @@ declare void @use_N(%struct.N* byval)
call void @use_F(%struct.F* byval align 16 %a)
ret void
}
-;ARM-LABEL: test_G_1:
-;THUMB2-LABEL: test_G_1:
-;NO_NEON-LABEL:test_G_1:
-;THUMB1-LABEL: test_G_1:
-;T1POST-LABEL: test_G_1:
+;ARM-LABEL: <test_G_1>:
+;THUMB2-LABEL: <test_G_1>:
+;NO_NEON-LABEL:<test_G_1>:
+;THUMB1-LABEL: <test_G_1>:
+;T1POST-LABEL: <test_G_1>:
define void @test_G_1() {
;ARM: ldrb r{{[0-9]+}}, [{{.*}}], #1
@@ -848,11 +848,11 @@ declare void @use_N(%struct.N* byval)
call void @use_G(%struct.G* byval align 1 %a)
ret void
}
-;ARM-LABEL: test_G_2:
-;THUMB2-LABEL: test_G_2:
-;NO_NEON-LABEL:test_G_2:
-;THUMB1-LABEL: test_G_2:
-;T1POST-LABEL: test_G_2:
+;ARM-LABEL: <test_G_2>:
+;THUMB2-LABEL: <test_G_2>:
+;NO_NEON-LABEL:<test_G_2>:
+;THUMB1-LABEL: <test_G_2>:
+;T1POST-LABEL: <test_G_2>:
define void @test_G_2() {
;ARM: ldrh r{{[0-9]+}}, [{{.*}}], #2
@@ -869,11 +869,11 @@ declare void @use_N(%struct.N* byval)
call void @use_G(%struct.G* byval align 2 %a)
ret void
}
-;ARM-LABEL: test_G_4:
-;THUMB2-LABEL: test_G_4:
-;NO_NEON-LABEL:test_G_4:
-;THUMB1-LABEL: test_G_4:
-;T1POST-LABEL: test_G_4:
+;ARM-LABEL: <test_G_4>:
+;THUMB2-LABEL: <test_G_4>:
+;NO_NEON-LABEL:<test_G_4>:
+;THUMB1-LABEL: <test_G_4>:
+;T1POST-LABEL: <test_G_4>:
define void @test_G_4() {
;ARM: ldr r{{[0-9]+}}, [{{.*}}], #4
@@ -890,11 +890,11 @@ declare void @use_N(%struct.N* byval)
call void @use_G(%struct.G* byval align 4 %a)
ret void
}
-;ARM-LABEL: test_G_8:
-;THUMB2-LABEL: test_G_8:
-;NO_NEON-LABEL:test_G_8:
-;THUMB1-LABEL: test_G_8:
-;T1POST-LABEL: test_G_8:
+;ARM-LABEL: <test_G_8>:
+;THUMB2-LABEL: <test_G_8>:
+;NO_NEON-LABEL:<test_G_8>:
+;THUMB1-LABEL: <test_G_8>:
+;T1POST-LABEL: <test_G_8>:
define void @test_G_8() {
;ARM: vld1.32 {d{{[0-9]+}}}, [{{.*}}]!
@@ -912,11 +912,11 @@ declare void @use_N(%struct.N* byval)
call void @use_G(%struct.G* byval align 8 %a)
ret void
}
-;ARM-LABEL: test_G_16:
-;THUMB2-LABEL: test_G_16:
-;NO_NEON-LABEL:test_G_16:
-;THUMB1-LABEL: test_G_16:
-;T1POST-LABEL: test_G_16:
+;ARM-LABEL: <test_G_16>:
+;THUMB2-LABEL: <test_G_16>:
+;NO_NEON-LABEL:<test_G_16>:
+;THUMB1-LABEL: <test_G_16>:
+;T1POST-LABEL: <test_G_16>:
define void @test_G_16() {
;ARM: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [{{.*}}]!
@@ -934,11 +934,11 @@ declare void @use_N(%struct.N* byval)
call void @use_G(%struct.G* byval align 16 %a)
ret void
}
-;ARM-LABEL: test_H_1:
-;THUMB2-LABEL: test_H_1:
-;NO_NEON-LABEL:test_H_1:
-;THUMB1-LABEL: test_H_1:
-;T1POST-LABEL: test_H_1:
+;ARM-LABEL: <test_H_1>:
+;THUMB2-LABEL: <test_H_1>:
+;NO_NEON-LABEL:<test_H_1>:
+;THUMB1-LABEL: <test_H_1>:
+;T1POST-LABEL: <test_H_1>:
define void @test_H_1() {
;ARM: ldrb r{{[0-9]+}}, [{{.*}}], #1
@@ -955,11 +955,11 @@ declare void @use_N(%struct.N* byval)
call void @use_H(%struct.H* byval align 1 %a)
ret void
}
-;ARM-LABEL: test_H_2:
-;THUMB2-LABEL: test_H_2:
-;NO_NEON-LABEL:test_H_2:
-;THUMB1-LABEL: test_H_2:
-;T1POST-LABEL: test_H_2:
+;ARM-LABEL: <test_H_2>:
+;THUMB2-LABEL: <test_H_2>:
+;NO_NEON-LABEL:<test_H_2>:
+;THUMB1-LABEL: <test_H_2>:
+;T1POST-LABEL: <test_H_2>:
define void @test_H_2() {
;ARM: ldrh r{{[0-9]+}}, [{{.*}}], #2
@@ -976,11 +976,11 @@ declare void @use_N(%struct.N* byval)
call void @use_H(%struct.H* byval align 2 %a)
ret void
}
-;ARM-LABEL: test_H_4:
-;THUMB2-LABEL: test_H_4:
-;NO_NEON-LABEL:test_H_4:
-;THUMB1-LABEL: test_H_4:
-;T1POST-LABEL: test_H_4:
+;ARM-LABEL: <test_H_4>:
+;THUMB2-LABEL: <test_H_4>:
+;NO_NEON-LABEL:<test_H_4>:
+;THUMB1-LABEL: <test_H_4>:
+;T1POST-LABEL: <test_H_4>:
define void @test_H_4() {
;ARM: ldr r{{[0-9]+}}, [{{.*}}], #4
@@ -997,11 +997,11 @@ declare void @use_N(%struct.N* byval)
call void @use_H(%struct.H* byval align 4 %a)
ret void
}
-;ARM-LABEL: test_H_8:
-;THUMB2-LABEL: test_H_8:
-;NO_NEON-LABEL:test_H_8:
-;THUMB1-LABEL: test_H_8:
-;T1POST-LABEL: test_H_8:
+;ARM-LABEL: <test_H_8>:
+;THUMB2-LABEL: <test_H_8>:
+;NO_NEON-LABEL:<test_H_8>:
+;THUMB1-LABEL: <test_H_8>:
+;T1POST-LABEL: <test_H_8>:
define void @test_H_8() {
;ARM: vld1.32 {d{{[0-9]+}}}, [{{.*}}]!
@@ -1019,11 +1019,11 @@ declare void @use_N(%struct.N* byval)
call void @use_H(%struct.H* byval align 8 %a)
ret void
}
-;ARM-LABEL: test_H_16:
-;THUMB2-LABEL: test_H_16:
-;NO_NEON-LABEL:test_H_16:
-;THUMB1-LABEL: test_H_16:
-;T1POST-LABEL: test_H_16:
+;ARM-LABEL: <test_H_16>:
+;THUMB2-LABEL: <test_H_16>:
+;NO_NEON-LABEL:<test_H_16>:
+;THUMB1-LABEL: <test_H_16>:
+;T1POST-LABEL: <test_H_16>:
define void @test_H_16() {
;ARM: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [{{.*}}]!
@@ -1041,11 +1041,11 @@ declare void @use_N(%struct.N* byval)
call void @use_H(%struct.H* byval align 16 %a)
ret void
}
-;ARM-LABEL: test_I_1:
-;THUMB2-LABEL: test_I_1:
-;NO_NEON-LABEL:test_I_1:
-;THUMB1-LABEL: test_I_1:
-;T1POST-LABEL: test_I_1:
+;ARM-LABEL: <test_I_1>:
+;THUMB2-LABEL: <test_I_1>:
+;NO_NEON-LABEL:<test_I_1>:
+;THUMB1-LABEL: <test_I_1>:
+;T1POST-LABEL: <test_I_1>:
define void @test_I_1() {
;ARM: ldrb r{{[0-9]+}}, [{{.*}}], #1
@@ -1062,11 +1062,11 @@ declare void @use_N(%struct.N* byval)
call void @use_I(%struct.I* byval align 1 %a)
ret void
}
-;ARM-LABEL: test_I_2:
-;THUMB2-LABEL: test_I_2:
-;NO_NEON-LABEL:test_I_2:
-;THUMB1-LABEL: test_I_2:
-;T1POST-LABEL: test_I_2:
+;ARM-LABEL: <test_I_2>:
+;THUMB2-LABEL: <test_I_2>:
+;NO_NEON-LABEL:<test_I_2>:
+;THUMB1-LABEL: <test_I_2>:
+;T1POST-LABEL: <test_I_2>:
define void @test_I_2() {
;ARM: ldrh r{{[0-9]+}}, [{{.*}}], #2
@@ -1083,11 +1083,11 @@ declare void @use_N(%struct.N* byval)
call void @use_I(%struct.I* byval align 2 %a)
ret void
}
-;ARM-LABEL: test_I_4:
-;THUMB2-LABEL: test_I_4:
-;NO_NEON-LABEL:test_I_4:
-;THUMB1-LABEL: test_I_4:
-;T1POST-LABEL: test_I_4:
+;ARM-LABEL: <test_I_4>:
+;THUMB2-LABEL: <test_I_4>:
+;NO_NEON-LABEL:<test_I_4>:
+;THUMB1-LABEL: <test_I_4>:
+;T1POST-LABEL: <test_I_4>:
define void @test_I_4() {
;ARM: ldr r{{[0-9]+}}, [{{.*}}], #4
@@ -1104,11 +1104,11 @@ declare void @use_N(%struct.N* byval)
call void @use_I(%struct.I* byval align 4 %a)
ret void
}
-;ARM-LABEL: test_I_8:
-;THUMB2-LABEL: test_I_8:
-;NO_NEON-LABEL:test_I_8:
-;THUMB1-LABEL: test_I_8:
-;T1POST-LABEL: test_I_8:
+;ARM-LABEL: <test_I_8>:
+;THUMB2-LABEL: <test_I_8>:
+;NO_NEON-LABEL:<test_I_8>:
+;THUMB1-LABEL: <test_I_8>:
+;T1POST-LABEL: <test_I_8>:
define void @test_I_8() {
;ARM: vld1.32 {d{{[0-9]+}}}, [{{.*}}]!
@@ -1126,11 +1126,11 @@ declare void @use_N(%struct.N* byval)
call void @use_I(%struct.I* byval align 8 %a)
ret void
}
-;ARM-LABEL: test_I_16:
-;THUMB2-LABEL: test_I_16:
-;NO_NEON-LABEL:test_I_16:
-;THUMB1-LABEL: test_I_16:
-;T1POST-LABEL: test_I_16:
+;ARM-LABEL: <test_I_16>:
+;THUMB2-LABEL: <test_I_16>:
+;NO_NEON-LABEL:<test_I_16>:
+;THUMB1-LABEL: <test_I_16>:
+;T1POST-LABEL: <test_I_16>:
define void @test_I_16() {
;ARM: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [{{.*}}]!
@@ -1148,11 +1148,11 @@ declare void @use_N(%struct.N* byval)
call void @use_I(%struct.I* byval align 16 %a)
ret void
}
-;ARM-LABEL: test_J_1:
-;THUMB2-LABEL: test_J_1:
-;NO_NEON-LABEL:test_J_1:
-;THUMB1-LABEL: test_J_1:
-;T1POST-LABEL: test_J_1:
+;ARM-LABEL: <test_J_1>:
+;THUMB2-LABEL: <test_J_1>:
+;NO_NEON-LABEL:<test_J_1>:
+;THUMB1-LABEL: <test_J_1>:
+;T1POST-LABEL: <test_J_1>:
define void @test_J_1() {
;ARM: ldrb r{{[0-9]+}}, [{{.*}}], #1
;ARM: bne
@@ -1173,11 +1173,11 @@ declare void @use_N(%struct.N* byval)
call void @use_J(%struct.J* byval align 1 %a)
ret void
}
-;ARM-LABEL: test_J_2:
-;THUMB2-LABEL: test_J_2:
-;NO_NEON-LABEL:test_J_2:
-;THUMB1-LABEL: test_J_2:
-;T1POST-LABEL: test_J_2:
+;ARM-LABEL: <test_J_2>:
+;THUMB2-LABEL: <test_J_2>:
+;NO_NEON-LABEL:<test_J_2>:
+;THUMB1-LABEL: <test_J_2>:
+;T1POST-LABEL: <test_J_2>:
define void @test_J_2() {
;ARM: ldrh r{{[0-9]+}}, [{{.*}}], #2
;ARM: bne
@@ -1198,11 +1198,11 @@ declare void @use_N(%struct.N* byval)
call void @use_J(%struct.J* byval align 2 %a)
ret void
}
-;ARM-LABEL: test_J_4:
-;THUMB2-LABEL: test_J_4:
-;NO_NEON-LABEL:test_J_4:
-;THUMB1-LABEL: test_J_4:
-;T1POST-LABEL: test_J_4:
+;ARM-LABEL: <test_J_4>:
+;THUMB2-LABEL: <test_J_4>:
+;NO_NEON-LABEL:<test_J_4>:
+;THUMB1-LABEL: <test_J_4>:
+;T1POST-LABEL: <test_J_4>:
define void @test_J_4() {
;ARM: ldr r{{[0-9]+}}, [{{.*}}], #4
;ARM: bne
@@ -1223,11 +1223,11 @@ declare void @use_N(%struct.N* byval)
call void @use_J(%struct.J* byval align 4 %a)
ret void
}
-;ARM-LABEL: test_J_8:
-;THUMB2-LABEL: test_J_8:
-;NO_NEON-LABEL:test_J_8:
-;THUMB1-LABEL: test_J_8:
-;T1POST-LABEL: test_J_8:
+;ARM-LABEL: <test_J_8>:
+;THUMB2-LABEL: <test_J_8>:
+;NO_NEON-LABEL:<test_J_8>:
+;THUMB1-LABEL: <test_J_8>:
+;T1POST-LABEL: <test_J_8>:
define void @test_J_8() {
;ARM: vld1.32 {d{{[0-9]+}}}, [{{.*}}]!
;ARM: bne
@@ -1249,11 +1249,11 @@ declare void @use_N(%struct.N* byval)
call void @use_J(%struct.J* byval align 8 %a)
ret void
}
-;ARM-LABEL: test_J_16:
-;THUMB2-LABEL: test_J_16:
-;NO_NEON-LABEL:test_J_16:
-;THUMB1-LABEL: test_J_16:
-;T1POST-LABEL: test_J_16:
+;ARM-LABEL: <test_J_16>:
+;THUMB2-LABEL: <test_J_16>:
+;NO_NEON-LABEL:<test_J_16>:
+;THUMB1-LABEL: <test_J_16>:
+;T1POST-LABEL: <test_J_16>:
define void @test_J_16() {
;ARM: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [{{.*}}]!
;ARM: bne
@@ -1275,11 +1275,11 @@ declare void @use_N(%struct.N* byval)
call void @use_J(%struct.J* byval align 16 %a)
ret void
}
-;ARM-LABEL: test_K_1:
-;THUMB2-LABEL: test_K_1:
-;NO_NEON-LABEL:test_K_1:
-;THUMB1-LABEL: test_K_1:
-;T1POST-LABEL: test_K_1:
+;ARM-LABEL: <test_K_1>:
+;THUMB2-LABEL: <test_K_1>:
+;NO_NEON-LABEL:<test_K_1>:
+;THUMB1-LABEL: <test_K_1>:
+;T1POST-LABEL: <test_K_1>:
define void @test_K_1() {
;ARM: ldrb r{{[0-9]+}}, [{{.*}}], #1
;ARM: bne
@@ -1300,11 +1300,11 @@ declare void @use_N(%struct.N* byval)
call void @use_K(%struct.K* byval align 1 %a)
ret void
}
-;ARM-LABEL: test_K_2:
-;THUMB2-LABEL: test_K_2:
-;NO_NEON-LABEL:test_K_2:
-;THUMB1-LABEL: test_K_2:
-;T1POST-LABEL: test_K_2:
+;ARM-LABEL: <test_K_2>:
+;THUMB2-LABEL: <test_K_2>:
+;NO_NEON-LABEL:<test_K_2>:
+;THUMB1-LABEL: <test_K_2>:
+;T1POST-LABEL: <test_K_2>:
define void @test_K_2() {
;ARM: ldrh r{{[0-9]+}}, [{{.*}}], #2
;ARM: bne
@@ -1325,11 +1325,11 @@ declare void @use_N(%struct.N* byval)
call void @use_K(%struct.K* byval align 2 %a)
ret void
}
-;ARM-LABEL: test_K_4:
-;THUMB2-LABEL: test_K_4:
-;NO_NEON-LABEL:test_K_4:
-;THUMB1-LABEL: test_K_4:
-;T1POST-LABEL: test_K_4:
+;ARM-LABEL: <test_K_4>:
+;THUMB2-LABEL: <test_K_4>:
+;NO_NEON-LABEL:<test_K_4>:
+;THUMB1-LABEL: <test_K_4>:
+;T1POST-LABEL: <test_K_4>:
define void @test_K_4() {
;ARM: ldr r{{[0-9]+}}, [{{.*}}], #4
;ARM: bne
@@ -1350,11 +1350,11 @@ declare void @use_N(%struct.N* byval)
call void @use_K(%struct.K* byval align 4 %a)
ret void
}
-;ARM-LABEL: test_K_8:
-;THUMB2-LABEL: test_K_8:
-;NO_NEON-LABEL:test_K_8:
-;THUMB1-LABEL: test_K_8:
-;T1POST-LABEL: test_K_8:
+;ARM-LABEL: <test_K_8>:
+;THUMB2-LABEL: <test_K_8>:
+;NO_NEON-LABEL:<test_K_8>:
+;THUMB1-LABEL: <test_K_8>:
+;T1POST-LABEL: <test_K_8>:
define void @test_K_8() {
;ARM: vld1.32 {d{{[0-9]+}}}, [{{.*}}]!
;ARM: bne
@@ -1376,11 +1376,11 @@ declare void @use_N(%struct.N* byval)
call void @use_K(%struct.K* byval align 8 %a)
ret void
}
-;ARM-LABEL: test_K_16:
-;THUMB2-LABEL: test_K_16:
-;NO_NEON-LABEL:test_K_16:
-;THUMB1-LABEL: test_K_16:
-;T1POST-LABEL: test_K_16:
+;ARM-LABEL: <test_K_16>:
+;THUMB2-LABEL: <test_K_16>:
+;NO_NEON-LABEL:<test_K_16>:
+;THUMB1-LABEL: <test_K_16>:
+;T1POST-LABEL: <test_K_16>:
define void @test_K_16() {
;ARM: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [{{.*}}]!
;ARM: bne
@@ -1402,11 +1402,11 @@ declare void @use_N(%struct.N* byval)
call void @use_K(%struct.K* byval align 16 %a)
ret void
}
-;ARM-LABEL: test_L_1:
-;THUMB2-LABEL: test_L_1:
-;NO_NEON-LABEL:test_L_1:
-;THUMB1-LABEL: test_L_1:
-;T1POST-LABEL: test_L_1:
+;ARM-LABEL: <test_L_1>:
+;THUMB2-LABEL: <test_L_1>:
+;NO_NEON-LABEL:<test_L_1>:
+;THUMB1-LABEL: <test_L_1>:
+;T1POST-LABEL: <test_L_1>:
define void @test_L_1() {
;ARM: ldrb r{{[0-9]+}}, [{{.*}}], #1
;ARM: bne
@@ -1427,11 +1427,11 @@ declare void @use_N(%struct.N* byval)
call void @use_L(%struct.L* byval align 1 %a)
ret void
}
-;ARM-LABEL: test_L_2:
-;THUMB2-LABEL: test_L_2:
-;NO_NEON-LABEL:test_L_2:
-;THUMB1-LABEL: test_L_2:
-;T1POST-LABEL: test_L_2:
+;ARM-LABEL: <test_L_2>:
+;THUMB2-LABEL: <test_L_2>:
+;NO_NEON-LABEL:<test_L_2>:
+;THUMB1-LABEL: <test_L_2>:
+;T1POST-LABEL: <test_L_2>:
define void @test_L_2() {
;ARM: ldrh r{{[0-9]+}}, [{{.*}}], #2
;ARM: bne
@@ -1452,11 +1452,11 @@ declare void @use_N(%struct.N* byval)
call void @use_L(%struct.L* byval align 2 %a)
ret void
}
-;ARM-LABEL: test_L_4:
-;THUMB2-LABEL: test_L_4:
-;NO_NEON-LABEL:test_L_4:
-;THUMB1-LABEL: test_L_4:
-;T1POST-LABEL: test_L_4:
+;ARM-LABEL: <test_L_4>:
+;THUMB2-LABEL: <test_L_4>:
+;NO_NEON-LABEL:<test_L_4>:
+;THUMB1-LABEL: <test_L_4>:
+;T1POST-LABEL: <test_L_4>:
define void @test_L_4() {
;ARM: ldr r{{[0-9]+}}, [{{.*}}], #4
;ARM: bne
@@ -1477,11 +1477,11 @@ declare void @use_N(%struct.N* byval)
call void @use_L(%struct.L* byval align 4 %a)
ret void
}
-;ARM-LABEL: test_L_8:
-;THUMB2-LABEL: test_L_8:
-;NO_NEON-LABEL:test_L_8:
-;THUMB1-LABEL: test_L_8:
-;T1POST-LABEL: test_L_8:
+;ARM-LABEL: <test_L_8>:
+;THUMB2-LABEL: <test_L_8>:
+;NO_NEON-LABEL:<test_L_8>:
+;THUMB1-LABEL: <test_L_8>:
+;T1POST-LABEL: <test_L_8>:
define void @test_L_8() {
;ARM: vld1.32 {d{{[0-9]+}}}, [{{.*}}]!
;ARM: bne
@@ -1503,11 +1503,11 @@ declare void @use_N(%struct.N* byval)
call void @use_L(%struct.L* byval align 8 %a)
ret void
}
-;ARM-LABEL: test_L_16:
-;THUMB2-LABEL: test_L_16:
-;NO_NEON-LABEL:test_L_16:
-;THUMB1-LABEL: test_L_16:
-;T1POST-LABEL: test_L_16:
+;ARM-LABEL: <test_L_16>:
+;THUMB2-LABEL: <test_L_16>:
+;NO_NEON-LABEL:<test_L_16>:
+;THUMB1-LABEL: <test_L_16>:
+;T1POST-LABEL: <test_L_16>:
define void @test_L_16() {
;ARM: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [{{.*}}]!
;ARM: bne
@@ -1529,7 +1529,7 @@ declare void @use_N(%struct.N* byval)
call void @use_L(%struct.L* byval align 16 %a)
ret void
}
-;V8MBASE-LABEL: test_M:
+;V8MBASE-LABEL: <test_M>:
define void @test_M() {
;V8MBASE: ldrb r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}}
@@ -1540,7 +1540,7 @@ declare void @use_N(%struct.N* byval)
call void @use_M(%struct.M* byval align 1 %a)
ret void
}
-;V8MBASE-LABEL: test_N:
+;V8MBASE-LABEL: <test_N>:
define void @test_N() {
;V8MBASE: movw r{{[0-9]+}}, #{{[0-9]+}}
diff --git a/llvm/test/CodeGen/ARM/thumb1-varalloc.ll b/llvm/test/CodeGen/ARM/thumb1-varalloc.ll
index 0e8b6c098969..8d56fe1da90d 100644
--- a/llvm/test/CodeGen/ARM/thumb1-varalloc.ll
+++ b/llvm/test/CodeGen/ARM/thumb1-varalloc.ll
@@ -9,7 +9,7 @@
; rdar://8819685
define i8* @_foo() {
entry:
-; CHECK-LABEL: foo:
+; CHECK-LABEL: __foo{{>?}}:
%size = alloca i32, align 4
%0 = load i8*, i8** @__bar, align 4
@@ -46,7 +46,7 @@ declare i32 @_called_func(i8*, i32*) nounwind
; Simple variable ending up *at* sp.
define void @test_simple_var() {
-; CHECK-LABEL: test_simple_var:
+; CHECK-LABEL: test_simple_var{{>?}}:
%addr32 = alloca i32
%addr8 = bitcast i32* %addr32 to i8*
@@ -60,7 +60,7 @@ define void @test_simple_var() {
; Simple variable ending up at aligned offset from sp.
define void @test_local_var_addr_aligned() {
-; CHECK-LABEL: test_local_var_addr_aligned:
+; CHECK-LABEL: test_local_var_addr_aligned{{>?}}:
%addr1.32 = alloca i32
%addr1 = bitcast i32* %addr1.32 to i8*
@@ -81,7 +81,7 @@ define void @test_local_var_addr_aligned() {
; Simple variable ending up at aligned offset from sp.
define void @test_local_var_big_offset() {
-; CHECK-LABEL: test_local_var_big_offset:
+; CHECK-LABEL: test_local_var_big_offset{{>?}}:
%addr1.32 = alloca i32, i32 257
%addr1 = bitcast i32* %addr1.32 to i8*
%addr2.32 = alloca i32, i32 257
diff --git a/llvm/test/CodeGen/ARM/wrong-t2stmia-size-opt.ll b/llvm/test/CodeGen/ARM/wrong-t2stmia-size-opt.ll
index fe335df7a1ad..252e98bf4e73 100644
--- a/llvm/test/CodeGen/ARM/wrong-t2stmia-size-opt.ll
+++ b/llvm/test/CodeGen/ARM/wrong-t2stmia-size-opt.ll
@@ -20,5 +20,5 @@ define i32* @wrong-t2stmia-size-reduction(i32* %addr, i32 %val0, i32 %val1) mins
; Check that stm writes three registers. The bug caused one of registers (LR,
; which invalid for Thumb1 form of STMIA instruction) to be dropped.
-; CHECK-LABEL: wrong-t2stmia-size-reduction:
+; CHECK-LABEL: <wrong-t2stmia-size-reduction>:
; CHECK: stm{{[^,]*}}, {{{.*,.*,.*}}}
diff --git a/llvm/test/CodeGen/BPF/objdump_cond_op.ll b/llvm/test/CodeGen/BPF/objdump_cond_op.ll
index b9dc122fe209..d6f575f1a6a8 100644
--- a/llvm/test/CodeGen/BPF/objdump_cond_op.ll
+++ b/llvm/test/CodeGen/BPF/objdump_cond_op.ll
@@ -44,7 +44,7 @@ define i32 @test(i32, i32) local_unnamed_addr #0 {
%12 = shl nsw i32 %10, 2
br label %13
-; CHECK-LABEL: LBB0_2:
+; CHECK-LABEL: <LBB0_2>:
; CHECK: r3 = 0 ll
; CHECK: r0 = *(u32 *)(r3 + 0)
; CHECK: r2 <<= 32
@@ -56,14 +56,14 @@ define i32 @test(i32, i32) local_unnamed_addr #0 {
%14 = phi i32 [ %12, %11 ], [ %7, %4 ]
store i32 %14, i32* @gbl, align 4
br label %15
-; CHECK-LABEL: LBB0_4:
+; CHECK-LABEL: <LBB0_4>:
; CHECK: r1 = 0 ll
; CHECK: *(u32 *)(r1 + 0) = r0
; <label>:15: ; preds = %8, %13
%16 = phi i32 [ %14, %13 ], [ %10, %8 ]
ret i32 %16
-; CHECK-LABEL: LBB0_5:
+; CHECK-LABEL: <LBB0_5>:
; CHECK: exit
}
attributes #0 = { norecurse nounwind }
diff --git a/llvm/test/CodeGen/BPF/objdump_cond_op_2.ll b/llvm/test/CodeGen/BPF/objdump_cond_op_2.ll
index 618fb6ce1870..0695f231e01a 100644
--- a/llvm/test/CodeGen/BPF/objdump_cond_op_2.ll
+++ b/llvm/test/CodeGen/BPF/objdump_cond_op_2.ll
@@ -8,7 +8,7 @@
; }
define i32 @test(i32, i32) local_unnamed_addr #0 {
-; CHECK-LABEL: test:
+; CHECK-LABEL: <test>:
%3 = icmp slt i32 %0, %1
br i1 %3, label %4, label %13
@@ -16,7 +16,7 @@ define i32 @test(i32, i32) local_unnamed_addr #0 {
br label %5
; CHECK: if r4 s>= r3 goto +11 <LBB0_3>
; CHECK: r0 = 0
-; CHECK-LABEL: LBB0_2:
+; CHECK-LABEL: <LBB0_2>:
; <label>:5: ; preds = %4, %5
%6 = phi i32 [ %9, %5 ], [ 0, %4 ]
@@ -33,7 +33,7 @@ define i32 @test(i32, i32) local_unnamed_addr #0 {
; <label>:13: ; preds = %5, %2
%14 = phi i32 [ 0, %2 ], [ %9, %5 ]
ret i32 %14
-; CHECK-LABEL: LBB0_3:
+; CHECK-LABEL: <LBB0_3>:
; CHECK: exit
}
attributes #0 = { norecurse nounwind readnone }
diff --git a/llvm/test/CodeGen/BPF/objdump_two_funcs.ll b/llvm/test/CodeGen/BPF/objdump_two_funcs.ll
index d129b3fa1d03..a05a54c192ba 100644
--- a/llvm/test/CodeGen/BPF/objdump_two_funcs.ll
+++ b/llvm/test/CodeGen/BPF/objdump_two_funcs.ll
@@ -16,7 +16,7 @@
; Function Attrs: norecurse nounwind readnone
define dso_local i32 @func1(i32 %a) local_unnamed_addr #0 section "s1" !dbg !7 {
entry:
-; CHECK: func1:
+; CHECK: <func1>:
call void @llvm.dbg.value(metadata i32 %a, metadata !12, metadata !DIExpression()), !dbg !13
%mul = mul nsw i32 %a, %a, !dbg !14
ret i32 %mul, !dbg !15
@@ -26,7 +26,7 @@ entry:
; Function Attrs: norecurse nounwind readnone
define dso_local i32 @func2(i32 %a) local_unnamed_addr #0 section "s2" !dbg !16 {
entry:
-; CHECK: func2:
+; CHECK: <func2>:
call void @llvm.dbg.value(metadata i32 %a, metadata !18, metadata !DIExpression()), !dbg !19
%mul = mul nsw i32 %a, %a, !dbg !20
%mul1 = mul nsw i32 %mul, %a, !dbg !21
diff --git a/llvm/test/CodeGen/Hexagon/S3_2op.ll b/llvm/test/CodeGen/Hexagon/S3_2op.ll
index 716381ef7e26..c3855cb2197d 100644
--- a/llvm/test/CodeGen/Hexagon/S3_2op.ll
+++ b/llvm/test/CodeGen/Hexagon/S3_2op.ll
@@ -1,6 +1,6 @@
; RUN: llc -march=hexagon -filetype=obj < %s -o - | llvm-objdump -d - | FileCheck %s
-; CHECK-LABEL: f0:
+; CHECK-LABEL: <f0>:
; CHECK: r{{[1-9]}}:{{[0-9]}} = abs(r{{[1-9]}}:{{[0-9]}})
define double @f0(double %a0) #0 {
b0:
@@ -15,7 +15,7 @@ b0:
declare i64 @llvm.hexagon.A2.absp(i64) #1
-; CHECK-LABEL: f1:
+; CHECK-LABEL: <f1>:
; CHECK: r{{[1-9]}}:{{[0-9]}} = neg(r{{[1-9]}}:{{[0-9]}})
define double @f1(double %a0) #0 {
b0:
@@ -30,7 +30,7 @@ b0:
declare i64 @llvm.hexagon.A2.negp(i64) #1
-; CHECK-LABEL: f2:
+; CHECK-LABEL: <f2>:
; CHECK: r{{[1-9]}}:{{[0-9]}} = not(r{{[1-9]}}:{{[0-9]}})
define double @f2(double %a0) #0 {
b0:
@@ -45,7 +45,7 @@ b0:
declare i64 @llvm.hexagon.A2.notp(i64) #1
-; CHECK-LABEL: f3:
+; CHECK-LABEL: <f3>:
; CHECK: r{{[1-9]}}:{{[0-9]}} = interleave(r{{[1-9]}}:{{[0-9]}})
define double @f3(double %a0) #0 {
b0:
@@ -60,7 +60,7 @@ b0:
declare i64 @llvm.hexagon.S2.interleave(i64) #1
-; CHECK-LABEL: f4:
+; CHECK-LABEL: <f4>:
; CHECK: r{{[1-9]}}:{{[0-9]}} = deinterleave(r{{[1-9]}}:{{[0-9]}})
define double @f4(double %a0) #0 {
b0:
@@ -75,7 +75,7 @@ b0:
declare i64 @llvm.hexagon.S2.deinterleave(i64) #1
-; CHECK-LABEL: f5:
+; CHECK-LABEL: <f5>:
; CHECK: r{{[1-9]}}:{{[0-9]}} = vconj(r{{[1-9]}}:{{[0-9]}}):sat
define double @f5(double %a0) #0 {
b0:
@@ -90,7 +90,7 @@ b0:
declare i64 @llvm.hexagon.A2.vconj(i64) #1
-; CHECK-LABEL: f6:
+; CHECK-LABEL: <f6>:
; CHECK: r{{[1-9]}}:{{[0-9]}} = vsathb(r{{[1-9]}}:{{[0-9]}})
define double @f6(double %a0) #0 {
b0:
@@ -105,7 +105,7 @@ b0:
declare i64 @llvm.hexagon.S2.vsathb.nopack(i64) #1
-; CHECK-LABEL: f7:
+; CHECK-LABEL: <f7>:
; CHECK: r{{[1-9]}}:{{[0-9]}} = vsathub(r{{[1-9]}}:{{[0-9]}})
define double @f7(double %a0) #0 {
b0:
@@ -120,7 +120,7 @@ b0:
declare i64 @llvm.hexagon.S2.vsathub.nopack(i64) #1
-; CHECK-LABEL: f8:
+; CHECK-LABEL: <f8>:
; CHECK: r{{[1-9]}}:{{[0-9]}} = vsatwh(r{{[1-9]}}:{{[0-9]}})
define double @f8(double %a0) #0 {
b0:
@@ -135,7 +135,7 @@ b0:
declare i64 @llvm.hexagon.S2.vsatwh.nopack(i64) #1
-; CHECK-LABEL: f9:
+; CHECK-LABEL: <f9>:
; CHECK: r{{[1-9]}}:{{[0-9]}} = vsatwuh(r{{[1-9]}}:{{[0-9]}})
define double @f9(double %a0) #0 {
b0:
@@ -150,7 +150,7 @@ b0:
declare i64 @llvm.hexagon.S2.vsatwuh.nopack(i64) #1
-; CHECK-LABEL: f10:
+; CHECK-LABEL: <f10>:
; CHECK: r{{[1-9]}}:{{[0-9]}} = asr(r{{[1-9]}}:{{[0-9]}},#1)
define double @f10(double %a0) #0 {
b0:
@@ -165,7 +165,7 @@ b0:
declare i64 @llvm.hexagon.S2.asr.i.p(i64, i32) #1
-; CHECK-LABEL: f11:
+; CHECK-LABEL: <f11>:
; CHECK: r{{[1-9]}}:{{[0-9]}} = lsr(r{{[1-9]}}:{{[0-9]}},#1)
define double @f11(double %a0) #0 {
b0:
@@ -180,7 +180,7 @@ b0:
declare i64 @llvm.hexagon.S2.lsr.i.p(i64, i32) #1
-; CHECK-LABEL: f12:
+; CHECK-LABEL: <f12>:
; CHECK: r{{[1-9]}}:{{[0-9]}} = asl(r{{[1-9]}}:{{[0-9]}},#1)
define double @f12(double %a0) #0 {
b0:
@@ -195,7 +195,7 @@ b0:
declare i64 @llvm.hexagon.S2.asl.i.p(i64, i32) #1
-; CHECK-LABEL: f13:
+; CHECK-LABEL: <f13>:
; CHECK: r{{[1-9]}}:{{[0-9]}} = vabsh(r{{[1-9]}}:{{[0-9]}})
define double @f13(double %a0) #0 {
b0:
@@ -210,7 +210,7 @@ b0:
declare i64 @llvm.hexagon.A2.vabsh(i64) #1
-; CHECK-LABEL: f14:
+; CHECK-LABEL: <f14>:
; CHECK: r{{[1-9]}}:{{[0-9]}} = vabsh(r{{[1-9]}}:{{[0-9]}}):sat
define double @f14(double %a0) #0 {
b0:
@@ -225,7 +225,7 @@ b0:
declare i64 @llvm.hexagon.A2.vabshsat(i64) #1
-; CHECK-LABEL: f15:
+; CHECK-LABEL: <f15>:
; CHECK: r{{[0-9]}}:{{[0-9]}} = vasrh(r{{[1-9]}}:{{[0-9]}},#1)
define double @f15(double %a0) #0 {
b0:
@@ -240,7 +240,7 @@ b0:
declare i64 @llvm.hexagon.S2.asr.i.vh(i64, i32) #1
-; CHECK-LABEL: f16:
+; CHECK-LABEL: <f16>:
; CHECK: r{{[1-9]}}:{{[0-9]}} = vlsrh(r{{[1-9]}}:{{[0-9]}},#1)
define double @f16(double %a0) #0 {
b0:
@@ -255,7 +255,7 @@ b0:
declare i64 @llvm.hexagon.S2.lsr.i.vh(i64, i32) #1
-; CHECK-LABEL: f17:
+; CHECK-LABEL: <f17>:
; CHECK: r{{[1-9]}}:{{[0-9]}} = vaslh(r{{[1-9]}}:{{[0-9]}},#1)
define double @f17(double %a0) #0 {
b0:
@@ -270,7 +270,7 @@ b0:
declare i64 @llvm.hexagon.S2.asl.i.vh(i64, i32) #1
-; CHECK-LABEL: f18:
+; CHECK-LABEL: <f18>:
; CHECK: r{{[1-9]}}:{{[0-9]}} = vabsw(r{{[1-9]}}:{{[0-9]}})
define double @f18(double %a0) #0 {
b0:
@@ -285,7 +285,7 @@ b0:
declare i64 @llvm.hexagon.A2.vabsw(i64) #1
-; CHECK-LABEL: f19:
+; CHECK-LABEL: <f19>:
; CHECK: r{{[1-9]}}:{{[0-9]}} = vabsw(r{{[1-9]}}:{{[0-9]}}):sat
define double @f19(double %a0) #0 {
b0:
@@ -300,7 +300,7 @@ b0:
declare i64 @llvm.hexagon.A2.vabswsat(i64) #1
-; CHECK-LABEL: f20:
+; CHECK-LABEL: <f20>:
; CHECK: r{{[1-9]}}:{{[0-9]}} = vasrw(r{{[1-9]}}:{{[0-9]}},#1)
define double @f20(double %a0) #0 {
b0:
@@ -315,7 +315,7 @@ b0:
declare i64 @llvm.hexagon.S2.asr.i.vw(i64, i32) #1
-; CHECK-LABEL: f21:
+; CHECK-LABEL: <f21>:
; CHECK: r{{[1-9]}}:{{[0-9]}} = vlsrw(r{{[1-9]}}:{{[0-9]}},#1)
define double @f21(double %a0) #0 {
b0:
@@ -330,7 +330,7 @@ b0:
declare i64 @llvm.hexagon.S2.lsr.i.vw(i64, i32) #1
-; CHECK-LABEL: f22:
+; CHECK-LABEL: <f22>:
; CHECK: r{{[1-9]}}:{{[0-9]}} = vaslw(r{{[1-9]}}:{{[0-9]}},#1)
define double @f22(double %a0) #0 {
b0:
@@ -345,7 +345,7 @@ b0:
declare i64 @llvm.hexagon.S2.asl.i.vw(i64, i32) #1
-; CHECK-LABEL: f23:
+; CHECK-LABEL: <f23>:
; CHECK: r{{[1-9]}}:{{[0-9]}} = brev(r{{[1-9]}}:{{[0-9]}})
define double @f23(double %a0) #0 {
b0:
diff --git a/llvm/test/CodeGen/Hexagon/vrcmpys.ll b/llvm/test/CodeGen/Hexagon/vrcmpys.ll
index 83aeb42115f4..2c9246bb7604 100644
--- a/llvm/test/CodeGen/Hexagon/vrcmpys.ll
+++ b/llvm/test/CodeGen/Hexagon/vrcmpys.ll
@@ -3,7 +3,7 @@
@g0 = common global double 0.000000e+00, align 8
@g1 = common global double 0.000000e+00, align 8
-; CHECK-LABEL: f0:
+; CHECK-LABEL: <f0>:
; CHECK: r{{[0-9]}}:{{[0-9]}} += vrcmpys(r{{[0-9]}}:{{[0-9]}},r{{[0-9]}}:{{[0-9]}}):<<1:sat:raw:lo
define double @f0(i32 %a0, i32 %a1) {
b0:
@@ -19,7 +19,7 @@ b0:
; Function Attrs: nounwind readnone
declare i64 @llvm.hexagon.M2.vrcmpys.acc.s1(i64, i64, i32) #0
-; CHECK-LABEL: f1:
+; CHECK-LABEL: <f1>:
; CHECK: r{{[0-9]}}:{{[0-9]}} += vrcmpys(r{{[0-9]}}:{{[0-9]}},r{{[0-9]}}:{{[0-9]}}):<<1:sat:raw:hi
define double @f1(i32 %a0, i32 %a1) {
b0:
@@ -32,7 +32,7 @@ b0:
ret double %v5
}
-; CHECK-LABEL: f2:
+; CHECK-LABEL: <f2>:
; CHECK: r{{[0-9]}}:{{[0-9]}} = vrcmpys(r{{[0-9]}}:{{[0-9]}},r{{[0-9]}}:{{[0-9]}}):<<1:sat:raw:lo
define double @f2(i32 %a0, i32 %a1) {
b0:
@@ -46,7 +46,7 @@ b0:
; Function Attrs: nounwind readnone
declare i64 @llvm.hexagon.M2.vrcmpys.s1(i64, i32) #0
-; CHECK-LABEL: f3:
+; CHECK-LABEL: <f3>:
; CHECK: r{{[0-9]}}:{{[0-9]}} = vrcmpys(r{{[0-9]}}:{{[0-9]}},r{{[0-9]}}:{{[0-9]}}):<<1:sat:raw:hi
define double @f3(i32 %a0, i32 %a1) {
b0:
@@ -57,7 +57,7 @@ b0:
ret double %v3
}
-; CHECK-LABEL: f4:
+; CHECK-LABEL: <f4>:
; CHECK: e9a4c2e0 { r0 = vrcmpys(r5:4,r3:2):<<1:rnd:sat:raw:lo }
; CHECK: e9a4c2c0 { r0 = vrcmpys(r5:4,r3:2):<<1:rnd:sat:raw:hi }
define void @f4() {
diff --git a/llvm/test/CodeGen/Mips/compactbranches/no-beqzc-bnezc.ll b/llvm/test/CodeGen/Mips/compactbranches/no-beqzc-bnezc.ll
index 2bda921d57a3..be97a07c8366 100644
--- a/llvm/test/CodeGen/Mips/compactbranches/no-beqzc-bnezc.ll
+++ b/llvm/test/CodeGen/Mips/compactbranches/no-beqzc-bnezc.ll
@@ -40,7 +40,7 @@ define i32 @f1() {
; beqc and bnec have the restriction that $rs < $rt.
define i32 @f2(i32 %a, i32 %b) {
-; ENCODING-LABEL: f2:
+; ENCODING-LABEL: <f2>:
; ENCODING-NOT: beqc $5, $4
; ENCODING-NOT: bnec $5, $4
@@ -87,7 +87,7 @@ define i64 @f4() {
; beqc and bnec have the restriction that $rs < $rt.
define i64 @f5(i64 %a, i64 %b) {
-; ENCODING-LABEL: f5:
+; ENCODING-LABEL: <f5>:
; ENCODING-NOT: beqc $5, $4
; ENCODING-NOT: bnec $5, $4
diff --git a/llvm/test/CodeGen/Mips/dsp-spill-reload.ll b/llvm/test/CodeGen/Mips/dsp-spill-reload.ll
index a16638630113..5b270854ce0b 100644
--- a/llvm/test/CodeGen/Mips/dsp-spill-reload.ll
+++ b/llvm/test/CodeGen/Mips/dsp-spill-reload.ll
@@ -13,7 +13,7 @@
; FIXME: We should be able to get rid of those instructions with the variable
; value registers.
-; ALL-LABEL: spill_reload:
+; ALL-LABEL: spill_reload{{>?}}:
define <4 x i8> @spill_reload(<4 x i8> %a, <4 x i8> %b, i32 %g) {
entry:
diff --git a/llvm/test/CodeGen/Mips/micromips-b-range.ll b/llvm/test/CodeGen/Mips/micromips-b-range.ll
index 27a0db545f74..91de85995703 100644
--- a/llvm/test/CodeGen/Mips/micromips-b-range.ll
+++ b/llvm/test/CodeGen/Mips/micromips-b-range.ll
@@ -1,7 +1,7 @@
; RUN: llc -march=mips -relocation-model=pic -mattr=+micromips \
; RUN: -filetype=obj -o - %s | llvm-objdump -d - | FileCheck %s
-; CHECK-LABEL: foo:
+; CHECK-LABEL: <foo>:
; CHECK-NEXT: 0: 41 a2 00 00 lui $2, 0
; CHECK-NEXT: 4: 30 42 00 00 addiu $2, $2, 0
; CHECK-NEXT: 8: 03 22 11 50 addu $2, $2, $25
diff --git a/llvm/test/CodeGen/Mips/micromips-sw.ll b/llvm/test/CodeGen/Mips/micromips-sw.ll
index e10260b2b83d..c116eae71ed1 100644
--- a/llvm/test/CodeGen/Mips/micromips-sw.ll
+++ b/llvm/test/CodeGen/Mips/micromips-sw.ll
@@ -7,10 +7,10 @@
; RUN: | FileCheck --check-prefix=MM6 %s
define void @fun(i32 %val) {
-; MM2-LABEL: fun:
+; MM2-LABEL: <fun>:
; MM2: cb e5 sw $ra, 20($sp)
-; MM6-LABEL: fun:
+; MM6-LABEL: <fun>:
; MM6: fb fd 00 14 sw $ra, 20($sp)
entry:
call i32* @fun1()
diff --git a/llvm/test/CodeGen/Mips/unaligned-memops-mapping.mir b/llvm/test/CodeGen/Mips/unaligned-memops-mapping.mir
index d864cfa4e32b..84ef651e286c 100644
--- a/llvm/test/CodeGen/Mips/unaligned-memops-mapping.mir
+++ b/llvm/test/CodeGen/Mips/unaligned-memops-mapping.mir
@@ -111,13 +111,13 @@ body: |
...
-# CHECK-LABEL: g:
+# CHECK-LABEL: <g>:
# CHECK: 0: 60 24 00 00 lwl $1, 0($4)
# CHECK: 4: 60 24 10 03 lwr $1, 3($4)
# CHECK: 8: 60 25 80 00 swl $1, 0($5)
# CHECK: c: 60 25 90 03 swr $1, 3($5)
-# CHECK-LABEL: g2:
+# CHECK-LABEL: <g2>:
# CHECK: 14: 60 24 64 00 lwle $1, 0($4)
# CHECK: 18: 60 24 66 03 lwre $1, 3($4)
# CHECK: 1c: 60 25 a0 00 swle $1, 0($5)
diff --git a/llvm/test/CodeGen/PowerPC/aix-indirect-call.ll b/llvm/test/CodeGen/PowerPC/aix-indirect-call.ll
index a80a137ee419..977b2d5b1c8a 100644
--- a/llvm/test/CodeGen/PowerPC/aix-indirect-call.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-indirect-call.ll
@@ -114,7 +114,7 @@ define void @callThroughPtrWithArgs(void (i32, i16, i64)* nocapture) {
; MIR64-NEXT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1
; CHECKASM-LABEL: .callThroughPtrWithArgs:
-; CHECKOBJ-LABEL: .callThroughPtrWithArgs:
+; CHECKOBJ-LABEL: <.callThroughPtrWithArgs>:
; ASMOBJ32: stwu 1, -64(1)
; ASMOBJ32-DAG: lwz [[REG:[0-9]+]], 0(3)
diff --git a/llvm/test/CodeGen/PowerPC/aix-return55.ll b/llvm/test/CodeGen/PowerPC/aix-return55.ll
index e1a74f0989a5..a09857169a30 100644
--- a/llvm/test/CodeGen/PowerPC/aix-return55.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-return55.ll
@@ -19,21 +19,21 @@ entry:
; CHECK: blr
}
-;CHECKOBJ: 00000000 .text:
+;CHECKOBJ: 00000000 <.text>:
;CHECKOBJ-NEXT: 0: 38 60 00 37 li 3, 55
;CHECKOBJ-NEXT: 4: 4e 80 00 20 blr{{[[:space:]] *}}
-;CHECKOBJ-NEXT: 00000008 .rodata.str1.1:
+;CHECKOBJ-NEXT: 00000008 <.rodata.str1.1>:
;CHECKOBJ-NEXT: 8: 68 65 6c 6c xori 5, 3, 27756
;CHECKOBJ-NEXT: c: 6f 77 6f 72 xoris 23, 27, 28530
;CHECKOBJ-NEXT: 10: 0a 00 00 00 tdlti 0, 0{{[[:space:]] *}}
;CHECKOBJ-NEXT: Disassembly of section .data:{{[[:space:]] *}}
-;CHECKOBJ-NEXT: 00000018 a:
+;CHECKOBJ-NEXT: 00000018 <a>:
;CHECKOBJ-NEXT: 18: 00 01 23 45 <unknown>
;CHECKOBJ-NEXT: 1c: 67 8a bc de oris 10, 28, 48350{{[[:space:]] *}}
-;CHECKOBJ-NEXT: 00000020 d:
+;CHECKOBJ-NEXT: 00000020 <d>:
;CHECKOBJ-NEXT: 20: 40 14 00 00 bdnzf 20, .+0
;CHECKOBJ-NEXT: 24: 00 00 00 00 <unknown>{{[[:space:]] *}}
-;CHECKOBJ-NEXT: 00000028 foo:
+;CHECKOBJ-NEXT: 00000028 <foo>:
;CHECKOBJ-NEXT: 28: 00 00 00 00 <unknown>
;CHECKOBJ-NEXT: 2c: 00 00 00 34 <unknown>
;CHECKOBJ-NEXT: 30: 00 00 00 00 <unknown>
diff --git a/llvm/test/CodeGen/PowerPC/aix-user-defined-memcpy.ll b/llvm/test/CodeGen/PowerPC/aix-user-defined-memcpy.ll
index b179b86c896a..bafda1ca889c 100644
--- a/llvm/test/CodeGen/PowerPC/aix-user-defined-memcpy.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-user-defined-memcpy.ll
@@ -96,12 +96,12 @@ declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture writeonly, i8* nocapture r
; 32-REL-NOT: Type: R_RBR (0x1A)
; 32-DIS: Disassembly of section .text:
-; 32-DIS: 00000000 .text:
+; 32-DIS: 00000000 <.text>:
; 32-DIS-NEXT: 0: 38 60 00 03 li 3, 3
; 32-DIS-NEXT: 4: 4e 80 00 20 blr
; 32-DIS-NEXT: 8: 60 00 00 00 nop
; 32-DIS-NEXT: c: 60 00 00 00 nop
-; 32-DIS: 00000010 .call_memcpy:
+; 32-DIS: 00000010 <.call_memcpy>:
; 32-DIS-NEXT: 10: 7c 08 02 a6 mflr 0
; 32-DIS-NEXT: 14: 90 01 00 08 stw 0, 8(1)
; 32-DIS-NEXT: 18: 94 21 ff c0 stwu 1, -64(1)
diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-const.ll b/llvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-const.ll
index b9efa55cdab9..5c1f55f4aac4 100644
--- a/llvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-const.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-const.ll
@@ -47,11 +47,11 @@ entry:
;CHECK-NEXT: .space 1
-;CHECKOBJ: 00000000 .text:
+;CHECKOBJ: 00000000 <.text>:
;CHECKOBJ-NEXT: 0: 38 60 00 00 li 3, 0
;CHECKOBJ-NEXT: 4: 4e 80 00 20 blr
;CHECKOBJ-NEXT: ...{{[[:space:]] *}}
-;CHECKOBJ-NEXT: 00000010 .rodata:
+;CHECKOBJ-NEXT: 00000010 <.rodata>:
;CHECKOBJ-NEXT: 10: 40 00 00 00
;CHECKOBJ-NEXT: 14: 00 00 00 32
;CHECKOBJ-NEXT: ...{{[[:space:]] *}}
diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-str.ll b/llvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-str.ll
index 6a53d65e8238..13e9c5c2416a 100644
--- a/llvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-str.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-str.ll
@@ -66,15 +66,15 @@ entry:
; CHECK-NEXT: .byte 104
; CHECK-NEXT: .byte 0
-; CHECKOBJ: 00000010 .rodata.str2.2:
+; CHECKOBJ: 00000010 <.rodata.str2.2>:
; CHECKOBJ-NEXT: 10: 01 08 01 10
; CHECKOBJ-NEXT: 14: 00 d5 00 00 {{.*}}{{[[:space:]] *}}
-; CHECKOBJ-NEXT: 00000018 .rodata.str4.4:
+; CHECKOBJ-NEXT: 00000018 <.rodata.str4.4>:
; CHECKOBJ-NEXT: 18: 00 00 01 d0
; CHECKOBJ-NEXT: 1c: 00 00 01 d8
; CHECKOBJ-NEXT: 20: 00 00 01 9d
; CHECKOBJ-NEXT: 24: 00 00 00 00 {{.*}}{{[[:space:]] *}}
-; CHECKOBJ-NEXT: 00000028 .rodata.str1.1:
+; CHECKOBJ-NEXT: 00000028 <.rodata.str1.1>:
; CHECKOBJ-NEXT: 28: 68 65 6c 6c
; CHECKOBJ-NEXT: 2c: 6f 20 77 6f
; CHECKOBJ-NEXT: 30: 72 6c 64 21
diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-reloc.ll b/llvm/test/CodeGen/PowerPC/aix-xcoff-reloc.ll
index 1cb4c1f3e32b..c68017e3150d 100644
--- a/llvm/test/CodeGen/PowerPC/aix-xcoff-reloc.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-reloc.ll
@@ -410,7 +410,7 @@ declare i32 @bar(i32)
; DIS: {{.*}}aix-xcoff-reloc.ll.tmp.o: file format aixcoff-rs6000
; DIS: Disassembly of section .text:
-; DIS: 00000000 .text:
+; DIS: 00000000 <.text>:
; DIS-NEXT: 0: 7c 08 02 a6 mflr 0
; DIS-NEXT: 4: 90 01 00 08 stw 0, 8(1)
; DIS-NEXT: 8: 94 21 ff c0 stwu 1, -64(1)
@@ -429,20 +429,20 @@ declare i32 @bar(i32)
; DIS-NEXT: 3c: 4e 80 00 20 blr
; DIS: Disassembly of section .data:
-; DIS: 00000040 globalA:
+; DIS: 00000040 <globalA>:
; DIS-NEXT: 40: 00 00 00 01 <unknown>
-; DIS: 00000044 globalB:
+; DIS: 00000044 <globalB>:
; DIS-NEXT: 44: 00 00 00 02 <unknown>
-; DIS: 00000048 arr:
+; DIS: 00000048 <arr>:
; DIS-NEXT: 48: 00 00 00 03 <unknown>
; DIS-NEXT: ...
-; DIS: 00000070 p:
+; DIS: 00000070 <p>:
; DIS-NEXT: 70: 00 00 00 58 <unknown>
-; DIS: 00000074 foo:
+; DIS: 00000074 <foo>:
; DIS-NEXT: 74: 00 00 00 00 <unknown>
; DIS-NEXT: 78: 00 00 00 80 <unknown>
; DIS-NEXT: 7c: 00 00 00 00 <unknown>
-; DIS: 00000080 globalA:
+; DIS: 00000080 <globalA>:
; DIS-NEXT: 80: 00 00 00 40 <unknown>
-; DIS: 00000084 globalB:
+; DIS: 00000084 <globalB>:
; DIS-NEXT: 84: 00 00 00 44 <unknown>
diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-rodata.ll b/llvm/test/CodeGen/PowerPC/aix-xcoff-rodata.ll
index 05fde17c9527..00077d773e0b 100644
--- a/llvm/test/CodeGen/PowerPC/aix-xcoff-rodata.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-rodata.ll
@@ -285,33 +285,33 @@
; SYMS: ]
; DIS: Disassembly of section .text:
-; DIS: 00000000 const_ivar:
+; DIS: 00000000 <const_ivar>:
; DIS-NEXT: 0: 00 00 00 23
; DIS-NEXT: 4: 00 00 00 00
-; DIS: 00000008 const_llvar:
+; DIS: 00000008 <const_llvar>:
; DIS-NEXT: 8: 00 00 00 00
; DIS-NEXT: c: 00 00 00 24
-; DIS: 00000010 const_svar:
+; DIS: 00000010 <const_svar>:
; DIS-NEXT: 10: 00 25 00 00
-; DIS: 00000014 const_fvar:
+; DIS: 00000014 <const_fvar>:
; DIS-NEXT: 14: 44 48 00 00
-; DIS: 00000018 const_dvar:
+; DIS: 00000018 <const_dvar>:
; DIS-NEXT: 18: 40 8c 20 00
; DIS-NEXT: 1c: 00 00 00 00
-; DIS: 00000020 const_over_aligned:
+; DIS: 00000020 <const_over_aligned>:
; DIS-NEXT: 20: 40 8c 20 00
; DIS-NEXT: 24: 00 00 00 00
-; DIS: 00000028 const_chrarray:
+; DIS: 00000028 <const_chrarray>:
; DIS-NEXT: 28: 61 62 63 64
; DIS-NEXT: 2c: 00 00 00 00
-; DIS: 00000030 const_dblarr:
+; DIS: 00000030 <const_dblarr>:
; DIS-NEXT: 30: 3f f0 00 00
; DIS-NEXT: 34: 00 00 00 00
; DIS-NEXT: 38: 40 00 00 00
diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-textdisassembly.ll b/llvm/test/CodeGen/PowerPC/aix-xcoff-textdisassembly.ll
index d80a59ebd532..d68fe8bdf2b4 100644
--- a/llvm/test/CodeGen/PowerPC/aix-xcoff-textdisassembly.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-textdisassembly.ll
@@ -12,11 +12,11 @@ entry:
}
; CHECK: Disassembly of section .text:{{[[:space:]] *}}
-; CHECK-NEXT: 00000000 .text:
+; CHECK-NEXT: 00000000 <.text>:
; CHECK-NEXT: 0: 38 60 00 00 li 3, 0
; CHECK-NEXT: 4: 4e 80 00 20 blr
; CHECK-NEXT: 8: 60 00 00 00 nop
; CHECK-NEXT: c: 60 00 00 00 nop
-; CHECK: 00000010 .foo1:
+; CHECK: 00000010 <.foo1>:
; CHECK-NEXT: 10: 38 60 00 01 li 3, 1
; CHECK-NEXT: 14: 4e 80 00 20 blr
diff --git a/llvm/test/CodeGen/RISCV/compress-float.ll b/llvm/test/CodeGen/RISCV/compress-float.ll
index 6c170b69b588..c18ac1d5ab14 100644
--- a/llvm/test/CodeGen/RISCV/compress-float.ll
+++ b/llvm/test/CodeGen/RISCV/compress-float.ll
@@ -32,7 +32,7 @@
; instructions which also require one of the floating point extensions.
define float @float_load(float *%a) #0 {
-; RV32IFDC-LABEL: float_load:
+; RV32IFDC-LABEL: <float_load>:
; RV32IFDC: c.flw fa0, 0(a0)
; RV32IFDC-NEXT: c.jr ra
%1 = load volatile float, float* %a
@@ -40,7 +40,7 @@ define float @float_load(float *%a) #0 {
}
define double @double_load(double *%a) #0 {
-; RV32IFDC-LABEL: double_load:
+; RV32IFDC-LABEL: <double_load>:
; RV32IFDC: c.fld fa0, 0(a0)
; RV32IFDC-NEXT: c.jr ra
%1 = load volatile double, double* %a
diff --git a/llvm/test/CodeGen/RISCV/compress-inline-asm.ll b/llvm/test/CodeGen/RISCV/compress-inline-asm.ll
index fca4d6d1c705..6b58566d2bbe 100644
--- a/llvm/test/CodeGen/RISCV/compress-inline-asm.ll
+++ b/llvm/test/CodeGen/RISCV/compress-inline-asm.ll
@@ -5,7 +5,7 @@
@ext = external global i32
define i32 @compress_test(i32 %a) {
-; CHECK-LABEL: compress_test:
+; CHECK-LABEL: <compress_test>:
; CHECK: c.add a0, a1
; CHECK-NEXT: c.jr ra
%1 = load i32, i32* @ext
diff --git a/llvm/test/CodeGen/RISCV/compress.ll b/llvm/test/CodeGen/RISCV/compress.ll
index 798e6552014f..f6caf5e8f690 100644
--- a/llvm/test/CodeGen/RISCV/compress.ll
+++ b/llvm/test/CodeGen/RISCV/compress.ll
@@ -30,7 +30,7 @@
;
diff erent test file.
define i32 @simple_arith(i32 %a, i32 %b) #0 {
-; RV32IC-LABEL: simple_arith:
+; RV32IC-LABEL: <simple_arith>:
; RV32IC: addi a2, a0, 1
; RV32IC-NEXT: c.andi a2, 11
; RV32IC-NEXT: c.slli a2, 7
@@ -48,7 +48,7 @@ define i32 @simple_arith(i32 %a, i32 %b) #0 {
}
define i32 @select(i32 %a, i32 *%b) #0 {
-; RV32IC-LABEL: select:
+; RV32IC-LABEL: <select>:
; RV32IC: c.lw a2, 0(a1)
; RV32IC-NEXT: c.beqz a2, 4
; RV32IC-NEXT: c.mv a0, a2
@@ -124,14 +124,14 @@ define i32 @select(i32 %a, i32 *%b) #0 {
}
define i32 @pos_tiny() #0 {
-; RV32IC-LABEL: pos_tiny:
+; RV32IC-LABEL: <pos_tiny>:
; RV32IC: c.li a0, 18
; RV32IC-NEXT: c.jr ra
ret i32 18
}
define i32 @pos_i32() #0 {
-; RV32IC-LABEL: pos_i32:
+; RV32IC-LABEL: <pos_i32>:
; RV32IC: lui a0, 423811
; RV32IC-NEXT: addi a0, a0, -1297
; RV32IC-NEXT: c.jr ra
@@ -139,7 +139,7 @@ define i32 @pos_i32() #0 {
}
define i32 @pos_i32_half_compressible() #0 {
-; RV32IC-LABEL: pos_i32_half_compressible:
+; RV32IC-LABEL: <pos_i32_half_compressible>:
; RV32IC: lui a0, 423810
; RV32IC-NEXT: c.addi a0, 28
; RV32IC-NEXT: c.jr ra
@@ -147,14 +147,14 @@ define i32 @pos_i32_half_compressible() #0 {
}
define i32 @neg_tiny() #0 {
-; RV32IC-LABEL: neg_tiny:
+; RV32IC-LABEL: <neg_tiny>:
; RV32IC: c.li a0, -19
; RV32IC-NEXT: c.jr ra
ret i32 -19
}
define i32 @neg_i32() #0 {
-; RV32IC-LABEL: neg_i32:
+; RV32IC-LABEL: <neg_i32>:
; RV32IC: lui a0, 912092
; RV32IC-NEXT: addi a0, a0, -273
; RV32IC-NEXT: c.jr ra
@@ -162,14 +162,14 @@ define i32 @neg_i32() #0 {
}
define i32 @pos_i32_hi20_only() #0 {
-; RV32IC-LABEL: pos_i32_hi20_only:
+; RV32IC-LABEL: <pos_i32_hi20_only>:
; RV32IC: c.lui a0, 16
; RV32IC-NEXT: c.jr ra
ret i32 65536
}
define i32 @neg_i32_hi20_only() #0 {
-; RV32IC-LABEL: neg_i32_hi20_only:
+; RV32IC-LABEL: <neg_i32_hi20_only>:
; RV32IC: c.lui a0, 1048560
; RV32IC-NEXT: c.jr ra
ret i32 -65536
diff --git a/llvm/test/CodeGen/RISCV/option-norelax.ll b/llvm/test/CodeGen/RISCV/option-norelax.ll
index ad2b32493790..d809e0068106 100644
--- a/llvm/test/CodeGen/RISCV/option-norelax.ll
+++ b/llvm/test/CodeGen/RISCV/option-norelax.ll
@@ -7,7 +7,7 @@
declare i32 @foo(i32)
define i32 @bar(i32 %a) nounwind {
-; CHECK-LABEL: bar:
+; CHECK-LABEL: <bar>:
; CHECK: R_RISCV_CALL
; CHECK: R_RISCV_RELAX
tail call void asm sideeffect ".option norelax", ""()
diff --git a/llvm/test/CodeGen/RISCV/option-norvc.ll b/llvm/test/CodeGen/RISCV/option-norvc.ll
index db96a1106bb4..063c48c9cb83 100644
--- a/llvm/test/CodeGen/RISCV/option-norvc.ll
+++ b/llvm/test/CodeGen/RISCV/option-norvc.ll
@@ -6,7 +6,7 @@
; emitting an ELF directly.
define i32 @add(i32 %a, i32 %b) nounwind {
-; CHECK-LABEL: add:
+; CHECK-LABEL: <add>:
; CHECK: c.add a0, a1
; CHECK-NEXT: c.jr ra
tail call void asm sideeffect ".option norvc", ""()
diff --git a/llvm/test/CodeGen/RISCV/option-relax.ll b/llvm/test/CodeGen/RISCV/option-relax.ll
index 262969905611..134d5e142d47 100644
--- a/llvm/test/CodeGen/RISCV/option-relax.ll
+++ b/llvm/test/CodeGen/RISCV/option-relax.ll
@@ -7,7 +7,7 @@
declare i32 @foo(i32)
define i32 @bar(i32 %a) nounwind {
-; CHECK-LABEL: bar:
+; CHECK-LABEL: <bar>:
; CHECK: R_RISCV_CALL
; CHECK-NOT: R_RISCV_RELAX
tail call void asm sideeffect ".option relax", ""()
diff --git a/llvm/test/CodeGen/RISCV/option-rvc.ll b/llvm/test/CodeGen/RISCV/option-rvc.ll
index 9d7f19400975..43829fe164bd 100644
--- a/llvm/test/CodeGen/RISCV/option-rvc.ll
+++ b/llvm/test/CodeGen/RISCV/option-rvc.ll
@@ -6,7 +6,7 @@
; emitting an ELF directly.
define i32 @add(i32 %a, i32 %b) nounwind {
-; CHECK-LABEL: add:
+; CHECK-LABEL: <add>:
; CHECK: add a0, a1, a0
; CHECK-NEXT: jalr zero, 0(ra)
tail call void asm sideeffect ".option rvc", ""()
diff --git a/llvm/test/CodeGen/Thumb/large-stack.ll b/llvm/test/CodeGen/Thumb/large-stack.ll
index 1242b571f508..0a55ee5dd8a5 100644
--- a/llvm/test/CodeGen/Thumb/large-stack.ll
+++ b/llvm/test/CodeGen/Thumb/large-stack.ll
@@ -7,7 +7,7 @@
; Largest stack for which a single tADDspi/tSUBspi is enough
define void @test1() {
-; CHECK-LABEL: test1:
+; CHECK-LABEL: test1{{>?}}:
; CHECK: sub sp, #508
; CHECK: add sp, #508
%tmp = alloca [ 508 x i8 ] , align 4
@@ -16,7 +16,7 @@ define void @test1() {
; Largest stack for which three tADDspi/tSUBspis are enough
define void @test100() {
-; CHECK-LABEL: test100:
+; CHECK-LABEL: test100{{>?}}:
; CHECK: sub sp, #508
; CHECK: sub sp, #508
; CHECK: sub sp, #508
@@ -29,7 +29,7 @@ define void @test100() {
; Largest stack for which three tADDspi/tSUBspis are enough
define void @test100_nofpelim() "frame-pointer"="all" {
-; CHECK-LABEL: test100_nofpelim:
+; CHECK-LABEL: test100_nofpelim{{>?}}:
; CHECK: sub sp, #508
; CHECK: sub sp, #508
; CHECK: sub sp, #508
@@ -42,7 +42,7 @@ define void @test100_nofpelim() "frame-pointer"="all" {
; Smallest stack for which we use a constant pool
define void @test2() {
-; CHECK-LABEL: test2:
+; CHECK-LABEL: test2{{>?}}:
; CHECK: ldr [[TEMP:r[0-7]]],
; CHECK: add sp, [[TEMP]]
; CHECK: ldr [[TEMP:r[0-7]]],
@@ -53,7 +53,7 @@ define void @test2() {
; Smallest stack for which we use a constant pool
define void @test2_nofpelim() "frame-pointer"="all" {
-; CHECK-LABEL: test2_nofpelim:
+; CHECK-LABEL: test2_nofpelim{{>?}}:
; CHECK: ldr [[TEMP:r[0-7]]],
; CHECK: add sp, [[TEMP]]
; CHECK: subs r4, r7, #7
@@ -64,7 +64,7 @@ define void @test2_nofpelim() "frame-pointer"="all" {
}
define i32 @test3() {
-; CHECK-LABEL: test3:
+; CHECK-LABEL: test3{{>?}}:
; CHECK: ldr [[TEMP:r[0-7]]],
; CHECK: add sp, [[TEMP]]
; CHECK: ldr [[TEMP2:r[0-7]]],
@@ -80,7 +80,7 @@ define i32 @test3() {
}
define i32 @test3_nofpelim() "frame-pointer"="all" {
-; CHECK-LABEL: test3_nofpelim:
+; CHECK-LABEL: test3_nofpelim{{>?}}:
; CHECK: ldr [[TEMP:r[0-7]]],
; CHECK: add sp, [[TEMP]]
; CHECK: ldr [[TEMP2:r[0-7]]],
diff --git a/llvm/test/CodeGen/X86/2014-08-29-CompactUnwind.ll b/llvm/test/CodeGen/X86/2014-08-29-CompactUnwind.ll
index a0b72581a6c4..9516c374b580 100644
--- a/llvm/test/CodeGen/X86/2014-08-29-CompactUnwind.ll
+++ b/llvm/test/CodeGen/X86/2014-08-29-CompactUnwind.ll
@@ -9,7 +9,7 @@ target triple = "x86_64-apple-macosx10.9.0"
@.str1 = private unnamed_addr constant [3 x i8] c" \00", align 1
@.str2 = private unnamed_addr constant [6 x i8] c"%s%p:\00", align 1
-; CHECK: ___asan_report_error:
+; CHECK: <___asan_report_error>:
; subq instruction starts at 0x0a, so the second byte of the compact encoding
; (UNWIND_X86_64_FRAMELESS_STACK_SIZE in mach-o/compact_unwind_encoding.h)
diff --git a/llvm/test/CodeGen/X86/callbr-asm-obj-file.ll b/llvm/test/CodeGen/X86/callbr-asm-obj-file.ll
index d526045f93c0..6e6cafa2e1ef 100644
--- a/llvm/test/CodeGen/X86/callbr-asm-obj-file.ll
+++ b/llvm/test/CodeGen/X86/callbr-asm-obj-file.ll
@@ -2,7 +2,7 @@
; RUN: | llvm-objdump -triple x86_64-linux-gnu -d - \
; RUN: | FileCheck %s
-; CHECK: 0000000000000000 test1:
+; CHECK: 0000000000000000 <test1>:
; CHECK-NEXT: 0: 74 00 je 0 <test1+0x2>
; CHECK-NEXT: 2: c3 retq
diff --git a/llvm/test/CodeGen/X86/patchable-prologue.ll b/llvm/test/CodeGen/X86/patchable-prologue.ll
index 222243019c3a..b66694a39e83 100644
--- a/llvm/test/CodeGen/X86/patchable-prologue.ll
+++ b/llvm/test/CodeGen/X86/patchable-prologue.ll
@@ -4,7 +4,7 @@
declare void @callee(i64*)
define void @f0() "patchable-function"="prologue-short-redirect" {
-; CHECK-LABEL: _f0:
+; CHECK-LABEL: _f0{{>?}}:
; CHECK-NEXT: 66 90 nop
; CHECK-ALIGN: .p2align 4, 0x90
@@ -45,7 +45,7 @@ define void @f3() "patchable-function"="prologue-short-redirect" optsize {
; This testcase happens to produce a KILL instruction at the beginning of the
; first basic block. In this case the 2nd instruction should be turned into a
; patchable one.
-; CHECK-LABEL: f4:
+; CHECK-LABEL: f4{{>?}}:
; CHECK-NEXT: 8b 0c 37 movl (%rdi,%rsi), %ecx
define i32 @f4(i8* %arg1, i64 %arg2, i32 %arg3) "patchable-function"="prologue-short-redirect" {
bb:
diff --git a/llvm/test/DebugInfo/RISCV/dwarf-riscv-relocs.ll b/llvm/test/DebugInfo/RISCV/dwarf-riscv-relocs.ll
index d5cd3183e492..b283522ea3a9 100644
--- a/llvm/test/DebugInfo/RISCV/dwarf-riscv-relocs.ll
+++ b/llvm/test/DebugInfo/RISCV/dwarf-riscv-relocs.ll
@@ -18,7 +18,7 @@
; Check that we can print the source, even with relocations.
; OBJDUMP-SOURCE: Disassembly of section .text:
; OBJDUMP-SOURCE-EMPTY:
-; OBJDUMP-SOURCE-NEXT: 00000000 main:
+; OBJDUMP-SOURCE-NEXT: 00000000 <main>:
; OBJDUMP-SOURCE: ; {
; OBJDUMP-SOURCE: ; return 0;
diff --git a/llvm/test/LTO/Resolution/X86/asm-output.ll b/llvm/test/LTO/Resolution/X86/asm-output.ll
index 7f15cecc8d04..3a1324ba67bf 100644
--- a/llvm/test/LTO/Resolution/X86/asm-output.ll
+++ b/llvm/test/LTO/Resolution/X86/asm-output.ll
@@ -7,7 +7,7 @@
; RUN: llvm-lto2 run -filetype=obj -r %t1.bc,main,px -o %t2 %t1.bc
; RUN: llvm-objdump -d %t2.0 | FileCheck --check-prefix=ASM %s
;
-; ASM: main:
+; ASM: main
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/LTO/Resolution/X86/not-prevailing-alias.ll b/llvm/test/LTO/Resolution/X86/not-prevailing-alias.ll
index 9d1164725591..2aa13c8a44be 100644
--- a/llvm/test/LTO/Resolution/X86/not-prevailing-alias.ll
+++ b/llvm/test/LTO/Resolution/X86/not-prevailing-alias.ll
@@ -14,7 +14,7 @@
; Check that 'barAlias' and 'varAlias' were not inlined.
; RUN: llvm-objdump -d %t2.o.1 | FileCheck %s
-; CHECK: zed:
+; CHECK: <zed>:
; CHECK-NEXT: {{.*}} pushq
; CHECK-NEXT: {{.*}} callq 0
; CHECK-NEXT: movq (%rip), %rax
diff --git a/llvm/test/LTO/Resolution/X86/not-prevailing-variables.ll b/llvm/test/LTO/Resolution/X86/not-prevailing-variables.ll
index 9a7131b642d1..e717fcee4bb7 100644
--- a/llvm/test/LTO/Resolution/X86/not-prevailing-variables.ll
+++ b/llvm/test/LTO/Resolution/X86/not-prevailing-variables.ll
@@ -8,10 +8,10 @@
; Check 'var2' was not inlined.
; RUN: llvm-objdump -d %t2.o.1 | FileCheck %s
-; CHECK: testVar1:
+; CHECK: <testVar1>:
; CHECK-NEXT: movl $10, %eax
; CHECK-NEXT: retq
-; CHECK: testVar2:
+; CHECK: <testVar2>:
; CHECK-NEXT: movl (%rip), %eax
; CHECK-NEXT: retq
diff --git a/llvm/test/LTO/Resolution/X86/not-prevailing.ll b/llvm/test/LTO/Resolution/X86/not-prevailing.ll
index fb68b01698c5..7a7ca0ee784e 100644
--- a/llvm/test/LTO/Resolution/X86/not-prevailing.ll
+++ b/llvm/test/LTO/Resolution/X86/not-prevailing.ll
@@ -4,7 +4,7 @@
; RUN: -r %t2.o,bar,x -save-temps
; Check that 'foo' and 'bar' were not inlined.
-; CHECK: zed:
+; CHECK: <zed>:
; CHECK-NEXT: {{.*}} pushq %rbx
; CHECK-NEXT: {{.*}} callq 0 <zed+0x6>
; CHECK-NEXT: {{.*}} movl %eax, %ebx
diff --git a/llvm/test/LTO/X86/codemodel-1.ll b/llvm/test/LTO/X86/codemodel-1.ll
index 2c54ac31c7a7..814981dc8b25 100644
--- a/llvm/test/LTO/X86/codemodel-1.ll
+++ b/llvm/test/LTO/X86/codemodel-1.ll
@@ -14,7 +14,7 @@ target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16
define i32* @_start() nounwind readonly {
entry:
-; CHECK-SMALL-LABEL: _start:
+; CHECK-SMALL-LABEL: <_start>:
; CHECK-SMALL: leaq (%rip), %rax
ret i32* getelementptr ([0 x i32], [0 x i32]* @data, i64 0, i64 0)
}
diff --git a/llvm/test/LTO/X86/codemodel-2.ll b/llvm/test/LTO/X86/codemodel-2.ll
index 1b61747c283d..058eec98f85c 100644
--- a/llvm/test/LTO/X86/codemodel-2.ll
+++ b/llvm/test/LTO/X86/codemodel-2.ll
@@ -14,7 +14,7 @@ target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16
define i32* @_start() nounwind readonly {
entry:
-; CHECK-LARGE-LABEL: _start:
+; CHECK-LARGE-LABEL: <_start>:
; CHECK-LARGE: movabsq $0, %rax
ret i32* getelementptr ([0 x i32], [0 x i32]* @data, i64 0, i64 0)
}
diff --git a/llvm/test/LTO/X86/llvm-lto-output.ll b/llvm/test/LTO/X86/llvm-lto-output.ll
index 56a9a5284b1e..fa490ab939e6 100644
--- a/llvm/test/LTO/X86/llvm-lto-output.ll
+++ b/llvm/test/LTO/X86/llvm-lto-output.ll
@@ -9,7 +9,7 @@
; RUN: FileCheck --check-prefix=ASM %s < %t2
; RUN: llvm-lto -exported-symbol=main -filetype=obj -o %t2 %t1
; RUN: llvm-objdump -d %t2 | FileCheck --check-prefix=ASM %s
-; ASM: main:
+; ASM: main{{>?}}:
;
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/MC/AArch64/label-arithmetic-elf.s b/llvm/test/MC/AArch64/label-arithmetic-elf.s
index 08c4343bf18b..8b8faf979f31 100644
--- a/llvm/test/MC/AArch64/label-arithmetic-elf.s
+++ b/llvm/test/MC/AArch64/label-arithmetic-elf.s
@@ -3,7 +3,7 @@
start:
.space 8
end:
- // CHECK-LABEL: end:
+ // CHECK-LABEL: <end>:
adds w0, w1, #(end - start)
adds x0, x1, #(end - start)
@@ -72,7 +72,7 @@ notprivate:
.type foo, @function
foo:
- // CHECK-LABEL: foo:
+ // CHECK-LABEL: <foo>:
add w0, w1, #(foo - .Lprivate2)
cmp w0, #(foo - .Lprivate2)
@@ -83,7 +83,7 @@ foo:
.type goo, @function
goo:
- // CHECK-LABEL: goo:
+ // CHECK-LABEL: <goo>:
add w0, w1, #(goo - foo)
cmp w0, #(goo - foo)
diff --git a/llvm/test/MC/AMDGPU/labels-branch-gfx9.s b/llvm/test/MC/AMDGPU/labels-branch-gfx9.s
index b66036d5546e..c187f6d85d98 100644
--- a/llvm/test/MC/AMDGPU/labels-branch-gfx9.s
+++ b/llvm/test/MC/AMDGPU/labels-branch-gfx9.s
@@ -6,14 +6,14 @@ loop_start:
s_call_b64 s[10:11], loop_end
// GFX9: s_call_b64 s[10:11], loop_end ; encoding: [A,A,0x8a,0xba]
// GFX9-NEXT: ; fixup A - offset: 0, value: loop_end, kind: fixup_si_sopp_br
-// BIN: loop_start:
+// BIN: <loop_start>:
// BIN-NEXT: s_call_b64 s[10:11], loop_end // 000000000000: BA8A0001
s_call_b64 s[10:11], loop_start
// GFX9: s_call_b64 s[10:11], loop_start ; encoding: [A,A,0x8a,0xba]
// GFX9-NEXT: ; fixup A - offset: 0, value: loop_start, kind: fixup_si_sopp_br
// BIN: s_call_b64 s[10:11], loop_start // 000000000004: BA8AFFFE
-// BIN: loop_end:
+// BIN: <loop_end>:
loop_end:
s_nop 0
diff --git a/llvm/test/MC/AMDGPU/labels-branch.s b/llvm/test/MC/AMDGPU/labels-branch.s
index 232fde1b7a41..e71c767ae95d 100644
--- a/llvm/test/MC/AMDGPU/labels-branch.s
+++ b/llvm/test/MC/AMDGPU/labels-branch.s
@@ -5,20 +5,20 @@ loop_start:
s_branch loop_start
// VI: s_branch loop_start ; encoding: [A,A,0x82,0xbf]
// VI-NEXT: ; fixup A - offset: 0, value: loop_start, kind: fixup_si_sopp_br
-// BIN: loop_start:
+// BIN: <loop_start>:
// BIN-NEXT: s_branch loop_start // 000000000000: BF82FFFF
s_branch loop_end
// VI: s_branch loop_end ; encoding: [A,A,0x82,0xbf]
// VI-NEXT: ; fixup A - offset: 0, value: loop_end, kind: fixup_si_sopp_br
// BIN: s_branch loop_end // 000000000004: BF820000
-// BIN: loop_end:
+// BIN: <loop_end>:
loop_end:
s_branch gds
// VI: s_branch gds ; encoding: [A,A,0x82,0xbf]
// VI-NEXT: ; fixup A - offset: 0, value: gds, kind: fixup_si_sopp_br
// BIN: s_branch gds // 000000000008: BF820000
-// BIN: gds:
+// BIN: <gds>:
gds:
s_nop 0
diff --git a/llvm/test/MC/ARM/arm-macho-calls.s b/llvm/test/MC/ARM/arm-macho-calls.s
index 47af47f1f9f2..9b0a564ce260 100644
--- a/llvm/test/MC/ARM/arm-macho-calls.s
+++ b/llvm/test/MC/ARM/arm-macho-calls.s
@@ -1,7 +1,7 @@
@ RUN: llvm-mc -triple armv7-apple-ios -filetype=obj -o %t %s
@ RUN: llvm-objdump -d -r %t | FileCheck %s
-@ CHECK: _func:
+@ CHECK: <_func>:
@ CHECK: bl #0 <_func+0x8>
@ CHECK: ARM_RELOC_BR24 __text
@ CHECK: bl #-12 <_func>
diff --git a/llvm/test/MC/ARM/coff-relocations.s b/llvm/test/MC/ARM/coff-relocations.s
index 46645b87cd64..20fd7f16a07a 100644
--- a/llvm/test/MC/ARM/coff-relocations.s
+++ b/llvm/test/MC/ARM/coff-relocations.s
@@ -14,28 +14,28 @@
branch24t_0:
b target
-@ CHECK-ENCODING-LABEL: branch24t_0:
+@ CHECK-ENCODING-LABEL: <branch24t_0>:
@ CHECK-ENCODING-NEXT: b.w #0
.thumb_func
branch24t_1:
bl target
-@ CHECK-ENCODING-LABEL: branch24t_1:
+@ CHECK-ENCODING-LABEL: <branch24t_1>:
@ CHECK-ENCODING-NEXR: bl #0
.thumb_func
branch20t:
bcc target
-@ CHECK-ENCODING-LABEL: branch20t:
+@ CHECK-ENCODING-LABEL: <branch20t>:
@ CHECK-ENCODING-NEXT: blo.w #0
.thumb_func
blx23t:
blx target
-@ CHECK-ENCODING-LABEL: blx23t:
+@ CHECK-ENCODING-LABEL: <blx23t>:
@ CHECK-ENCODING-NEXT: blx #0
.thumb_func
@@ -44,7 +44,7 @@ mov32t:
movt r0, :upper16:target
blx r0
-@ CHECK-ENCODING-LABEL: mov32t:
+@ CHECK-ENCODING-LABEL: <mov32t>:
@ CHECK-ENCODING-NEXT: movw r0, #0
@ CHECK-ENCODING-NEXT: movt r0, #0
@ CHECK-ENCODING-NEXT: blx r0
@@ -57,7 +57,7 @@ addr32:
.Laddr32:
.long target
-@ CHECK-ENCODING-LABEL: addr32:
+@ CHECK-ENCODING-LABEL: <addr32>:
@ CHECK-ENCODING-NEXT: ldr r0, [pc, #4]
@ CHECK-ENCODING-NEXT: bx r0
@ CHECK-ENCODING-NEXT: trap
@@ -72,7 +72,7 @@ addr32nb:
.Laddr32nb:
.long target(imgrel)
-@ CHECK-ENCODING-LABEL: addr32nb:
+@ CHECK-ENCODING-LABEL: <addr32nb>:
@ CHECK-ENCODING-NEXT: ldr.w r0, [pc, #4]
@ CHECK-ENCODING-NEXT: bx r0
@ CHECK-ENCODING-NEXT: trap
@@ -87,7 +87,7 @@ secrel:
.Lsecrel:
.long target(secrel32)
-@ CHECK-ENCODING-LABEL: secrel:
+@ CHECK-ENCODING-LABEL: <secrel>:
@ CHECK-ENCODING-NEXT: ldr.w r0, [pc, #4]
@ CHECK-ENCODING-NEXT: bx r0
@ CHECK-ENCODING-NEXT: trap
diff --git a/llvm/test/MC/ARM/elf-movt.s b/llvm/test/MC/ARM/elf-movt.s
index e7ffeba97443..eb8466d0fff1 100644
--- a/llvm/test/MC/ARM/elf-movt.s
+++ b/llvm/test/MC/ARM/elf-movt.s
@@ -31,7 +31,7 @@ bar:
@OBJ: Disassembly of section .text:
@OBJ-EMPTY:
- at OBJ-NEXT: barf:
+ at OBJ-NEXT: <barf>:
@OBJ-NEXT: 0: f0 0f 0f e3 movw r0, #65520
@OBJ-NEXT: 00000000: R_ARM_MOVW_PREL_NC GOT
@OBJ-NEXT: 4: f4 0f 4f e3 movt r0, #65524
@@ -45,7 +45,7 @@ bar:
@THUMB: Disassembly of section .text:
@THUMB-EMPTY:
- at THUMB-NEXT: barf:
+ at THUMB-NEXT: <barf>:
@THUMB-NEXT: 0: 4f f6 f0 70 movw r0, #65520
@THUMB-NEXT: 00000000: R_ARM_THM_MOVW_PREL_NC GOT
@THUMB-NEXT: 4: cf f6 f4 70 movt r0, #65524
diff --git a/llvm/test/MC/ARM/sub-expr-imm.s b/llvm/test/MC/ARM/sub-expr-imm.s
index 73011896842f..128e45c56180 100644
--- a/llvm/test/MC/ARM/sub-expr-imm.s
+++ b/llvm/test/MC/ARM/sub-expr-imm.s
@@ -15,7 +15,7 @@ AES_Te:
.word 1,2,3,4,5,6
.word 1,2,3,4,5,6
.word 1,2,3,4,5,6
-@ CHECK: AES_encrypt:
+@ CHECK: <AES_encrypt>:
AES_encrypt:
@ CHECK: sub r10, r3, #264
sub r10,r3,#(AES_encrypt-AES_Te)
diff --git a/llvm/test/MC/AVR/relocations-abs.s b/llvm/test/MC/AVR/relocations-abs.s
index 1055ed51310a..05485479e42b 100644
--- a/llvm/test/MC/AVR/relocations-abs.s
+++ b/llvm/test/MC/AVR/relocations-abs.s
@@ -1,6 +1,6 @@
; RUN: llvm-mc -filetype=obj -triple=avr %s | llvm-objdump -dr - | FileCheck %s
-; CHECK: bar:
+; CHECK: <bar>:
; CHECK-NEXT: 00 00 nop
; CHECK-NEXT: R_AVR_16 .text+0x2
bar:
diff --git a/llvm/test/MC/BPF/insn-unit.s b/llvm/test/MC/BPF/insn-unit.s
index ff56cfa3966d..5e0c96cb0360 100644
--- a/llvm/test/MC/BPF/insn-unit.s
+++ b/llvm/test/MC/BPF/insn-unit.s
@@ -134,7 +134,7 @@ Llabel0 :
r8 ^= r9 // BPF_XOR | BPF_X
r9 = r10 // BPF_MOV | BPF_X
r10 s>>= r0 // BPF_ARSH | BPF_X
-// CHECK:Llabel0:
+// CHECK: <Llabel0>:
// CHECK: 87 02 00 00 00 00 00 00 r2 = -r2
// CHECK: 4f 54 00 00 00 00 00 00 r4 |= r5
// CHECK: 5f 65 00 00 00 00 00 00 r5 &= r6
diff --git a/llvm/test/MC/COFF/cv-inline-linetable-unlikely.s b/llvm/test/MC/COFF/cv-inline-linetable-unlikely.s
index a12f6d32ad26..1d2e96e73eaf 100644
--- a/llvm/test/MC/COFF/cv-inline-linetable-unlikely.s
+++ b/llvm/test/MC/COFF/cv-inline-linetable-unlikely.s
@@ -21,7 +21,7 @@
# calls to __asan_report*, for which it is very important to have an accurate
# stack trace.
-# ASM: 0000000000000000 g:
+# ASM: 0000000000000000 <g>:
# ASM-NEXT: 0: 48 83 ec 28 subq $40, %rsp
# ASM-NEXT: 4: c7 05 fc ff ff ff 00 00 00 00 movl $0, -4(%rip)
# Begin inline loc (matches cv_loc below)
diff --git a/llvm/test/MC/COFF/cv-inline-linetable.s b/llvm/test/MC/COFF/cv-inline-linetable.s
index 08f250eb43b9..21093e24e0d1 100644
--- a/llvm/test/MC/COFF/cv-inline-linetable.s
+++ b/llvm/test/MC/COFF/cv-inline-linetable.s
@@ -47,7 +47,7 @@ Lfunc_begin0:
Lfunc_end0:
# Check the disassembly so we have accurate instruction offsets in hex.
-# ASM-LABEL: ?baz@@YAXXZ:
+# ASM-LABEL: <?baz@@YAXXZ>:
# ASM-NEXT: 0: {{.*}} pushl %eax
# ASM-NEXT: 1: {{.*}} addl $6, 0
# ASM-NEXT: 8: {{.*}} addl $4, 0
diff --git a/llvm/test/MC/COFF/cv-loc-unreachable-2.s b/llvm/test/MC/COFF/cv-loc-unreachable-2.s
index 146158f713ac..b23ddb97282e 100644
--- a/llvm/test/MC/COFF/cv-loc-unreachable-2.s
+++ b/llvm/test/MC/COFF/cv-loc-unreachable-2.s
@@ -6,7 +6,7 @@
# section afterwards. We had negative label
diff erence assertions when .cv_loc
# bound tightly to the next instruction.
-# ASM: 00000000 _callit:
+# ASM: 00000000 <_callit>:
# begin inline {
# ASM-NEXT: 0: e8 00 00 00 00 calll 0 <_callit+0x5>
# ASM-NEXT: 5: 85 c0 testl %eax, %eax
diff --git a/llvm/test/MC/COFF/cv-loc-unreachable.s b/llvm/test/MC/COFF/cv-loc-unreachable.s
index 5ac73e377424..8c7f15d1079f 100644
--- a/llvm/test/MC/COFF/cv-loc-unreachable.s
+++ b/llvm/test/MC/COFF/cv-loc-unreachable.s
@@ -17,7 +17,7 @@
# }
-# ASM: 00000000 _callit:
+# ASM: 00000000 <_callit>:
# begin inline {
# ASM-NEXT: 0: e8 00 00 00 00 calll 0 <_callit+0x5>
# ASM-NEXT: 5: 85 c0 testl %eax, %eax
diff --git a/llvm/test/MC/ELF/relax-arith.s b/llvm/test/MC/ELF/relax-arith.s
index 1591a77f22d0..62caa7cf9c3f 100644
--- a/llvm/test/MC/ELF/relax-arith.s
+++ b/llvm/test/MC/ELF/relax-arith.s
@@ -6,7 +6,7 @@
bar:
// CHECK: Disassembly of section imul:
// CHECK-EMPTY:
-// CHECK-NEXT: imul:
+// CHECK-NEXT: <imul>:
// CHECK-NEXT: 0: 66 69 db 00 00 imulw $0, %bx, %bx
// CHECK-NEXT: 5: 66 69 1c 25 00 00 00 00 00 00 imulw $0, 0, %bx
// CHECK-NEXT: f: 69 db 00 00 00 00 imull $0, %ebx, %ebx
@@ -23,7 +23,7 @@ bar:
// CHECK: Disassembly of section and:
// CHECK-EMPTY:
-// CHECK-NEXT: and:
+// CHECK-NEXT: <and>:
// CHECK-NEXT: 0: 66 81 e3 00 00 andw $0, %bx
// CHECK-NEXT: 5: 66 81 24 25 00 00 00 00 00 00 andw $0, 0
// CHECK-NEXT: f: 81 e3 00 00 00 00 andl $0, %ebx
@@ -38,9 +38,7 @@ bar:
and $foo, %rbx
andq $foo, bar
-// CHECK: Disassembly of section or:
-// CHECK-EMPTY:
-// CHECK-NEXT: or:
+// CHECK: <or>:
// CHECK-NEXT: 0: 66 81 cb 00 00 orw $0, %bx
// CHECK-NEXT: 5: 66 81 0c 25 00 00 00 00 00 00 orw $0, 0
// CHECK-NEXT: f: 81 cb 00 00 00 00 orl $0, %ebx
@@ -57,7 +55,7 @@ bar:
// CHECK: Disassembly of section xor:
// CHECK-EMPTY:
-// CHECK-NEXT: xor:
+// CHECK-NEXT: <xor>:
// CHECK-NEXT: 0: 66 81 f3 00 00 xorw $0, %bx
// CHECK-NEXT: 5: 66 81 34 25 00 00 00 00 00 00 xorw $0, 0
// CHECK-NEXT: f: 81 f3 00 00 00 00 xorl $0, %ebx
@@ -74,7 +72,7 @@ bar:
// CHECK: Disassembly of section add:
// CHECK-EMPTY:
-// CHECK-NEXT: add:
+// CHECK-NEXT: <add>:
// CHECK-NEXT: 0: 66 81 c3 00 00 addw $0, %bx
// CHECK-NEXT: 5: 66 81 04 25 00 00 00 00 00 00 addw $0, 0
// CHECK-NEXT: f: 81 c3 00 00 00 00 addl $0, %ebx
@@ -91,7 +89,7 @@ bar:
// CHECK: Disassembly of section sub:
// CHECK-EMPTY:
-// CHECK-NEXT: sub:
+// CHECK-NEXT: <sub>:
// CHECK-NEXT: 0: 66 81 eb 00 00 subw $0, %bx
// CHECK-NEXT: 5: 66 81 2c 25 00 00 00 00 00 00 subw $0, 0
// CHECK-NEXT: f: 81 eb 00 00 00 00 subl $0, %ebx
@@ -108,7 +106,7 @@ bar:
// CHECK: Disassembly of section cmp:
// CHECK-EMPTY:
-// CHECK-NEXT: cmp:
+// CHECK-NEXT: <cmp>:
// CHECK-NEXT: 0: 66 81 fb 00 00 cmpw $0, %bx
// CHECK-NEXT: 5: 66 81 3c 25 00 00 00 00 00 00 cmpw $0, 0
// CHECK-NEXT: f: 81 fb 00 00 00 00 cmpl $0, %ebx
@@ -125,7 +123,7 @@ bar:
// CHECK: Disassembly of section push:
// CHECK-EMPTY:
-// CHECK-NEXT: push:
+// CHECK-NEXT: <push>:
// CHECK-NEXT: 0: 66 68 00 00 pushw $0
// CHECK-NEXT: 4: 68 00 00 00 00 pushq $0
.section push,"x"
@@ -134,7 +132,7 @@ bar:
// CHECK: Disassembly of section adc:
// CHECK-EMPTY:
-// CHECK-NEXT: adc:
+// CHECK-NEXT: <adc>:
// CHECK-NEXT: 0: 66 81 d3 00 00 adcw $0, %bx
// CHECK-NEXT: 5: 66 81 14 25 00 00 00 00 00 00 adcw $0, 0
// CHECK-NEXT: f: 81 d3 00 00 00 00 adcl $0, %ebx
@@ -151,7 +149,7 @@ bar:
// CHECK: Disassembly of section sbb:
// CHECK-EMPTY:
-// CHECK-NEXT: sbb:
+// CHECK-NEXT: <sbb>:
// CHECK-NEXT: 0: 66 81 db 00 00 sbbw $0, %bx
// CHECK-NEXT: 5: 66 81 1c 25 00 00 00 00 00 00 sbbw $0, 0
// CHECK-NEXT: f: 81 db 00 00 00 00 sbbl $0, %ebx
diff --git a/llvm/test/MC/ELF/relax-arith2.s b/llvm/test/MC/ELF/relax-arith2.s
index 19dacbf64ef2..e75181e64584 100644
--- a/llvm/test/MC/ELF/relax-arith2.s
+++ b/llvm/test/MC/ELF/relax-arith2.s
@@ -6,7 +6,7 @@
bar:
// CHECK: Disassembly of section imul:
// CHECK-EMPTY:
-// CHECK-NEXT: imul:
+// CHECK-NEXT: <imul>:
// CHECK-NEXT: 0: 66 6b db 80 imulw $-128, %bx, %bx
// CHECK-NEXT: 4: 66 6b 1c 25 00 00 00 00 7f imulw $127, 0, %bx
// CHECK-NEXT: d: 6b db 00 imull $0, %ebx, %ebx
@@ -22,9 +22,7 @@ bar:
imul $42, bar, %rbx
-// CHECK: Disassembly of section and:
-// CHECK-EMPTY:
-// CHECK-NEXT: and:
+// CHECK: <and>:
// CHECK-NEXT: 0: 66 83 e3 7f andw $127, %bx
// CHECK-NEXT: 4: 66 83 24 25 00 00 00 00 00 andw $0, 0
// CHECK-NEXT: d: 83 e3 01 andl $1, %ebx
@@ -39,9 +37,7 @@ bar:
and $42, %rbx
andq $-128, bar
-// CHECK: Disassembly of section or:
-// CHECK-EMPTY:
-// CHECK-NEXT: or:
+// CHECK: <or>:
// CHECK-NEXT: 0: 66 83 cb 00 orw $0, %bx
// CHECK-NEXT: 4: 66 83 0c 25 00 00 00 00 01 orw $1, 0
// CHECK-NEXT: d: 83 cb ff orl $-1, %ebx
@@ -56,9 +52,7 @@ bar:
or $-128, %rbx
orq $127, bar
-// CHECK: Disassembly of section xor:
-// CHECK-EMPTY:
-// CHECK-NEXT: xor:
+// CHECK: <xor>:
// CHECK-NEXT: 0: 66 83 f3 01 xorw $1, %bx
// CHECK-NEXT: 4: 66 83 34 25 00 00 00 00 ff xorw $-1, 0
// CHECK-NEXT: d: 83 f3 2a xorl $42, %ebx
@@ -73,9 +67,7 @@ bar:
xor $127, %rbx
xorq $0, bar
-// CHECK: Disassembly of section add:
-// CHECK-EMPTY:
-// CHECK-NEXT: add:
+// CHECK: <add>:
// CHECK-NEXT: 0: 66 83 c3 ff addw $-1, %bx
// CHECK-NEXT: 4: 66 83 04 25 00 00 00 00 2a addw $42, 0
// CHECK-NEXT: d: 83 c3 80 addl $-128, %ebx
@@ -92,7 +84,7 @@ bar:
// CHECK: Disassembly of section sub:
// CHECK-EMPTY:
-// CHECK-NEXT: sub:
+// CHECK-NEXT: <sub>:
// CHECK-NEXT: 0: 66 83 eb 2a subw $42, %bx
// CHECK-NEXT: 4: 66 83 2c 25 00 00 00 00 80 subw $-128, 0
// CHECK-NEXT: d: 83 eb 7f subl $127, %ebx
@@ -109,7 +101,7 @@ bar:
// CHECK: Disassembly of section cmp:
// CHECK-EMPTY:
-// CHECK-NEXT: cmp:
+// CHECK-NEXT: <cmp>:
// CHECK-NEXT: 0: 66 83 fb 80 cmpw $-128, %bx
// CHECK-NEXT: 4: 66 83 3c 25 00 00 00 00 7f cmpw $127, 0
// CHECK-NEXT: d: 83 fb 00 cmpl $0, %ebx
@@ -126,7 +118,7 @@ bar:
// CHECK: Disassembly of section push:
// CHECK-EMPTY:
-// CHECK-NEXT: push:
+// CHECK-NEXT: <push>:
// CHECK-NEXT: 0: 66 6a 80 pushw $-128
// CHECK-NEXT: 3: 66 6a 7f pushw $127
// CHECK-NEXT: 6: 6a 80 pushq $-128
diff --git a/llvm/test/MC/ELF/relax-arith3.s b/llvm/test/MC/ELF/relax-arith3.s
index 88f7ba30e325..7588bbafc662 100644
--- a/llvm/test/MC/ELF/relax-arith3.s
+++ b/llvm/test/MC/ELF/relax-arith3.s
@@ -6,7 +6,7 @@
bar:
// CHECK: Disassembly of section imul:
// CHECK-EMPTY:
-// CHECK-NEXT: imul:
+// CHECK-NEXT: <imul>:
// CHECK-NEXT: 0: 66 69 1d 00 00 00 00 00 00 imulw $0, (%rip), %bx
// CHECK-NEXT: 9: 69 1d 00 00 00 00 00 00 00 00 imull $0, (%rip), %ebx
// CHECK-NEXT: 13: 48 69 1d 00 00 00 00 00 00 00 00 imulq $0, (%rip), %rbx
@@ -16,9 +16,7 @@ bar:
imul $foo, bar(%rip), %rbx
-// CHECK: Disassembly of section and:
-// CHECK-EMPTY:
-// CHECK-NEXT: and:
+// CHECK: <and>:
// CHECK-NEXT: 0: 66 81 25 00 00 00 00 00 00 andw $0, (%rip)
// CHECK-NEXT: 9: 81 25 00 00 00 00 00 00 00 00 andl $0, (%rip)
// CHECK-NEXT: 13: 48 81 25 00 00 00 00 00 00 00 00 andq $0, (%rip)
@@ -27,9 +25,7 @@ bar:
andl $foo, bar(%rip)
andq $foo, bar(%rip)
-// CHECK: Disassembly of section or:
-// CHECK-EMPTY:
-// CHECK-NEXT: or:
+// CHECK: <or>:
// CHECK-NEXT: 0: 66 81 0d 00 00 00 00 00 00 orw $0, (%rip)
// CHECK-NEXT: 9: 81 0d 00 00 00 00 00 00 00 00 orl $0, (%rip)
// CHECK-NEXT: 13: 48 81 0d 00 00 00 00 00 00 00 00 orq $0, (%rip)
@@ -38,9 +34,7 @@ bar:
orl $foo, bar(%rip)
orq $foo, bar(%rip)
-// CHECK: Disassembly of section xor:
-// CHECK-EMPTY:
-// CHECK-NEXT: xor:
+// CHECK: <xor>:
// CHECK-NEXT: 0: 66 81 35 00 00 00 00 00 00 xorw $0, (%rip)
// CHECK-NEXT: 9: 81 35 00 00 00 00 00 00 00 00 xorl $0, (%rip)
// CHECK-NEXT: 13: 48 81 35 00 00 00 00 00 00 00 00 xorq $0, (%rip)
@@ -49,9 +43,7 @@ bar:
xorl $foo, bar(%rip)
xorq $foo, bar(%rip)
-// CHECK: Disassembly of section add:
-// CHECK-EMPTY:
-// CHECK-NEXT: add:
+// CHECK: <add>:
// CHECK-NEXT: 0: 66 81 05 00 00 00 00 00 00 addw $0, (%rip)
// CHECK-NEXT: 9: 81 05 00 00 00 00 00 00 00 00 addl $0, (%rip)
// CHECK-NEXT: 13: 48 81 05 00 00 00 00 00 00 00 00 addq $0, (%rip)
@@ -60,9 +52,7 @@ bar:
addl $foo, bar(%rip)
addq $foo, bar(%rip)
-// CHECK: Disassembly of section sub:
-// CHECK-EMPTY:
-// CHECK-NEXT: sub:
+// CHECK: <sub>:
// CHECK-NEXT: 0: 66 81 2d 00 00 00 00 00 00 subw $0, (%rip)
// CHECK-NEXT: 9: 81 2d 00 00 00 00 00 00 00 00 subl $0, (%rip)
// CHECK-NEXT: 13: 48 81 2d 00 00 00 00 00 00 00 00 subq $0, (%rip)
@@ -71,9 +61,7 @@ bar:
subl $foo, bar(%rip)
subq $foo, bar(%rip)
-// CHECK: Disassembly of section cmp:
-// CHECK-EMPTY:
-// CHECK-NEXT: cmp:
+// CHECK: <cmp>:
// CHECK-NEXT: 0: 66 81 3d 00 00 00 00 00 00 cmpw $0, (%rip)
// CHECK-NEXT: 9: 81 3d 00 00 00 00 00 00 00 00 cmpl $0, (%rip)
// CHECK-NEXT: 13: 48 81 3d 00 00 00 00 00 00 00 00 cmpq $0, (%rip)
diff --git a/llvm/test/MC/ELF/relax-arith4.s b/llvm/test/MC/ELF/relax-arith4.s
index 2a01fb3e7ab1..a4760fd7672d 100644
--- a/llvm/test/MC/ELF/relax-arith4.s
+++ b/llvm/test/MC/ELF/relax-arith4.s
@@ -6,7 +6,7 @@
// CHECK: Disassembly of section push8:
// CHECK-EMPTY:
-// CHECK-NEXT: push8:
+// CHECK-NEXT: <push8>:
// CHECK-NEXT: 0: 66 6a 80 pushw $-128
// CHECK-NEXT: 3: 66 6a 7f pushw $127
// CHECK-NEXT: 6: 6a 80 pushl $-128
@@ -19,7 +19,7 @@
// CHECK: Disassembly of section push32:
// CHECK-EMPTY:
-// CHECK-NEXT: push32:
+// CHECK-NEXT: <push32>:
// CHECK-NEXT: 0: 66 68 00 00 pushw $0
// CHECK-NEXT: 4: 68 00 00 00 00 pushl $0
.section push32,"x"
diff --git a/llvm/test/MC/Hexagon/missing_label.s b/llvm/test/MC/Hexagon/missing_label.s
index 80f69472029c..f916f2f4310a 100644
--- a/llvm/test/MC/Hexagon/missing_label.s
+++ b/llvm/test/MC/Hexagon/missing_label.s
@@ -4,5 +4,5 @@
.I1:
nop
-# CHECK: .I1:
+# CHECK: <.I1>:
# CHECK: nop
diff --git a/llvm/test/MC/Mips/cpsetup.s b/llvm/test/MC/Mips/cpsetup.s
index c963df09ce6e..0e27a80bc3a5 100644
--- a/llvm/test/MC/Mips/cpsetup.s
+++ b/llvm/test/MC/Mips/cpsetup.s
@@ -2,7 +2,7 @@
# RUN: llvm-objdump -d -r -z - | FileCheck -check-prefixes=ALL,O32 %s
# RUN: llvm-mc -triple mips-unknown-linux -target-abi o32 %s | \
-# RUN: FileCheck -check-prefixes=ALL,ASM,ASM-O32 %s
+# RUN: FileCheck -check-prefixes=ASM,ASM-O32 %s
# FIXME: Now we check .cpsetup expansion for `-mno-shared` case only.
# We also need to implement/check the `-mshared` case.
@@ -11,14 +11,14 @@
# RUN: FileCheck -check-prefixes=ALL,NXX,N32 %s
# RUN: llvm-mc -triple mips64-unknown-linux -target-abi n32 %s | \
-# RUN: FileCheck -check-prefixes=ALL,ASM,ASM-N32 %s
+# RUN: FileCheck -check-prefixes=ASM,ASM-N32 %s
# RUN: llvm-mc -triple mips64-unknown-linux %s -filetype=obj -o - | \
# RUN: llvm-objdump -d -r -z - | \
# RUN: FileCheck -check-prefixes=ALL,NXX,N64 %s
# RUN: llvm-mc -triple mips64-unknown-linux %s | \
-# RUN: FileCheck -check-prefixes=ALL,ASM,ASM-N64 %s
+# RUN: FileCheck -check-prefixes=ASM,ASM-N64 %s
.text
.option pic2
@@ -28,7 +28,8 @@ t1:
.cpreturn
nop
-# ALL-LABEL: t1:
+# ALL-LABEL: <t1>:
+# ASM-LABEL: t1:
# O32-NOT: __cerror
@@ -45,7 +46,7 @@ t1:
# ALL-NEXT: nop
-# ASM-NEXT: .cpreturn
+# ASM: .cpreturn
# NXX-NEXT: ld $gp, 8($sp)
# ALL-NEXT: nop
@@ -56,7 +57,8 @@ t2:
.cpreturn
nop
-# ALL-LABEL: t2:
+# ALL-LABEL: <t2>:
+# ASM-LABEL: t2:
# O32-NOT: __cerror
@@ -73,7 +75,7 @@ t2:
# ALL-NEXT: nop
-# ASM-NEXT: .cpreturn
+# ASM: .cpreturn
# NXX-NEXT: move $gp, $2
# ALL-NEXT: nop
@@ -90,7 +92,8 @@ t3:
nop
sub $3, $3, $2
-# ALL-LABEL: t3:
+# ALL-LABEL: <t3>:
+# ASM-LABEL: t3:
# ALL-NEXT: nop
# O32-NEXT: nop
@@ -129,7 +132,8 @@ t4:
# by checking that the next instruction after the first
# nop is also a 'nop'.
-# ALL-LABEL: t4:
+# ALL-LABEL: <t4>:
+# ASM-LABEL: t4:
# NXX-NEXT: nop
# NXX-NEXT: nop
@@ -147,7 +151,8 @@ t5:
.cpsetup $25, ((8*4) - (3*8)), __cerror
nop
-# ALL-LABEL: t5:
+# ALL-LABEL: <t5>:
+# ASM-LABEL: t5:
# O32-NOT: __cerror
@@ -171,7 +176,8 @@ IMM_8 = 8
.cpreturn
nop
-# ALL-LABEL: t1b:
+# ALL-LABEL: <t1b>:
+# ASM-LABEL: t1b:
# ASM-NEXT: .set IMM_8, 8
# O32-NOT: __cerror
@@ -189,7 +195,7 @@ IMM_8 = 8
# ALL-NEXT: nop
-# ASM-NEXT: .cpreturn
+# ASM: .cpreturn
# NXX-NEXT: ld $gp, 8($sp)
# ALL-NEXT: nop
diff --git a/llvm/test/MC/Mips/higher-highest-addressing.s b/llvm/test/MC/Mips/higher-highest-addressing.s
index 790b0a06892d..e3df151caab4 100644
--- a/llvm/test/MC/Mips/higher-highest-addressing.s
+++ b/llvm/test/MC/Mips/higher-highest-addressing.s
@@ -10,7 +10,7 @@
# relocations.
test1:
-# CHECK-LABEL: test1:
+# CHECK-LABEL: <test1>:
lui $5, %highest(func)
daddiu $5, $5, %higher(func)
@@ -27,7 +27,7 @@ test1:
# ((x + 0x800080008000) >> 48) & 0xffff (highest).
test2:
-# CHECK-LABEL: test2:
+# CHECK-LABEL: <test2>:
# Check the case where relocations are not modified by adding +1. The constant
# is chosen so that it is just below the value that triggers the addition of +1
diff --git a/llvm/test/MC/Mips/instr-analysis.s b/llvm/test/MC/Mips/instr-analysis.s
index 58abfd0f4723..3ee8df3dd231 100644
--- a/llvm/test/MC/Mips/instr-analysis.s
+++ b/llvm/test/MC/Mips/instr-analysis.s
@@ -1,19 +1,19 @@
# RUN: llvm-mc -filetype=obj -triple=mips-unknown-linux %s -o - \
# RUN: | llvm-objdump -d - | FileCheck %s
-# CHECK: foo:
+# CHECK: <foo>:
# CHECK-NEXT: 0: 0c 00 00 02 jal 8 <loc1>
# CHECK-NEXT: 4: 00 00 00 00 nop
#
-# CHECK: loc1:
+# CHECK: <loc1>:
# CHECK-NEXT: 8: 0c 00 00 06 jal 24 <loc3>
# CHECK-NEXT: c: 00 00 00 00 nop
#
-# CHECK: loc2:
+# CHECK: <loc2>:
# CHECK-NEXT: 10: 10 00 ff fd b -8 <loc1>
# CHECK-NEXT: 14: 00 00 00 00 nop
#
-# CHECK: loc3:
+# CHECK: <loc3>:
# CHECK-NEXT: 18: 10 43 ff fd beq $2, $3, -8 <loc2>
# CHECK-NEXT: 1c: 00 00 00 00 nop
# CHECK-NEXT: 20: 04 11 ff f9 bal -24 <loc1>
diff --git a/llvm/test/MC/Mips/micromips-jump-pc-region.s b/llvm/test/MC/Mips/micromips-jump-pc-region.s
index 5f598fc016ff..9c4ce4989be9 100644
--- a/llvm/test/MC/Mips/micromips-jump-pc-region.s
+++ b/llvm/test/MC/Mips/micromips-jump-pc-region.s
@@ -5,7 +5,7 @@
# Force us into the second 256 MB region with a non-zero instruction index
.org 256*1024*1024 + 12
-# CHECK-LABEL: 1000000c foo:
+# CHECK-LABEL: 1000000c <foo>:
# CHECK-NEXT: 1000000c: d4 00 00 06 j 12 <foo>
# CHECK-NEXT: 10000010: f4 00 00 08 jal 16 <foo+0x4>
# CHECK-NEXT: 10000014: f0 00 00 05 jalx 20 <foo+0x8>
diff --git a/llvm/test/MC/Mips/mips-jump-pc-region.s b/llvm/test/MC/Mips/mips-jump-pc-region.s
index 2d6bbce3a492..af7e96948d86 100644
--- a/llvm/test/MC/Mips/mips-jump-pc-region.s
+++ b/llvm/test/MC/Mips/mips-jump-pc-region.s
@@ -7,7 +7,7 @@
# Force us into the second 256 MB region with a non-zero instruction index
.org 256*1024*1024 + 12
-# CHECK-LABEL: 1000000c foo:
+# CHECK-LABEL: 1000000c <foo>:
# CHECK-NEXT: 1000000c: 08 00 00 03 j 12 <foo>
# CHECK-NEXT: 10000010: 0c 00 00 04 jal 16 <foo+0x4>
# CHECK-NEXT: 10000014: 74 00 00 05 jalx 20 <foo+0x8>
diff --git a/llvm/test/MC/Mips/nacl-mask.s b/llvm/test/MC/Mips/nacl-mask.s
index e7eba3769ac0..17247a8d92f3 100644
--- a/llvm/test/MC/Mips/nacl-mask.s
+++ b/llvm/test/MC/Mips/nacl-mask.s
@@ -17,7 +17,7 @@ test1:
jr $ra
nop
-# CHECK-LABEL: test1:
+# CHECK-LABEL: <test1>:
# CHECK: and $4, $4, $14
# CHECK-NEXT: jr $4
@@ -54,7 +54,7 @@ test2:
lw $4, 0($sp)
lw $4, 0($t8)
-# CHECK-LABEL: test2:
+# CHECK-LABEL: <test2>:
# CHECK: and $1, $1, $15
# CHECK-NEXT: lb $4, 0($1)
@@ -122,7 +122,7 @@ test3:
sw $4, 0($sp)
sw $4, 0($t8)
-# CHECK-LABEL: test3:
+# CHECK-LABEL: <test3>:
# CHECK: and $1, $1, $15
# CHECK-NEXT: sb $4, 0($1)
@@ -179,7 +179,7 @@ test4:
lw $sp, 123($sp)
sw $sp, 123($sp)
-# CHECK-LABEL: test4:
+# CHECK-LABEL: <test4>:
# CHECK: addiu $sp, $sp, 24
# CHECK-NEXT: and $sp, $sp, $15
@@ -254,7 +254,7 @@ test5:
# CHECK: nop
# CHECK-NEXT: nop
-# CHECK-LABEL: test5:
+# CHECK-LABEL: <test5>:
# CHECK-NEXT: jal
# CHECK-NEXT: addiu $4, $zero, 1
@@ -304,7 +304,7 @@ test6:
# CHECK: nop
# CHECK-NEXT: nop
-# CHECK-LABEL: test6:
+# CHECK-LABEL: <test6>:
# CHECK-NEXT: jal
# CHECK-NEXT: sw $4, 0($sp)
diff --git a/llvm/test/MC/Mips/set-defined-symbol.s b/llvm/test/MC/Mips/set-defined-symbol.s
index 20988779783b..061fec37bb21 100644
--- a/llvm/test/MC/Mips/set-defined-symbol.s
+++ b/llvm/test/MC/Mips/set-defined-symbol.s
@@ -9,10 +9,10 @@
a:
nop
# CHECK-NOT: a:
-# CHECK: foo:
+# CHECK: <foo>:
b:
nop
# CHECK-NOT: b:
# CHECK-NOT: foo:
-# CHECK: bar:
+# CHECK: <bar>:
diff --git a/llvm/test/MC/Mips/sext_64_32.ll b/llvm/test/MC/Mips/sext_64_32.ll
index f6c468187d7b..f5c4a87625d2 100644
--- a/llvm/test/MC/Mips/sext_64_32.ll
+++ b/llvm/test/MC/Mips/sext_64_32.ll
@@ -11,7 +11,7 @@ entry:
ret i64 %conv
}
-; CHECK-LABEL: foo_2:
+; CHECK-LABEL: <foo_2>:
; CHECK: dext ${{[a-z0-9]+}}, ${{[a-z0-9]+}}, 0, 32
define i64 @foo_2(i32 %ival_2) nounwind readnone {
diff --git a/llvm/test/MC/PowerPC/ppc64-dq-expr.s b/llvm/test/MC/PowerPC/ppc64-dq-expr.s
index fc0d618456d6..6f5b910bd468 100644
--- a/llvm/test/MC/PowerPC/ppc64-dq-expr.s
+++ b/llvm/test/MC/PowerPC/ppc64-dq-expr.s
@@ -22,7 +22,7 @@ test:
.comm vecB, 16, 16
# CHECK: Disassembly of section .text:
-# CHECK-LABEL: test:
+# CHECK-LABEL: <test>:
# CHECK-NEXT: addis 2, 12, 0
# CHECK-NEXT: R_PPC64_REL16_HA .TOC.
# CHECK-NEXT: addi 2, 2, 0
diff --git a/llvm/test/MC/PowerPC/ppc64-prefix-align.s b/llvm/test/MC/PowerPC/ppc64-prefix-align.s
index 5dd62482567f..6875e9dfb7a0 100644
--- a/llvm/test/MC/PowerPC/ppc64-prefix-align.s
+++ b/llvm/test/MC/PowerPC/ppc64-prefix-align.s
@@ -53,12 +53,12 @@ paddi 1, 2, 8589934576, 0
addi 2, 3, 15 # 60
# CHECK-BE: b8: 38 43 00 0f
# CHECK-BE-NEXT: bc: 60 00 00 00 nop
-# CHECK-BE: LAB1:
+# CHECK-BE: <LAB1>:
# CHECK-BE-NEXT: c0: 06 01 ff ff
# CHECK-BE-NEXT: c4: 38 22 ff f0
# CHECK-LE: b8: 0f 00 43 38
# CHECK-LE-NEXT: bc: 00 00 00 60 nop
-# CHECK-LE: LAB1:
+# CHECK-LE: <LAB1>:
# CHECK-LE-NEXT: c0: ff ff 01 06
# CHECK-LE-NEXT: c4: f0 ff 22 38
LAB1: paddi 1, 2, 8589934576, 0
@@ -70,12 +70,12 @@ paddi 1, 2, 8589934576, 0
paddi 1, 2, 8589934576, 0
addi 2, 3, 15 # 60
# CHECK-BE: f8: 38 43 00 0f
-# CHECK-BE: LAB2:
+# CHECK-BE: <LAB2>:
# CHECK-BE-NEXT: fc: 60 00 00 00 nop
# CHECK-BE-NEXT: 100: 06 01 ff ff
# CHECK-BE-NEXT: 104: 38 22 ff f0
# CHECK-LE: f8: 0f 00 43 38
-# CHECK-LE: LAB2:
+# CHECK-LE: <LAB2>:
# CHECK-LE-NEXT: fc: 00 00 00 60 nop
# CHECK-LE-NEXT: 100: ff ff 01 06
# CHECK-LE-NEXT: 104: f0 ff 22 38
diff --git a/llvm/test/MC/RISCV/option-mix.s b/llvm/test/MC/RISCV/option-mix.s
index fdbb42ca80e2..a5f384ab0c5a 100644
--- a/llvm/test/MC/RISCV/option-mix.s
+++ b/llvm/test/MC/RISCV/option-mix.s
@@ -21,17 +21,17 @@
.option pop
la a1, another_symbol
-# ASM-LABEL: .Lpcrel_hi0:
+# ASM-LABEL: .Lpcrel_hi0{{>?}}:
# ASM-NEXT: auipc a0, %pcrel_hi(a_symbol)
# ASM-NEXT: addi a0, a0, %pcrel_lo(.Lpcrel_hi0)
-# ASM-LABEL: .Lpcrel_hi1:
+# ASM-LABEL: .Lpcrel_hi1{{>?}}:
# ASM-NEXT: auipc a1, %pcrel_hi(another_symbol)
# ASM-NEXT: addi a1, a1, %pcrel_lo(.Lpcrel_hi1)
-# DISASM-LABEL: .Lpcrel_hi0:
+# DISASM-LABEL: <.Lpcrel_hi0>:
# DISASM-NEXT: auipc a0, 0
# DISASM-NEXT: addi a0, a0, 0
-# DISASM-LABEL:.Lpcrel_hi1:
+# DISASM-LABEL: <.Lpcrel_hi1>:
# DISASM-NEXT: auipc a1, 0
# DISASM-NEXT: addi a1, a1, 0
@@ -43,17 +43,17 @@
2:auipc a1, %pcrel_hi(another_symbol)
addi a1, a1, %pcrel_lo(2b)
-# ASM-LABEL: .Ltmp0:
+# ASM-LABEL: .Ltmp0{{>?}}:
# ASM-NEXT: auipc a0, %pcrel_hi(a_symbol)
# ASM-NEXT: addi a0, a0, %pcrel_lo(.Ltmp0)
-# ASM-LABEL: .Ltmp1:
+# ASM-LABEL: .Ltmp1{{>?}}:
# ASM-NEXT: auipc a1, %pcrel_hi(another_symbol)
# ASM-NEXT: addi a1, a1, %pcrel_lo(.Ltmp1)
-# DISASM-LABEL: .Ltmp0:
+# DISASM-LABEL: .Ltmp0{{>?}}:
# DISASM-NEXT: auipc a0, 0
# DISASM-NEXT: addi a0, a0, 0
-# DISASM-LABEL: .Ltmp1:
+# DISASM-LABEL: .Ltmp1{{>?}}:
# DISASM-NEXT: auipc a1, 0
# DISASM-NEXT: addi a1, a1, 0
@@ -66,19 +66,19 @@
local_symbol1:
nop
-# ASM-LABEL: .Lpcrel_hi2:
+# ASM-LABEL: .Lpcrel_hi2{{>?}}:
# ASM-NEXT: auipc a0, %pcrel_hi(a_symbol)
# ASM-NEXT: addi a0, a0, %pcrel_lo(.Lpcrel_hi2)
-# ASM-LABEL: .Lpcrel_hi3:
+# ASM-LABEL: .Lpcrel_hi3{{>?}}:
# ASM-NEXT: auipc a1, %pcrel_hi(local_symbol1)
# ASM-NEXT: addi a1, a1, %pcrel_lo(.Lpcrel_hi3)
-# DISASM-LABEL: .Lpcrel_hi2:
+# DISASM-LABEL: .Lpcrel_hi2{{>?}}:
# DISASM-NEXT: auipc a0, 0
# DISASM-NEXT: addi a0, a0, 0
# DISASM-NORELAX-NEXT: auipc a1, 0
# DISASM-NORELAX-NEXT: addi a1, a1, 8
-# DISASM-RELAX-LABEL: .Lpcrel_hi3:
+# DISASM-RELAX-LABEL: .Lpcrel_hi3{{>?}}:
# DISASM-RELAX-NEXT: auipc a1, 0
# DISASM-RELAX-NEXT: addi a1, a1, 0
@@ -93,18 +93,18 @@ local_symbol1:
local_symbol2:
nop
-# ASM-LABEL: .Ltmp2:
+# ASM-LABEL: .Ltmp2{{>?}}:
# ASM-NEXT: auipc a0, %pcrel_hi(a_symbol)
# ASM-NEXT: addi a0, a0, %pcrel_lo(.Ltmp2)
-# ASM-LABEL: .Ltmp3:
+# ASM-LABEL: .Ltmp3{{>?}}:
# ASM-NEXT: auipc a1, %pcrel_hi(local_symbol2)
# ASM-NEXT: addi a1, a1, %pcrel_lo(.Ltmp3)
-# DISASM-LABEL: .Ltmp2:
+# DISASM-LABEL: .Ltmp2{{>?}}:
# DISASM-NEXT: auipc a0, 0
# DISASM-NEXT: addi a0, a0, 0
# DISASM-NORELAX-NEXT: auipc a1, 0
# DISASM-NORELAX-NEXT: addi a1, a1, 8
-# DISASM-RELAX-LABEL: .Ltmp3:
+# DISASM-RELAX-LABEL: .Ltmp3{{>?}}:
# DISASM-RELAX-NEXT: auipc a1, 0
# DISASM-RELAX-NEXT: addi a1, a1, 0
diff --git a/llvm/test/MC/Sparc/sparc-tls-relocations.s b/llvm/test/MC/Sparc/sparc-tls-relocations.s
index 2c59f764539b..6e0149e6414b 100644
--- a/llvm/test/MC/Sparc/sparc-tls-relocations.s
+++ b/llvm/test/MC/Sparc/sparc-tls-relocations.s
@@ -19,7 +19,7 @@
! REL: ]
-! OBJDUMP: foo:
+! OBJDUMP: <foo>:
foo:
! Here we use two
diff erent sequences to get the address of a static TLS variable 'Local'
! (note - there is no intent to have valid assembler function here,
diff --git a/llvm/test/MC/SystemZ/directive-insn.s b/llvm/test/MC/SystemZ/directive-insn.s
index 372132567e5b..e647615efffc 100644
--- a/llvm/test/MC/SystemZ/directive-insn.s
+++ b/llvm/test/MC/SystemZ/directive-insn.s
@@ -15,7 +15,7 @@
.insn rie,0xec0000000076,%r1,%r2,12
#CHECK: ec 12 00 03 00 64 cgrj %r1, %r2, 0, 0x12
.insn rie,0xec0000000064,%r1,%r2,label.rie
-#CHECK: label.rie:
+#CHECK: <label.rie>:
label.rie:
# GAS considers this instruction's immediate operand to be PC relative.
@@ -23,7 +23,7 @@ label.rie:
.insn ril,0xc60d00000000,%r1,12
#CHECK: c6 18 00 00 00 03 cgrl %r1, 0x1e
.insn ril,0xc60800000000,%r1,label.ril
-#CHECK: label.ril:
+#CHECK: <label.ril>:
label.ril:
#CHECK: c2 2b 80 00 00 00 alfi %r2, 2147483648
@@ -58,7 +58,7 @@ label.ril:
.insn rsi,0x84000000,%r1,%r3,8
#CHECK: 84 13 00 02 brxh %r1, %r3, 0x4a
.insn rsi,0x84000000,%r1,%r3,label.rsi
-#CHECK: label.rsi:
+#CHECK: <label.rsi>:
label.rsi:
# RSE formats are short displacement versions of the RSY formats.
diff --git a/llvm/test/MC/WebAssembly/objdump.s b/llvm/test/MC/WebAssembly/objdump.s
index 4030ba9c2c76..947402a0a614 100644
--- a/llvm/test/MC/WebAssembly/objdump.s
+++ b/llvm/test/MC/WebAssembly/objdump.s
@@ -16,11 +16,11 @@ test1:
# CHECK-LABEL: CODE:
# CHECK: # 2 functions in section.
-# CHECK-LABEL: test0:
+# CHECK-LABEL: <test0>:
# CHECK-NEXT: .local f32, f64, v128, v128
# CHECK-NEXT: 9: 20 02 local.get 2
# CHECK-NEXT: b: 0b end
-# CHECK-LABEL: test1:
+# CHECK-LABEL: <test1>:
# CHECK-NEXT: .local i32, i64, exnref
# CHECK-NEXT: 14: 20 03 local.get 3
# CHECK-NEXT: 16: 0b end
diff --git a/llvm/test/MC/X86/AlignedBundling/labeloffset.s b/llvm/test/MC/X86/AlignedBundling/labeloffset.s
index 5b2efe079650..16c606bdda2b 100644
--- a/llvm/test/MC/X86/AlignedBundling/labeloffset.s
+++ b/llvm/test/MC/X86/AlignedBundling/labeloffset.s
@@ -11,7 +11,7 @@
.align 32, 0x90
.type main, at function
main: # @main
-# CHECK-LABEL: main:
+# CHECK-LABEL: <main>:
# Call + pop sequence for determining the PIC base.
.bundle_lock align_to_end
calll .L0$pb
@@ -81,5 +81,5 @@ tmp3:
.comm obj,4,4
.section .text.foo
inc %eax
-# CHECK: tmp3:
+# CHECK: <tmp3>:
# CHECK-NEXT: 1: incl
diff --git a/llvm/test/MC/X86/AlignedBundling/nesting.s b/llvm/test/MC/X86/AlignedBundling/nesting.s
index 16ed5a44da56..dc433c926295 100644
--- a/llvm/test/MC/X86/AlignedBundling/nesting.s
+++ b/llvm/test/MC/X86/AlignedBundling/nesting.s
@@ -6,7 +6,7 @@
# Will be bundle-aligning to 16 byte boundaries
.bundle_align_mode 4
.text
-# CHECK-LABEL: foo:
+# CHECK-LABEL: <foo>:
.type foo, at function
foo:
# Test that bundle alignment mode can be set more than once.
@@ -24,7 +24,7 @@ foo:
# CHECK-NEXT: 15: callq {{.*}} <bar>
.p2align 4
-# CHECK-LABEL: bar:
+# CHECK-LABEL: <bar>:
.type bar, at function
bar:
callq foo
@@ -40,7 +40,7 @@ bar:
# CHECK: 36: callq {{.*}} <bar>
# CHECK-NEXT: 3b: callq {{.*}} <bar>
-# CHECK-LABEL: baz:
+# CHECK-LABEL: <baz>:
.type baz, at function
baz:
callq foo
diff --git a/llvm/test/MC/X86/align-branch-32-1a.s b/llvm/test/MC/X86/align-branch-32-1a.s
index 646024e71e93..ed11539d7d23 100644
--- a/llvm/test/MC/X86/align-branch-32-1a.s
+++ b/llvm/test/MC/X86/align-branch-32-1a.s
@@ -1,7 +1,7 @@
# Check NOP padding is disabled before instruction that has variant symbol operand.
# RUN: llvm-mc -filetype=obj -triple i386-unknown-unknown --x86-align-branch-boundary=32 --x86-align-branch=call %s | llvm-objdump -d - | FileCheck %s
-# CHECK: 00000000 foo:
+# CHECK: 00000000 <foo>:
# CHECK-COUNT-5: : 64 a3 01 00 00 00 movl %eax, %fs:1
# CHECK: 1e: e8 fc ff ff ff calll {{.*}}
# CHECK-COUNT-4: : 64 a3 01 00 00 00 movl %eax, %fs:1
diff --git a/llvm/test/MC/X86/align-branch-64-1a.s b/llvm/test/MC/X86/align-branch-64-1a.s
index 49f1406e0947..02818b295439 100644
--- a/llvm/test/MC/X86/align-branch-64-1a.s
+++ b/llvm/test/MC/X86/align-branch-64-1a.s
@@ -10,7 +10,7 @@
# RUN: llvm-mc -filetype=obj -triple x86_64-unknown-unknown %p/Inputs/align-branch-64-1.s | llvm-objdump -d - > %t4
# RUN: cmp %t3 %t4
-# CHECK: 0000000000000000 foo:
+# CHECK: 0000000000000000 <foo>:
# CHECK-COUNT-3: : 64 89 04 25 01 00 00 00 movl %eax, %fs:1
# CHECK: 18: 48 39 c5 cmpq %rax, %rbp
# CHECK-NEXT: 1b: 31 c0 xorl %eax, %eax
diff --git a/llvm/test/MC/X86/align-branch-64-1b.s b/llvm/test/MC/X86/align-branch-64-1b.s
index 994b6c04deff..73864ba89a87 100644
--- a/llvm/test/MC/X86/align-branch-64-1b.s
+++ b/llvm/test/MC/X86/align-branch-64-1b.s
@@ -1,7 +1,7 @@
# Check only fused conditional jumps and conditional jumps are aligned with option --x86-align-branch-boundary=32 --x86-align-branch=fused+jcc
# RUN: llvm-mc -filetype=obj -triple x86_64-unknown-unknown --x86-align-branch-boundary=32 --x86-align-branch=fused+jcc %p/Inputs/align-branch-64-1.s | llvm-objdump -d - | FileCheck %s
-# CHECK: 0000000000000000 foo:
+# CHECK: 0000000000000000 <foo>:
# CHECK-COUNT-3: : 64 89 04 25 01 00 00 00 movl %eax, %fs:1
# CHECK-NEXT: 18: 48 39 c5 cmpq %rax, %rbp
# CHECK-NEXT: 1b: 31 c0 xorl %eax, %eax
diff --git a/llvm/test/MC/X86/align-branch-64-1c.s b/llvm/test/MC/X86/align-branch-64-1c.s
index 5f9301101755..3207f540d208 100644
--- a/llvm/test/MC/X86/align-branch-64-1c.s
+++ b/llvm/test/MC/X86/align-branch-64-1c.s
@@ -1,7 +1,7 @@
# Check only conditional jumps are aligned with option --x86-align-branch-boundary=32 --x86-align-branch=jcc
# RUN: llvm-mc -filetype=obj -triple x86_64-unknown-unknown --x86-align-branch-boundary=32 --x86-align-branch=jcc %p/Inputs/align-branch-64-1.s | llvm-objdump -d - | FileCheck %s
-# CHECK: 0000000000000000 foo:
+# CHECK: 0000000000000000 <foo>:
# CHECK-COUNT-3: : 64 89 04 25 01 00 00 00 movl %eax, %fs:1
# CHECK: 18: 48 39 c5 cmpq %rax, %rbp
# CHECK-NEXT: 1b: 31 c0 xorl %eax, %eax
diff --git a/llvm/test/MC/X86/align-branch-64-1d.s b/llvm/test/MC/X86/align-branch-64-1d.s
index d39aeb1b9890..902bb69fec16 100644
--- a/llvm/test/MC/X86/align-branch-64-1d.s
+++ b/llvm/test/MC/X86/align-branch-64-1d.s
@@ -6,7 +6,7 @@
# RUN: llvm-mc -filetype=obj -triple x86_64-unknown-unknown --x86-align-branch-boundary=32 -mcpu=x86-64 --x86-align-branch=jcc+jmp %p/Inputs/align-branch-64-1.s | llvm-objdump -d - >%t2
# RUN: FileCheck --input-file=%t2 %s --check-prefixes=CHECK,LONG-NOP
-# CHECK: 0000000000000000 foo:
+# CHECK: 0000000000000000 <foo>:
# CHECK-COUNT-3: : 64 89 04 25 01 00 00 00 movl %eax, %fs:1
# CHECK: 18: 48 39 c5 cmpq %rax, %rbp
# CHECK-NEXT: 1b: 31 c0 xorl %eax, %eax
diff --git a/llvm/test/MC/X86/align-branch-64-2a.s b/llvm/test/MC/X86/align-branch-64-2a.s
index 0652840cbc29..f7a61c3499f0 100644
--- a/llvm/test/MC/X86/align-branch-64-2a.s
+++ b/llvm/test/MC/X86/align-branch-64-2a.s
@@ -1,7 +1,7 @@
# Check only indirect jumps are aligned with option --x86-align-branch-boundary=32 --x86-align-branch=indirect
# RUN: llvm-mc -filetype=obj -triple x86_64-unknown-unknown --x86-align-branch-boundary=32 --x86-align-branch=indirect %p/Inputs/align-branch-64-2.s | llvm-objdump -d - | FileCheck %s
-# CHECK: 0000000000000000 foo:
+# CHECK: 0000000000000000 <foo>:
# CHECK-COUNT-3: : 64 89 04 25 01 00 00 00 movl %eax, %fs:1
# CHECK-COUNT-2: : 89 75 f4 movl %esi, -12(%rbp)
# CHECK-COUNT-2: : 90 nop
diff --git a/llvm/test/MC/X86/align-branch-64-2b.s b/llvm/test/MC/X86/align-branch-64-2b.s
index 91494fa36ba3..d483cda99611 100644
--- a/llvm/test/MC/X86/align-branch-64-2b.s
+++ b/llvm/test/MC/X86/align-branch-64-2b.s
@@ -1,7 +1,7 @@
# Check only calls are aligned with option --x86-align-branch-boundary=32 --x86-align-branch=call
# RUN: llvm-mc -filetype=obj -triple x86_64-unknown-unknown --x86-align-branch-boundary=32 --x86-align-branch=call %p/Inputs/align-branch-64-2.s | llvm-objdump -d - | FileCheck %s
-# CHECK: 0000000000000000 foo:
+# CHECK: 0000000000000000 <foo>:
# CHECK-COUNT-3: : 64 89 04 25 01 00 00 00 movl %eax, %fs:1
# CHECK-COUNT-2: : 89 75 f4 movl %esi, -12(%rbp)
# CHECK: 1e: ff e0 jmpq *%rax
diff --git a/llvm/test/MC/X86/align-branch-64-2c.s b/llvm/test/MC/X86/align-branch-64-2c.s
index 6754feb85f2f..9c047f0f6a24 100644
--- a/llvm/test/MC/X86/align-branch-64-2c.s
+++ b/llvm/test/MC/X86/align-branch-64-2c.s
@@ -1,7 +1,7 @@
# Check only indirect jumps and calls are aligned with option --x86-align-branch-boundary=32 --x86-align-branch=indirect+call
# RUN: llvm-mc -filetype=obj -triple x86_64-unknown-unknown --x86-align-branch-boundary=32 --x86-align-branch=indirect+call %p/Inputs/align-branch-64-2.s | llvm-objdump -d - | FileCheck %s
-# CHECK: 0000000000000000 foo:
+# CHECK: 0000000000000000 <foo>:
# CHECK-COUNT-3: : 64 89 04 25 01 00 00 00 movl %eax, %fs:1
# CHECK-COUNT-2: : 89 75 f4 movl %esi, -12(%rbp)
# CHECK-COUNT-2: : 90 nop
diff --git a/llvm/test/MC/X86/align-branch-64-3a.s b/llvm/test/MC/X86/align-branch-64-3a.s
index 47cdd10102f8..3df9347cad30 100644
--- a/llvm/test/MC/X86/align-branch-64-3a.s
+++ b/llvm/test/MC/X86/align-branch-64-3a.s
@@ -1,7 +1,7 @@
# Check NOP padding is disabled before instruction that has variant symbol operand.
# RUN: llvm-mc -filetype=obj -triple x86_64-unknown-unknown --x86-align-branch-boundary=32 --x86-align-branch=jmp+call %s | llvm-objdump -d - | FileCheck %s
-# CHECK: 0000000000000000 foo:
+# CHECK: 0000000000000000 <foo>:
# CHECK-COUNT-3: : 64 89 04 25 01 00 00 00 movl %eax, %fs:1
# CHECK-COUNT-2: : 48 89 e5 movq %rsp, %rbp
# CHECK: 1e: e8 00 00 00 00 callq {{.*}}
diff --git a/llvm/test/MC/X86/align-branch-64-4a.s b/llvm/test/MC/X86/align-branch-64-4a.s
index a1db0e56b2b9..e7b1e8c9d87b 100644
--- a/llvm/test/MC/X86/align-branch-64-4a.s
+++ b/llvm/test/MC/X86/align-branch-64-4a.s
@@ -1,7 +1,7 @@
# Check only rets are aligned with option --x86-align-branch-boundary=32 --x86-align-branch=ret
# RUN: llvm-mc -filetype=obj -triple x86_64-unknown-unknown --x86-align-branch-boundary=32 --x86-align-branch=ret %s | llvm-objdump -d - | FileCheck %s
-# CHECK: 0000000000000000 foo:
+# CHECK: 0000000000000000 <foo>:
# CHECK-COUNT-3: : 64 89 04 25 01 00 00 00 movl %eax, %fs:1
# CHECK-COUNT-2: : 48 89 e5 movq %rsp, %rbp
# CHECK: 1e: 5a popq %rdx
diff --git a/llvm/test/MC/X86/align-branch-64-5a.s b/llvm/test/MC/X86/align-branch-64-5a.s
index 1d4dbd5300ca..b78b743b88da 100644
--- a/llvm/test/MC/X86/align-branch-64-5a.s
+++ b/llvm/test/MC/X86/align-branch-64-5a.s
@@ -4,7 +4,7 @@
# RUN: cmp %t1 %t2
# RUN: FileCheck --input-file=%t1 %s
-# CHECK: 0000000000000000 foo:
+# CHECK: 0000000000000000 <foo>:
# CHECK-COUNT-3: : 64 89 04 25 01 00 00 00 movl %eax, %fs:1
# CHECK: 18: c1 e9 02 shrl $2, %ecx
# CHECK-NEXT: 1b: 89 d1 movl %edx, %ecx
diff --git a/llvm/test/MC/X86/align-branch-64-6a.s b/llvm/test/MC/X86/align-branch-64-6a.s
index 4a046f8e0640..0a78eb556fa7 100644
--- a/llvm/test/MC/X86/align-branch-64-6a.s
+++ b/llvm/test/MC/X86/align-branch-64-6a.s
@@ -2,7 +2,7 @@
# RUN: llvm-mc -filetype=obj -triple x86_64-unknown-unknown --x86-align-branch-boundary=32 --x86-align-branch=fused+jcc+jmp+indirect+call+ret --mc-relax-all %s | llvm-objdump -d - > %t1
# RUN: FileCheck --input-file=%t1 %s
-# CHECK: 0000000000000000 foo:
+# CHECK: 0000000000000000 <foo>:
# CHECK-NEXT: 0: 64 89 04 25 01 00 00 00 movl %eax, %fs:1
# CHECK-NEXT: 8: 64 89 04 25 01 00 00 00 movl %eax, %fs:1
# CHECK-NEXT: 10: 64 89 04 25 01 00 00 00 movl %eax, %fs:1
diff --git a/llvm/test/MC/X86/align-branch-64-7a.s b/llvm/test/MC/X86/align-branch-64-7a.s
index f38e9c7694ce..54fd3c6a6d59 100644
--- a/llvm/test/MC/X86/align-branch-64-7a.s
+++ b/llvm/test/MC/X86/align-branch-64-7a.s
@@ -2,7 +2,7 @@
# RUN: llvm-mc -filetype=obj -triple x86_64-unknown-unknown --x86-align-branch-boundary=16 --x86-align-branch=fused+jcc --mc-relax-all %s | llvm-objdump -d - > %t1
# RUN: FileCheck --input-file=%t1 %s
-# CHECK: 0000000000000000 foo:
+# CHECK: 0000000000000000 <foo>:
# CHECK-NEXT: 0: 55 pushq %rbp
# CHECK-NEXT: 1: 48 f7 c2 02 00 00 00 testq $2, %rdx
# CHECK-NEXT: 8: 0f 85 f2 ff ff ff jne {{.*}}
diff --git a/llvm/test/MC/X86/align-branch-64-negative.s b/llvm/test/MC/X86/align-branch-64-negative.s
index c310e4700012..54e9e70561e5 100644
--- a/llvm/test/MC/X86/align-branch-64-negative.s
+++ b/llvm/test/MC/X86/align-branch-64-negative.s
@@ -11,8 +11,8 @@
# In the first test, we have a label which is expected to be bound to the
# start of the call. For instance, we want to associate a fault on the call
# target with some bit of higher level sementic.
- # CHECK: labeled_call_test1:
- # CHECK: 1f label_before
+ # CHECK-LABEL: <labeled_call_test1>:
+ # CHECK: 1f <label_before>:
# CHECK: 1f: nop
# CHECK: 20: callq
.globl labeled_call_test1
@@ -27,10 +27,10 @@ label_before:
# In the second test, we have a label which is expected to be bound to the
# end of the call. For instance, we want the to associate some data with
# the return address of the call.
- # CHECK: labeled_call_test2:
+ # CHECK-LABEL: <labeled_call_test2>:
# CHECK: 5a: callq
# CHECK: 5f: nop
- # CHECK: 60 label_after
+ # CHECK: 60 <label_after>:
# CHECK: 60: jmp
.globl labeled_call_test2
.p2align 5
@@ -45,8 +45,8 @@ label_after:
# Our third test is like the first w/a labeled fault, but specifically to
# a fused memory comparison. This is the form produced by implicit null
# checks for instance.
- # CHECK: implicit_null_check:
- # CHECK: 9f fault_addr
+ # CHECK-LABEL: <implicit_null_check>:
+ # CHECK: 9f <fault_addr>:
# CHECK: 9f: nop
# CHECK: a0: cmpq
.globl implicit_null_check
diff --git a/llvm/test/MC/X86/align-branch-64.s b/llvm/test/MC/X86/align-branch-64.s
index f021e2fbecdc..0b056b320a20 100644
--- a/llvm/test/MC/X86/align-branch-64.s
+++ b/llvm/test/MC/X86/align-branch-64.s
@@ -14,7 +14,7 @@
# Next couple tests are checking the edge cases on the alignment computation
.text
- # CHECK: test1:
+ # CHECK: <test1>:
# CHECK: 20: callq
.globl test1
.p2align 5
@@ -24,7 +24,7 @@ test1:
.endr
callq bar
- # CHECK: test2:
+ # CHECK: <test2>:
# CHECK: 60: callq
.globl test2
.p2align 5
@@ -34,7 +34,7 @@ test2:
.endr
callq bar
- # CHECK: test3:
+ # CHECK: <test3>:
# CHECK: a0: callq
.globl test3
.p2align 5
@@ -46,7 +46,7 @@ test3:
# next couple check instruction type coverage
- # CHECK: test_jmp:
+ # CHECK: <test_jmp>:
# CHECK: e0: jmp
.globl test_jmp
.p2align 5
@@ -56,7 +56,7 @@ test_jmp:
.endr
jmp bar
- # CHECK: test_ret:
+ # CHECK: <test_ret>:
# CHECK: 120: retq
.globl test_ret
.p2align 5
@@ -68,7 +68,7 @@ test_ret:
# check a case with a relaxable instruction
- # CHECK: test_jmp_far:
+ # CHECK: <test_jmp_far>:
# CHECK: 160: jmp
.globl test_jmp_far
.p2align 5
@@ -78,7 +78,7 @@ test_jmp_far:
.endr
jmp baz
- # CHECK: test_jcc:
+ # CHECK: <test_jcc>:
# CHECK: 1a0: jne
.globl test_jcc
.p2align 5
@@ -88,7 +88,7 @@ test_jcc:
.endr
jne bar
- # CHECK: test_indirect:
+ # CHECK: <test_indirect>:
# CHECK: 1e0: jmp
.globl test_indirect
.p2align 5
@@ -103,7 +103,7 @@ test_indirect:
bar:
retq
- # CHECK: test_pad_via_relax:
+ # CHECK: <test_pad_via_relax>:
# CHECK: 200: testq
# CHECK: 203: jne
# CHECK: 209: int3
@@ -123,7 +123,7 @@ test_pad_via_relax:
# This case looks really tempting to pad, but doing so for the call causes
# the jmp to be misaligned.
- # CHECK: test_pad_via_relax_neg1:
+ # CHECK: <test_pad_via_relax_neg1>:
# CHECK: 240: int3
# CHECK: 25a: testq
# CHECK: 25d: jne
@@ -140,7 +140,7 @@ test_pad_via_relax_neg1:
callq bar
# Same as previous, but without fusion
- # CHECK: test_pad_via_relax_neg2:
+ # CHECK: <test_pad_via_relax_neg2>:
# CHECK: 280: int3
# CHECK: 29d: jmp
# CHECK: 29f: nop
diff --git a/llvm/test/MC/X86/align-via-relaxation.s b/llvm/test/MC/X86/align-via-relaxation.s
index b80caed9ce84..7d91eaacf9a9 100644
--- a/llvm/test/MC/X86/align-via-relaxation.s
+++ b/llvm/test/MC/X86/align-via-relaxation.s
@@ -30,7 +30,7 @@ foo:
# Check that we're not shifting aroudn the offsets of labels - doing
# that would require a further round of relaxation
- # CHECK: bar:
+ # CHECK: <bar>:
# CHECK: 22: eb fe jmp -2 <bar>
# CHECK: 24: 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:(%rax,%rax)
# CHECK: 2e: 66 90 nop
@@ -45,18 +45,18 @@ nobypass:
# Canonical toy loop to show benefit - we can align the loop header with
# fewer nops by relaxing the branch, even though we don't need to
- # CHECK: loop_preheader:
+ # CHECK: <loop_preheader>:
# CHECK: 45: 48 85 c0 testq %rax, %rax
# CHECK: 48: 0f 8e 22 00 00 00 jle 34 <loop_exit>
# CHECK: 4e: 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:(%rax,%rax)
# CHECK: 58: 0f 1f 84 00 00 00 00 00 nopl (%rax,%rax)
- # CHECK: loop_header:
+ # CHECK: <loop_header>:
# CHECK: 60: 48 83 e8 01 subq $1, %rax
# CHECK: 64: 48 85 c0 testq %rax, %rax
# CHECK: 67: 7e 07 jle 7 <loop_exit>
# CHECK: 69: e9 f2 ff ff ff jmp -14 <loop_header>
# CHECK: 6e: 66 90 nop
- # CHECK: loop_exit:
+ # CHECK: <loop_exit>:
# CHECK: 70: c3 retq
.p2align 5
.skip 5
diff --git a/llvm/test/MC/X86/code16-32-64.s b/llvm/test/MC/X86/code16-32-64.s
index 42da46a06d08..eda2edf1d9b7 100644
--- a/llvm/test/MC/X86/code16-32-64.s
+++ b/llvm/test/MC/X86/code16-32-64.s
@@ -14,7 +14,7 @@ foo:
.code64
retq
-# CHECK: foo:
+# CHECK: <foo>:
# CHECK-NEXT: 67 8b 00 movl (%eax), %eax
# CHECK-NEXT: 8b 00 movl (%rax), %eax
# CHECK-NEXT: 67 66 8b 00 movw (%eax), %ax
diff --git a/llvm/test/MC/X86/disassemble-zeroes.s b/llvm/test/MC/X86/disassemble-zeroes.s
index b84b86808fba..c046a50440b2 100644
--- a/llvm/test/MC/X86/disassemble-zeroes.s
+++ b/llvm/test/MC/X86/disassemble-zeroes.s
@@ -5,7 +5,7 @@
// This test checks that we follow these rules and can force
// dissasembly of zero blocks with the -z and --disassemble-zeroes options.
-// NODISASM: 0000000000000000 main:
+// NODISASM: 0000000000000000 <main>:
// NODISASM-NEXT: 0: 00 00 addb %al, (%rax)
// NODISASM-NEXT: 2: 00 00 addb %al, (%rax)
// NODISASM-NEXT: 4: 00 00 addb %al, (%rax)
@@ -13,16 +13,16 @@
// NODISASM-NEXT: ...
// NODISASM-NEXT: 20: 90 nop
// NODISASM-NEXT: ...
-// NODISASM: 0000000000000031 foo:
+// NODISASM: 0000000000000031 <foo>:
// NODISASM-NEXT: 31: 00 00 addb %al, (%rax)
// NODISASM-NEXT: 33: 00 00 addb %al, (%rax)
-// NODISASM: 0000000000000035 bar:
+// NODISASM: 0000000000000035 <bar>:
// NODISASM-NEXT: ...
// Check that with -z we disassemble blocks of zeroes.
// RUN: llvm-objdump -d -z %t | FileCheck %s --check-prefix=DISASM
-// DISASM: 0000000000000000 main:
+// DISASM: 0000000000000000 <main>:
// DISASM-NEXT: 0: 00 00 addb %al, (%rax)
// DISASM-NEXT: 2: 00 00 addb %al, (%rax)
// DISASM-NEXT: 4: 00 00 addb %al, (%rax)
@@ -46,10 +46,10 @@
// DISASM-NEXT: 2b: 00 00 addb %al, (%rax)
// DISASM-NEXT: 2d: 00 00 addb %al, (%rax)
// DISASM-NEXT: 2f: 00 00 addb %al, (%rax)
-// DISASM: 0000000000000031 foo:
+// DISASM: 0000000000000031 <foo>:
// DISASM-NEXT: 31: 00 00 addb %al, (%rax)
// DISASM-NEXT: 33: 00 00 addb %al, (%rax)
-// DISASM: 0000000000000035 bar:
+// DISASM: 0000000000000035 <bar>:
// DISASM-NEXT: 35: 00 00 addb %al, (%rax)
// DISASM-NEXT: 37: 00 00 addb %al, (%rax)
// DISASM-NEXT: 39: 00 00 addb %al, (%rax)
diff --git a/llvm/test/Object/AMDGPU/objdump.s b/llvm/test/Object/AMDGPU/objdump.s
index 1fd51d0c1abb..063124e3428b 100644
--- a/llvm/test/Object/AMDGPU/objdump.s
+++ b/llvm/test/Object/AMDGPU/objdump.s
@@ -47,30 +47,30 @@ BB5:
// CHECK: file format elf64-amdgpu
// CHECK: Disassembly of section .text:
-// CHECK: hello_world:
+// CHECK: <hello_world>:
// CHECK: s_mov_b32 m0, 0x10000 // 000000000100: BEFC00FF 00010000
// CHECK: s_load_dwordx2 s[0:1], s[4:5], 0x8 // 000000000108: C0060002 00000008
// CHECK: s_waitcnt lgkmcnt(0) // 000000000110: BF8C007F
// CHECK: s_add_u32 s0, s7, s0 // 000000000114: 80000007
-// CHECK: BB0:
+// CHECK: <BB0>:
// CHECK: v_add_u32_e32 v1, vcc, s0, v1 // 000000000118: 32020200
-// CHECK: BB1:
+// CHECK: <BB1>:
// CHECK: s_movk_i32 s0, 0x483 // 00000000011C: B0000483
// CHECK: v_cmp_ge_i32_e32 vcc, s0, v0 // 000000000120: 7D8C0000
// CHECK: s_and_saveexec_b64 s[0:1], vcc // 000000000124: BE80206A
// CHECK: v_lshlrev_b32_e32 v4, 2, v0 // 000000000128: 24080082
-// CHECK: BB3:
+// CHECK: <BB3>:
// CHECK: s_cbranch_execz 21 // 00000000012C: BF880015
// CHECK: s_mov_b64 s[2:3], exec // 000000000130: BE82017E
// CHECK: s_mov_b64 s[10:11], exec // 000000000134: BE8A017E
// CHECK: v_mov_b32_e32 v3, v0 // 000000000138: 7E060300
// CHECK: s_endpgm // 00000000013C: BF810000
-// CHECK: hello_world2:
+// CHECK: <hello_world2>:
// CHECK: s_and_saveexec_b64 s[0:1], vcc // 000000000240: BE80206A
// CHECK: s_cbranch_execz 85 // 000000000244: BF880055
// CHECK: s_load_dwordx4 s[8:11], s[4:5], 0x40 // 000000000248: C00A0202 00000040
-// CHECK: BB5:
+// CHECK: <BB5>:
// CHECK: v_ashrrev_i32_e32 v77, 31, v76 // 000000000250: 229A989F
// CHECK: v_lshlrev_b64 v[10:11], 2, v[76:77] // 000000000254: D28F000A 00029882
// CHECK: s_waitcnt lgkmcnt(0) // 00000000025C: BF8C007F
diff --git a/llvm/test/Object/Mips/feature.test b/llvm/test/Object/Mips/feature.test
index eea33b9325ba..6363b82cd508 100644
--- a/llvm/test/Object/Mips/feature.test
+++ b/llvm/test/Object/Mips/feature.test
@@ -1,12 +1,12 @@
RUN: llvm-objdump -disassemble %p/../Inputs/dext-test.elf-mips64r2 | FileCheck %s
CHECK: Disassembly of section .text:
-CHECK: dext:
+CHECK: <dext>:
CHECK: 0: 08 00 e0 03 jr $ra
CHECK: 4: 43 49 82 7c dext $2, $4, 5, 10
-CHECK: dextu:
+CHECK: <dextu>:
CHECK: 8: 08 00 e0 03 jr $ra
CHECK: c: 83 28 82 7c dext $2, $4, 2, 6
-CHECK: dextm:
+CHECK: <dextm>:
CHECK: 10: 08 00 e0 03 jr $ra
CHECK: 14: 43 09 82 7c dext $2, $4, 5, 2
diff --git a/llvm/test/Object/Mips/objdump-micro-mips.test b/llvm/test/Object/Mips/objdump-micro-mips.test
index 6ce1cdc1c19b..81b6632f4efb 100644
--- a/llvm/test/Object/Mips/objdump-micro-mips.test
+++ b/llvm/test/Object/Mips/objdump-micro-mips.test
@@ -1,11 +1,11 @@
RUN: llvm-objdump -d %p/../Inputs/micro-mips.elf-mipsel | FileCheck %s
-CHECK: foo:
+CHECK: <foo>:
CHECK-NEXT: 330: bd 33 f8 ff addiu $sp, $sp, -8
CHECK-NEXT: 334: dd fb 04 00 sw $fp, 4($sp)
CHECK-NEXT: 338: 1d 00 50 f1 addu $fp, $sp, $zero
-CHECK: bar:
+CHECK: <bar>:
CHECK-NEXT: 350: a2 41 02 00 lui $2, 2
CHECK-NEXT: 354: 42 30 8f 80 addiu $2, $2, -32625
CHECK-NEXT: 358: bd 33 e8 ff addiu $sp, $sp, -24
diff --git a/llvm/test/Object/X86/objdump-disassembly-inline-relocations.test b/llvm/test/Object/X86/objdump-disassembly-inline-relocations.test
index eca416a55c7a..0ac9046b11e9 100644
--- a/llvm/test/Object/X86/objdump-disassembly-inline-relocations.test
+++ b/llvm/test/Object/X86/objdump-disassembly-inline-relocations.test
@@ -37,7 +37,7 @@
# MACHO-i386: file format mach-o 32-bit i386
# MACHO-i386: Disassembly of section __TEXT,__text:
-# MACHO-i386: _main:
+# MACHO-i386: <_main>:
# MACHO-i386: 0: 83 ec 0c subl $12, %esp
# MACHO-i386: 3: c7 44 24 08 00 00 00 00 movl $0, 8(%esp)
# MACHO-i386: b: c7 04 24 24 00 00 00 movl $36, (%esp)
@@ -55,7 +55,7 @@
# MACHO-x86-64: file format mach-o 64-bit x86-64
# MACHO-x86-64: Disassembly of section __TEXT,__text:
-# MACHO-x86-64: _main:
+# MACHO-x86-64: <_main>:
# MACHO-x86-64: 0: 48 83 ec 08 subq $8, %rsp
# MACHO-x86-64: 4: c7 44 24 04 00 00 00 00 movl $0, 4(%rsp)
# MACHO-x86-64: c: 48 8d 3d 00 00 00 00 leaq (%rip), %rdi
@@ -74,7 +74,7 @@
# ELF-i386: file format elf32-i386
# ELF-i386: Disassembly of section .text:
-# ELF-i386: main:
+# ELF-i386: <main>:
# ELF-i386: 0: 83 ec 0c subl $12, %esp
# ELF-i386: 3: c7 44 24 08 00 00 00 00 movl $0, 8(%esp)
# ELF-i386: b: c7 04 24 00 00 00 00 movl $0, (%esp)
@@ -172,7 +172,7 @@ Symbols:
# ELF-x86-64: file format elf64-x86-64
# ELF-x86-64: Disassembly of section .text:
-# ELF-x86-64: main:
+# ELF-x86-64: <main>:
# ELF-x86-64: 0: 48 83 ec 08 subq $8, %rsp
# ELF-x86-64: 4: c7 44 24 04 00 00 00 00 movl $0, 4(%rsp)
# ELF-x86-64: c: bf 00 00 00 00 movl $0, %edi
diff --git a/llvm/test/Object/X86/objdump-label.test b/llvm/test/Object/X86/objdump-label.test
index 4354168a9f4f..500d2f496084 100644
--- a/llvm/test/Object/X86/objdump-label.test
+++ b/llvm/test/Object/X86/objdump-label.test
@@ -3,8 +3,8 @@ RUN: | FileCheck %s -check-prefix ELF-x86-64
ELF-x86-64: file format elf64-x86-64
ELF-x86-64: Disassembly of section .text:
-ELF-x86-64: foo:
+ELF-x86-64: <foo>:
ELF-x86-64: 0: 90 nop
-ELF-x86-64: bum:
+ELF-x86-64: <bum>:
ELF-x86-64: 1: 90 nop
diff --git a/llvm/test/tools/llvm-objdump/AArch64/elf-aarch64-mapping-symbols.test b/llvm/test/tools/llvm-objdump/AArch64/elf-aarch64-mapping-symbols.test
index 6904ae72f556..1d988c6ebe5f 100644
--- a/llvm/test/tools/llvm-objdump/AArch64/elf-aarch64-mapping-symbols.test
+++ b/llvm/test/tools/llvm-objdump/AArch64/elf-aarch64-mapping-symbols.test
@@ -15,16 +15,16 @@ mystr:
.size mystr, 4
# CHECK: Disassembly of section .mysection:
-# CHECK: _start:
+# CHECK: <_start>:
# CHECK: 0: 21 00 00 10 adr x1, #4
-# CHECK: msg:
+# CHECK: <msg>:
# CHECK: 4: 48 65 6c 6c .word
# CHECK: 8: 6f 2c 20 77 .word
# CHECK: c: 6f 72 6c 64 .word
# CHECK: 10: 0a 00 .short 0x000a
# CHECK: Disassembly of section .myothersection:
-# CHECK: $x.2:
+# CHECK: <$x.2>:
# CHECK: 0: 01 00 00 90 adrp x1, #0
-# CHECK: mystr:
+# CHECK: <mystr>:
# CHECK: 4: 62 6c 61 68 .word
# CHECK: 8: 00 .byte 0x01
diff --git a/llvm/test/tools/llvm-objdump/AArch64/macho-zerofill.s b/llvm/test/tools/llvm-objdump/AArch64/macho-zerofill.s
index b790bb89f089..dec8514e4425 100644
--- a/llvm/test/tools/llvm-objdump/AArch64/macho-zerofill.s
+++ b/llvm/test/tools/llvm-objdump/AArch64/macho-zerofill.s
@@ -5,5 +5,5 @@
.zerofill __DATA,__common,_data64unsigned,472,3
// CHECK: Disassembly of section __DATA,__common:
-// CHECK: ltmp1:
+// CHECK: <ltmp1>:
// CHECK-NEXT: ...
diff --git a/llvm/test/tools/llvm-objdump/AArch64/plt.test b/llvm/test/tools/llvm-objdump/AArch64/plt.test
index 5b3eff331d3c..c08ff1ccca68 100644
--- a/llvm/test/tools/llvm-objdump/AArch64/plt.test
+++ b/llvm/test/tools/llvm-objdump/AArch64/plt.test
@@ -1,7 +1,7 @@
# RUN: llvm-objdump -d %p/Inputs/cfi.elf-aarch64 | FileCheck %s
# CHECK: Disassembly of section .plt:
-# CHECK: __cfi_slowpath at plt:
+# CHECK: <__cfi_slowpath at plt>:
# CHECK-NEXT: adrp x16, {{.*}}
# CHECK: bl {{.*}} <__cfi_slowpath at plt>
@@ -11,10 +11,10 @@
# CHECK-BTI: bl {{.*}} <f1 at plt>
# CHECK-BTI: bl {{.*}} <f2 at plt>
# CHECK-BTI: Disassembly of section .plt:
-# CHECK-BTI: f1 at plt:
+# CHECK-BTI: <f1 at plt>:
# CHECK-BTI-NEXT: bti c
# CHECK-BTI-NEXT: adrp x16, {{.*}}
-# CHECK-BTI: f2 at plt:
+# CHECK-BTI: <f2 at plt>:
# CHECK-BTI-NEXT: bti c
# CHECK-BTI-NEXT: adrp x16, {{.*}}
diff --git a/llvm/test/tools/llvm-objdump/AMDGPU/source-lines.ll b/llvm/test/tools/llvm-objdump/AMDGPU/source-lines.ll
index 2c5900858a42..0fbed0a8178e 100644
--- a/llvm/test/tools/llvm-objdump/AMDGPU/source-lines.ll
+++ b/llvm/test/tools/llvm-objdump/AMDGPU/source-lines.ll
@@ -4,7 +4,7 @@
; RUN: llvm-objdump -triple=amdgcn-amd-amdhsa -mcpu=gfx802 -disassemble -source %t.o | FileCheck --check-prefix=SOURCE %t.ll
; Prologue.
-; LINE: source_lines_test:
+; LINE: source_lines_test{{>?}}:
; LINE-NEXT: ; source_lines_test():
; LINE-NEXT: ; {{.*}}source-lines.cl:1
; Kernel.
@@ -21,7 +21,7 @@
; LINE-NEXT: s_endpgm
; Prologue.
-; SOURCE: source_lines_test:
+; SOURCE: source_lines_test{{>?}}:
; SOURCE-NEXT: ; kernel void source_lines_test(global int *Out) {
; Kernel.
; SOURCE: v_mov_b32_e32 v{{[0-9]+}}, 0x777
diff --git a/llvm/test/tools/llvm-objdump/ARM/unknown-instr.test b/llvm/test/tools/llvm-objdump/ARM/unknown-instr.test
index 2e4628084147..8055e63c1874 100644
--- a/llvm/test/tools/llvm-objdump/ARM/unknown-instr.test
+++ b/llvm/test/tools/llvm-objdump/ARM/unknown-instr.test
@@ -12,7 +12,7 @@
##
## llvm-objdump -mattr=+ext1
-# CHECK: 00000000 .text:
+# CHECK: 00000000 <.text>:
# CHECK-NEXT: 0: cb <unknown>
# CHECK-NEXT: 1: f3 f7 8b be b.w #-49898
diff --git a/llvm/test/tools/llvm-objdump/Hexagon/source-interleave-hexagon.ll b/llvm/test/tools/llvm-objdump/Hexagon/source-interleave-hexagon.ll
index 69058f4baa3d..96f1ab424440 100644
--- a/llvm/test/tools/llvm-objdump/Hexagon/source-interleave-hexagon.ll
+++ b/llvm/test/tools/llvm-objdump/Hexagon/source-interleave-hexagon.ll
@@ -65,9 +65,9 @@ attributes #1 = { nounwind readnone }
!21 = !DILocation(line: 8, column: 15, scope: !14)
!22 = !DILocation(line: 8, column: 13, scope: !14)
!23 = !DILocation(line: 8, column: 3, scope: !14)
-; LINES: main:
+; LINES: <main>:
; LINES-NEXT: main():
; LINES-NEXT: SRC_COMPDIR/source-interleave-hexagon.c:6
-; SOURCE: main:
+; SOURCE: <main>:
; SOURCE-NEXT: int main() {
diff --git a/llvm/test/tools/llvm-objdump/PowerPC/branch-offset.s b/llvm/test/tools/llvm-objdump/PowerPC/branch-offset.s
index 7843fca1c9ba..38588a3774cb 100644
--- a/llvm/test/tools/llvm-objdump/PowerPC/branch-offset.s
+++ b/llvm/test/tools/llvm-objdump/PowerPC/branch-offset.s
@@ -7,10 +7,10 @@
# RUN: llvm-mc -triple=powerpc-unknown-linux -filetype=obj %s -o %t.o
# RUN: llvm-objdump -d %t.o | FileCheck %s
-# CHECK: {{0*}}00000000 callee_back:
+# CHECK: {{0*}}00000000 <callee_back>:
# CHECK: 18: {{.*}} bl .-24
# CHECK: 20: {{.*}} bl .+16
-# CHECK: {{0*}}00000030 callee_forward:
+# CHECK: {{0*}}00000030 <callee_forward>:
.text
.global caller
diff --git a/llvm/test/tools/llvm-objdump/X86/adjust-vma.test b/llvm/test/tools/llvm-objdump/X86/adjust-vma.test
index bbe9b69b7e76..d5159227f350 100644
--- a/llvm/test/tools/llvm-objdump/X86/adjust-vma.test
+++ b/llvm/test/tools/llvm-objdump/X86/adjust-vma.test
@@ -32,41 +32,41 @@
# COMMON-NEXT: 0000000000000000 l .text 0000000000000000 sym
# COMMON-NEXT: 0000000000000000 l d .text 0000000000000000 .text
-# NOADJUST: 0000000000000000 sym:
+# NOADJUST: 0000000000000000 <sym>:
# NOADJUST-NEXT: 0: {{.*}} nop
-# NOADJUST: 0000000000000001 func:
+# NOADJUST: 0000000000000001 <func>:
# NOADJUST-NEXT: 1: {{.*}} retq
-# ADJUST: 0000000000123000 sym:
+# ADJUST: 0000000000123000 <sym>:
# ADJUST-NEXT: 123000: {{.*}} nop
-# ADJUST: 0000000000123001 func:
+# ADJUST: 0000000000123001 <func>:
# ADJUST-NEXT: 123001: {{.*}} retq
-# NOADJUST: 0000000000000000 .debug_str:
+# NOADJUST: 0000000000000000 <.debug_str>:
# NOADJUST-NEXT: 0: {{.*}} %al, (%rax)
# NOADJUST-NEXT: 0000000000000001: R_X86_64_32 .text
# NOADJUST-NEXT: 2: {{.*}} addb %al, (%rax)
-# ADJUST: 0000000000000000 .debug_str:
+# ADJUST: 0000000000000000 <.debug_str>:
# ADJUST-NEXT: 0: {{.*}} %al, (%rax)
# ADJUST-NEXT: 0000000000123001: R_X86_64_32 .text
# ADJUST-NEXT: 2: {{.*}} addb %al, (%rax)
-# COMMON: 0000000000000000 .rela.debug_str:
+# COMMON: 0000000000000000 <.rela.debug_str>:
# COMMON-NEXT: 0: {{.*}} addl %eax, (%rax)
## ... There are more lines here. We do not care.
-# NOADJUST: 0000000000000000 .data:
+# NOADJUST: 0000000000000000 <.data>:
# NOADJUST-NEXT: 0: {{.*}} addb %al, (%rax)
# NOADJUST-NEXT: 0000000000000000: R_X86_64_32 .text
# NOADJUST-NEXT: 2: {{.*}} addb %al, (%rax)
-# ADJUST: 0000000000123000 .data:
+# ADJUST: 0000000000123000 <.data>:
# ADJUST-NEXT: 123000: {{.*}} addb %al, (%rax)
# ADJUST-NEXT: 0000000000123000: R_X86_64_32 .text
# ADJUST-NEXT: 123002: {{.*}} addb %al, (%rax)
-# COMMON: 0000000000000000 .rela.data:
+# COMMON: 0000000000000000 <.rela.data>:
# COMMON-NEXT: 0: {{.*}} addb %al, (%rax)
## ... There are more lines here. We do not care.
diff --git a/llvm/test/tools/llvm-objdump/X86/coff-disassemble-export.test b/llvm/test/tools/llvm-objdump/X86/coff-disassemble-export.test
index 2f0b211815cf..5cd01bcfa70d 100644
--- a/llvm/test/tools/llvm-objdump/X86/coff-disassemble-export.test
+++ b/llvm/test/tools/llvm-objdump/X86/coff-disassemble-export.test
@@ -1,7 +1,7 @@
// RUN: llvm-objdump -d %p/Inputs/disassemble.dll.coff-i386 | \
// RUN: FileCheck %s
-// CHECK-LABEL: g:
+// CHECK-LABEL: <g>:
// CHECK: calll 8 <f>
// CHECK-LABEL: f:
diff --git a/llvm/test/tools/llvm-objdump/X86/demangle.s b/llvm/test/tools/llvm-objdump/X86/demangle.s
index 0c5e177b4103..d555bbf5ac74 100644
--- a/llvm/test/tools/llvm-objdump/X86/demangle.s
+++ b/llvm/test/tools/llvm-objdump/X86/demangle.s
@@ -10,7 +10,7 @@
## Check the case when relocations are inlined into disassembly.
# RUN: llvm-objdump -d -r --demangle %t | FileCheck %s --check-prefix=INLINE
-# INLINE: foo():
+# INLINE: <foo()>:
# INLINE-NEXT: 0: {{.*}} callq 0 <_Z3foov+0x5>
# INLINE-NEXT: 0000000000000001: R_X86_64_PLT32 foo()-0x4
diff --git a/llvm/test/tools/llvm-objdump/X86/disassemble-functions-mangling.test b/llvm/test/tools/llvm-objdump/X86/disassemble-functions-mangling.test
index 23329c982dff..e85590671748 100644
--- a/llvm/test/tools/llvm-objdump/X86/disassemble-functions-mangling.test
+++ b/llvm/test/tools/llvm-objdump/X86/disassemble-functions-mangling.test
@@ -19,17 +19,17 @@
# RUN: llvm-objdump -C --disassemble-functions='std::allocator<wchar_t>::allocator()' %t.o 2>&1 \
# RUN: | FileCheck %s --check-prefix=DEMANGLED-MULTI
-# MANGLED: _Z3foov:
+# MANGLED: <_Z3foov>:
# MANGLED-MISS: warning: '{{.*}}': failed to disassemble missing function foo
-# DEMANGLED: foo():
+# DEMANGLED: <foo()>:
# DEMANGLED-MISS: warning: '{{.*}}': failed to disassemble missing function _Z3foov
-# NOMANGLE: i:
-# NOMANGLE: f:
+# NOMANGLE: <i>:
+# NOMANGLE: <f>:
-# DEMANGLED-MULTI: std::allocator<wchar_t>::allocator():
-# DEMANGLED-MULTI: std::allocator<wchar_t>::allocator():
+# DEMANGLED-MULTI: <std::allocator<wchar_t>::allocator()>:
+# DEMANGLED-MULTI: <std::allocator<wchar_t>::allocator()>:
--- !ELF
FileHeader:
diff --git a/llvm/test/tools/llvm-objdump/X86/disassemble-functions.test b/llvm/test/tools/llvm-objdump/X86/disassemble-functions.test
index 988afb37b77b..85d75f42a08d 100644
--- a/llvm/test/tools/llvm-objdump/X86/disassemble-functions.test
+++ b/llvm/test/tools/llvm-objdump/X86/disassemble-functions.test
@@ -7,8 +7,8 @@
# RUN: llvm-objdump -d %t.out --disassemble-functions=main,foo \
# RUN: | FileCheck %s --check-prefixes=MAIN,FOO --implicit-check-not=somedata
-# FOO: foo:
-# MAIN: main:
+# FOO: <foo>:
+# MAIN: <main>:
## Unknown symbol name.
# RUN: llvm-objdump -d %t.out --disassemble-functions=baz \
diff --git a/llvm/test/tools/llvm-objdump/X86/disassemble-implied-by-disassemble-functions.test b/llvm/test/tools/llvm-objdump/X86/disassemble-implied-by-disassemble-functions.test
index 58d99b355810..eceaf69dfa6b 100644
--- a/llvm/test/tools/llvm-objdump/X86/disassemble-implied-by-disassemble-functions.test
+++ b/llvm/test/tools/llvm-objdump/X86/disassemble-implied-by-disassemble-functions.test
@@ -18,5 +18,5 @@ Symbols:
Section: .text
...
-# CHECK: 0000000000000000 main:
+# CHECK: 0000000000000000 <main>:
# CHECK-NEXT: 0: 90 nop
diff --git a/llvm/test/tools/llvm-objdump/X86/disassemble-invalid-byte-sequences.test b/llvm/test/tools/llvm-objdump/X86/disassemble-invalid-byte-sequences.test
index a9d7f6ac0e48..0acbd52bb6e2 100644
--- a/llvm/test/tools/llvm-objdump/X86/disassemble-invalid-byte-sequences.test
+++ b/llvm/test/tools/llvm-objdump/X86/disassemble-invalid-byte-sequences.test
@@ -3,7 +3,7 @@
# RUN: yaml2obj %s -o %t.o
# RUN: llvm-objdump %t.o -d | FileCheck %s
-# CHECK: 0000000000000000 .text:
+# CHECK: 0000000000000000 <.text>:
# CHECK: 0: d9 e2 <unknown>
# CHECK-NEXT: 2: 90 nop
diff --git a/llvm/test/tools/llvm-objdump/X86/disassemble-no-symbol-at-section-start.test b/llvm/test/tools/llvm-objdump/X86/disassemble-no-symbol-at-section-start.test
index 88ecad22e953..b9543da011b1 100644
--- a/llvm/test/tools/llvm-objdump/X86/disassemble-no-symbol-at-section-start.test
+++ b/llvm/test/tools/llvm-objdump/X86/disassemble-no-symbol-at-section-start.test
@@ -6,9 +6,9 @@
# CHECK: Disassembly of section .text:
# CHECK-EMPTY:
-# CHECK-NEXT: .text:
+# CHECK-NEXT: <.text>:
# CHECK-NEXT: 0: 90 nop
-# CHECK: foo:
+# CHECK: <foo>:
# CHECK-NEXT: 1: 90 nop
--- !ELF
diff --git a/llvm/test/tools/llvm-objdump/X86/disassemble-section-name.s b/llvm/test/tools/llvm-objdump/X86/disassemble-section-name.s
index 080d0780d2f4..da07cb82f74a 100644
--- a/llvm/test/tools/llvm-objdump/X86/disassemble-section-name.s
+++ b/llvm/test/tools/llvm-objdump/X86/disassemble-section-name.s
@@ -6,4 +6,4 @@
# CHECK-EMPTY:
# CHECK-NEXT: Disassembly of section .text:
# CHECK-EMPTY:
-# CHECK-NEXT: 0000000000000000 foo:
+# CHECK-NEXT: 0000000000000000 <foo>:
diff --git a/llvm/test/tools/llvm-objdump/X86/disassemble-text.test b/llvm/test/tools/llvm-objdump/X86/disassemble-text.test
index 38422d81935a..54de47b208d8 100644
--- a/llvm/test/tools/llvm-objdump/X86/disassemble-text.test
+++ b/llvm/test/tools/llvm-objdump/X86/disassemble-text.test
@@ -6,6 +6,6 @@
foo:
.ascii "this is a test"
-# CHECK: foo:
+# CHECK: <foo>:
# CHECK: 0:{{.*}}this is
# CHECK: 8:{{.*}}a test
diff --git a/llvm/test/tools/llvm-objdump/X86/disassemble-zeroes-relocations.test b/llvm/test/tools/llvm-objdump/X86/disassemble-zeroes-relocations.test
index b1504f054834..c48e2d8c4f61 100644
--- a/llvm/test/tools/llvm-objdump/X86/disassemble-zeroes-relocations.test
+++ b/llvm/test/tools/llvm-objdump/X86/disassemble-zeroes-relocations.test
@@ -18,7 +18,7 @@
## Check that without -reloc all zeroes would be omitted.
# RUN: llvm-objdump -D %t | FileCheck %s --check-prefix=SKIP
-# SKIP: 0000000000000000 .rodata:
+# SKIP: 0000000000000000 <.rodata>:
# SKIP-NEXT: ...
# SKIP-EMPTY:
# SKIP-NEXT: Disassembly of section .rela.rodata:
diff --git a/llvm/test/tools/llvm-objdump/X86/elf-disassemble-bss.test b/llvm/test/tools/llvm-objdump/X86/elf-disassemble-bss.test
index b5ff9e232c91..ed4340331f2d 100644
--- a/llvm/test/tools/llvm-objdump/X86/elf-disassemble-bss.test
+++ b/llvm/test/tools/llvm-objdump/X86/elf-disassemble-bss.test
@@ -6,7 +6,7 @@
# RUN: llvm-objdump -D %t.2 | FileCheck %s
# CHECK: Disassembly of section .bss:
-# CHECK: .bss:
+# CHECK: <.bss>:
# CHECK-NEXT: ...
--- !ELF
diff --git a/llvm/test/tools/llvm-objdump/X86/elf-disassemble-dynamic-symbols.test b/llvm/test/tools/llvm-objdump/X86/elf-disassemble-dynamic-symbols.test
index 162dcab03547..d4442a46d803 100644
--- a/llvm/test/tools/llvm-objdump/X86/elf-disassemble-dynamic-symbols.test
+++ b/llvm/test/tools/llvm-objdump/X86/elf-disassemble-dynamic-symbols.test
@@ -12,30 +12,30 @@
# CHECK: Disassembly of section .text:
# CHECK-EMPTY:
-# STATIC-NEXT: 0000000000001000 .text:
-# DYN-NEXT: 0000000000001000 only_dyn:
+# STATIC-NEXT: 0000000000001000 <.text>:
+# DYN-NEXT: 0000000000001000 <only_dyn>:
# CHECK-NEXT: 1000:
# CHECK-EMPTY:
-# STATIC-NEXT: 0000000000001001 both_static:
-# DYN-NEXT: 0000000000001001 both_dyn:
+# STATIC-NEXT: 0000000000001001 <both_static>:
+# DYN-NEXT: 0000000000001001 <both_dyn>:
# CHECK-NEXT: 1001:
# STATIC-EMPTY:
-# STATIC-NEXT: 0000000000001002 only_static:
+# STATIC-NEXT: 0000000000001002 <only_static>:
# CHECK-NEXT: 1002:
# DYN-EMPTY:
-# DYN-NEXT: 0000000000001003 object:
+# DYN-NEXT: 0000000000001003 <object>:
# CHECK-NEXT: 1003:
# DYN-EMPTY:
-# DYN-NEXT: 0000000000001004 zero_sized:
+# DYN-NEXT: 0000000000001004 <zero_sized>:
# CHECK-NEXT: 1004:
# DYN-EMPTY:
-# DYN-NEXT: 0000000000001005 common:
+# DYN-NEXT: 0000000000001005 <common>:
# CHECK-NEXT: 1005:
# DYN-EMPTY:
-# DYN-NEXT: 0000000000001006 loos:
+# DYN-NEXT: 0000000000001006 <loos>:
# CHECK-NEXT: 1006:
# DYN-EMPTY:
-# DYN-NEXT: 0000000000001007 loproc:
+# DYN-NEXT: 0000000000001007 <loproc>:
# CHECK-NEXT: 1007:
# CHECK-NEXT: 1008:
# CHECK-NEXT: 1009:
diff --git a/llvm/test/tools/llvm-objdump/X86/elf-disassemble-no-symtab.test b/llvm/test/tools/llvm-objdump/X86/elf-disassemble-no-symtab.test
index b45c905bb3db..a5bb43f95041 100644
--- a/llvm/test/tools/llvm-objdump/X86/elf-disassemble-no-symtab.test
+++ b/llvm/test/tools/llvm-objdump/X86/elf-disassemble-no-symtab.test
@@ -7,7 +7,7 @@
# CHECK: Disassembly of section .text:
# CHECK-EMPTY:
-# CHECK-NEXT: 0000000000004000 .text:
+# CHECK-NEXT: 0000000000004000 <.text>:
# CHECK-NEXT: 4000: e8 42 00 00 00 callq 66 <.text+0x47>
--- !ELF
diff --git a/llvm/test/tools/llvm-objdump/X86/elf-disassemble-symbol-labels-exec.test b/llvm/test/tools/llvm-objdump/X86/elf-disassemble-symbol-labels-exec.test
index 734032d217fc..18de9d479fa4 100644
--- a/llvm/test/tools/llvm-objdump/X86/elf-disassemble-symbol-labels-exec.test
+++ b/llvm/test/tools/llvm-objdump/X86/elf-disassemble-symbol-labels-exec.test
@@ -9,9 +9,9 @@
# Match this line so the implicit check-nots don't match the path.
# CHECK: {{^.*}}file format elf64-x86-64
-# CHECK: 0000000000004000 first:
-# CHECK: 0000000000004001 second:
-# CHECK: 0000000000004002 third:
+# CHECK: 0000000000004000 <first>:
+# CHECK: 0000000000004001 <second>:
+# CHECK: 0000000000004002 <third>:
--- !ELF
FileHeader:
diff --git a/llvm/test/tools/llvm-objdump/X86/elf-disassemble-symbol-labels-rel.test b/llvm/test/tools/llvm-objdump/X86/elf-disassemble-symbol-labels-rel.test
index 189803cbc096..4754fbb29776 100644
--- a/llvm/test/tools/llvm-objdump/X86/elf-disassemble-symbol-labels-rel.test
+++ b/llvm/test/tools/llvm-objdump/X86/elf-disassemble-symbol-labels-rel.test
@@ -11,11 +11,11 @@
# CHECK: {{.*}}: file format {{.*}}
# CHECK: Disassembly of section .text:
-# CHECK: 0000000000000000 first:
-# CHECK: 0000000000000001 second:
-# CHECK: 0000000000000002 third:
+# CHECK: 0000000000000000 <first>:
+# CHECK: 0000000000000001 <second>:
+# CHECK: 0000000000000002 <third>:
# CHECK: Disassembly of section .text2:
-# CHECK: 0000000000000004 other:
+# CHECK: 0000000000000004 <other>:
--- !ELF
FileHeader:
diff --git a/llvm/test/tools/llvm-objdump/X86/elf-disassemble-symbol-references.yaml b/llvm/test/tools/llvm-objdump/X86/elf-disassemble-symbol-references.yaml
index d627b207a23d..92c82e7519d6 100644
--- a/llvm/test/tools/llvm-objdump/X86/elf-disassemble-symbol-references.yaml
+++ b/llvm/test/tools/llvm-objdump/X86/elf-disassemble-symbol-references.yaml
@@ -47,17 +47,17 @@ Symbols:
# REL: Disassembly of section .text1:
# REL-EMPTY:
-# REL-NEXT: 0000000000000000 .text1:
+# REL-NEXT: 0000000000000000 <.text1>:
# REL-NEXT: 0: e8 00 00 00 00 callq 0 <.text1+0x5>
# REL-EMPTY:
# REL-NEXT: Disassembly of section .text2:
# REL-EMPTY:
-# REL-NEXT: 0000000000000000 .text2:
+# REL-NEXT: 0000000000000000 <.text2>:
# REL-NEXT: 0: e8 00 00 00 00 callq 0 <sym2>
# REL-EMPTY:
# REL-NEXT: Disassembly of section .text3:
# REL-EMPTY:
-# REL-NEXT: 0000000000000000 .text3:
+# REL-NEXT: 0000000000000000 <.text3>:
# REL-NEXT: 0: e8 00 00 00 00 callq 0 <.text3+0x5>
--- !ELF
diff --git a/llvm/test/tools/llvm-objdump/X86/elf-disassemble.test b/llvm/test/tools/llvm-objdump/X86/elf-disassemble.test
index 4db8d32947fd..d0d919a3b40d 100644
--- a/llvm/test/tools/llvm-objdump/X86/elf-disassemble.test
+++ b/llvm/test/tools/llvm-objdump/X86/elf-disassemble.test
@@ -5,22 +5,22 @@
# CHECK: Disassembly of section .executable:
# CHECK-EMPTY:
-# CHECK-NEXT: 0000000000001000 .executable:
+# CHECK-NEXT: 0000000000001000 <.executable>:
# CHECK-NEXT: 0: 90 nop
# ALL-EMPTY:
# ALL-NEXT: Disassembly of section .writable:
# ALL-EMPTY:
-# ALL-NEXT: 0000000000002000 .writable:
+# ALL-NEXT: 0000000000002000 <.writable>:
# ALL-NEXT: 0: c3 retq
# ALL-EMPTY:
# ALL-NEXT: Disassembly of section .readonly:
# ALL-EMPTY:
-# ALL-NEXT: 0000000000003000 .readonly:
+# ALL-NEXT: 0000000000003000 <.readonly>:
# ALL-NEXT: 0: 01 00 addl %eax, (%rax)
# ALL-EMPTY:
# ALL-NEXT: Disassembly of section .nobits:
# ALL-EMPTY:
-# ALL-NEXT: 0000000000004000 .nobits:
+# ALL-NEXT: 0000000000004000 <.nobits>:
# ALL-NEXT: ...
--- !ELF
diff --git a/llvm/test/tools/llvm-objdump/X86/function-sections-line-numbers.s b/llvm/test/tools/llvm-objdump/X86/function-sections-line-numbers.s
index 46607440cb9b..f3243bc27cdf 100644
--- a/llvm/test/tools/llvm-objdump/X86/function-sections-line-numbers.s
+++ b/llvm/test/tools/llvm-objdump/X86/function-sections-line-numbers.s
@@ -11,11 +11,11 @@
# RUN: llvm-objdump -disassemble -line-numbers -r -s -section-headers -t %t.o | FileCheck %s
-# CHECK: 0000000000000000 _Z2f1v
+# CHECK: 0000000000000000 <_Z2f1v>
# CHECK-NOT: test.cpp:2
# CHECK: test.cpp:1
# CHECK-NOT: test.cpp:2
-# CHECK: 0000000000000000 _Z2f2v
+# CHECK: 0000000000000000 <_Z2f2v>
# CHECK-NOT: test.cpp:1
# CHECK: test.cpp:2
# CHECK-NOT: test.cpp:1
diff --git a/llvm/test/tools/llvm-objdump/X86/out-of-section-sym.test b/llvm/test/tools/llvm-objdump/X86/out-of-section-sym.test
index ddb09d4bfc92..9f5e3bcdb746 100644
--- a/llvm/test/tools/llvm-objdump/X86/out-of-section-sym.test
+++ b/llvm/test/tools/llvm-objdump/X86/out-of-section-sym.test
@@ -13,5 +13,5 @@ CHECK-NEXT: 00000010 g .text 00000000 _ftext
CHECK-EMPTY:
CHECK-NEXT: Disassembly of section .text:
CHECK-EMPTY:
-CHECK-NEXT: _start:
+CHECK-NEXT: <_start>:
CHECK-NEXT: 10: c3 retl
diff --git a/llvm/test/tools/llvm-objdump/X86/plt.test b/llvm/test/tools/llvm-objdump/X86/plt.test
index db3e4e790f58..4bd8883a718d 100644
--- a/llvm/test/tools/llvm-objdump/X86/plt.test
+++ b/llvm/test/tools/llvm-objdump/X86/plt.test
@@ -3,12 +3,12 @@
// RUN: llvm-objdump -d %p/Inputs/hello.exe.nopie.elf-i386 | FileCheck -check-prefix=32 %s
# 64: Disassembly of section .plt:
-# 64: __gmon_start__ at plt:
-# 64: __cxa_finalize at plt:
+# 64: <__gmon_start__ at plt>:
+# 64: <__cxa_finalize at plt>:
# 64: callq {{.*}} <__cxa_finalize at plt>
# 32: Disassembly of section .plt:
-# 32: puts at plt:
-# 32: __libc_start_main at plt:
+# 32: <puts at plt>:
+# 32: <__libc_start_main at plt>:
# 32: calll {{.*}} <puts at plt>
# 32: calll {{.*}} <__libc_start_main at plt>
diff --git a/llvm/test/tools/llvm-objdump/X86/print-symbol-addr.s b/llvm/test/tools/llvm-objdump/X86/print-symbol-addr.s
index 322f49f7f494..6b233be63294 100644
--- a/llvm/test/tools/llvm-objdump/X86/print-symbol-addr.s
+++ b/llvm/test/tools/llvm-objdump/X86/print-symbol-addr.s
@@ -4,21 +4,21 @@
## Check we print the address of `foo` and `bar`.
# RUN: llvm-objdump -d %t.32.o | FileCheck --check-prefixes=ADDR32,ADDR %s
# RUN: llvm-objdump -d %t.64.o | FileCheck --check-prefixes=ADDR64,ADDR %s
-# ADDR32: 00000000 foo:
-# ADDR64: 0000000000000000 foo:
+# ADDR32: 00000000 <foo>:
+# ADDR64: 0000000000000000 <foo>:
# ADDR-NEXT: 0: {{.*}} nop
# ADDR-NEXT: 1: {{.*}} nop
-# ADDR32: 00000002 bar:
-# ADDR64: 0000000000000002 bar:
+# ADDR32: 00000002 <bar>:
+# ADDR64: 0000000000000002 <bar>:
# ADDR-NEXT: 2: {{.*}} nop
## Check we do not print the addresses with --no-leading-addr.
# RUN: llvm-objdump -d --no-leading-addr %t.32.o | FileCheck %s --check-prefix=NOADDR
# RUN: llvm-objdump -d --no-leading-addr %t.64.o | FileCheck %s --check-prefix=NOADDR
-# NOADDR: {{^}}foo:
+# NOADDR: <foo>:
# NOADDR-NEXT: {{.*}} nop
# NOADDR-NEXT: {{.*}} nop
-# NOADDR: {{^}}bar:
+# NOADDR: <bar>:
# NOADDR-NEXT: {{.*}} nop
.text
diff --git a/llvm/test/tools/llvm-objdump/X86/section-filter-relocs.test b/llvm/test/tools/llvm-objdump/X86/section-filter-relocs.test
index 5345772ecaec..a00e34ee7510 100644
--- a/llvm/test/tools/llvm-objdump/X86/section-filter-relocs.test
+++ b/llvm/test/tools/llvm-objdump/X86/section-filter-relocs.test
@@ -9,13 +9,13 @@
# DISASM: Disassembly of section .text:
# DISASM-EMPTY:
-# DISASM-NEXT: 0000000000000400 .text:
+# DISASM-NEXT: 0000000000000400 <.text>:
# DISASM-NEXT: 400: e8 00 00 00 00 callq 0 <.text+0x5>
# RELOC-NEXT: 00000401: R_X86_64_PC32 foo+0x1
# RELOC-NEXT: 00000401: R_X86_64_GOT32 foo
# DISASM: Disassembly of section .rodata:
# DISASM-EMPTY:
-# DISASM-NEXT: 0000000000000000 .rodata:
+# DISASM-NEXT: 0000000000000000 <.rodata>:
# DISASM-NEXT: 0: 00 00 addb %al, (%rax)
# RELOC-NEXT: 0000000000000000: R_X86_64_NONE foo
# DISASM-NEXT: 2: 00 00 addb %al, (%rax)
diff --git a/llvm/test/tools/llvm-objdump/X86/source-interleave-function-from-debug.test b/llvm/test/tools/llvm-objdump/X86/source-interleave-function-from-debug.test
index d563cd3cf8df..9050ea17a30c 100644
--- a/llvm/test/tools/llvm-objdump/X86/source-interleave-function-from-debug.test
+++ b/llvm/test/tools/llvm-objdump/X86/source-interleave-function-from-debug.test
@@ -7,24 +7,24 @@
; RUN: llc < %s -o %t.o -filetype=obj -mtriple=x86_64-unknown-linux-gnu
; RUN: llvm-objdump -dlC %t.o | FileCheck %s --check-prefixes=CHECK,CHECK-DEMANGLE
-; CHECK: 0000000000000000 foo:
+; CHECK: 0000000000000000 <foo>:
; CHECK-NEXT: ; foo():
; CHECK-NEXT: ; /tmp{{/|\\}}src.cc:1
; CHECK-NEXT: 0: b8 05 00 00 00 movl $5, %eax
; CHECK-NEXT: 5: c3 retq
-; CHECK-NO-DEMANGLE: 0000000000000010 _ZN3xyz3barEv:
+; CHECK-NO-DEMANGLE: 0000000000000010 <_ZN3xyz3barEv>:
; CHECK-NO-DEMANGLE-NEXT: ; _ZN3xyz3barEv():
-; CHECK-DEMANGLE: 0000000000000010 xyz::bar():
+; CHECK-DEMANGLE: 0000000000000010 <xyz::bar()>:
; CHECK-DEMANGLE-NEXT: ; xyz::bar():
; CHECK-NEXT: ; /tmp{{/|\\}}src.cc:3
; CHECK-NEXT: 10: b8 0a 00 00 00 movl $10, %eax
; CHECK-NEXT: 15: c3 retq
-; CHECK-NO-DEMANGLE: 0000000000000020 _ZN3xyz3bazEv:
+; CHECK-NO-DEMANGLE: 0000000000000020 <_ZN3xyz3bazEv>:
; CHECK-NO-DEMANGLE-NEXT: ; _ZN3xyz3bazEv():
-; CHECK-DEMANGLE: 0000000000000020 xyz::baz():
+; CHECK-DEMANGLE: 0000000000000020 <xyz::baz()>:
; CHECK-DEMANGLE-NEXT: ; xyz::baz():
; CHECK-NEXT: ; /tmp{{/|\\}}src.cc:3
@@ -37,7 +37,7 @@
; RUN: llvm-strip %t.o -N foo -N _ZN3xyz3barEv -N _ZN3xyz3bazEv -o %t-stripped.o
; RUN: llvm-objdump -dlC %t-stripped.o | FileCheck %s --check-prefix=STRIPPED
-; STRIPPED: 0000000000000000 .text:
+; STRIPPED: 0000000000000000 <.text>:
; STRIPPED-NEXT: ; Function1():
; STRIPPED-NEXT: ; /tmp{{/|\\}}src.cc:1
; STRIPPED-NEXT: 0: b8 05 00 00 00 movl $5, %eax
diff --git a/llvm/test/tools/llvm-objdump/X86/source-interleave-invalid-source.test b/llvm/test/tools/llvm-objdump/X86/source-interleave-invalid-source.test
index 6337ba458022..7afe3cd57c45 100644
--- a/llvm/test/tools/llvm-objdump/X86/source-interleave-invalid-source.test
+++ b/llvm/test/tools/llvm-objdump/X86/source-interleave-invalid-source.test
@@ -11,7 +11,7 @@
# RUN: llvm-objdump --source %t2.o 2> %t2.e | FileCheck %s --check-prefixes=CHECK --implicit-check-not="int *b = &a;"
# RUN: FileCheck %s --input-file %t2.e --check-prefixes=WARN
-# CHECK: main:
+# CHECK: <main>:
# CHECK-NEXT: ; int main() {
# WARN: warning: '{{.*}}': debug info line number 9999 exceeds the number of lines in {{.*}}source-interleave-x86_64.c
# GOOD: ; int *b = &a;
diff --git a/llvm/test/tools/llvm-objdump/X86/source-interleave-missing-source.test b/llvm/test/tools/llvm-objdump/X86/source-interleave-missing-source.test
index 2aa096f42343..ac396758db65 100644
--- a/llvm/test/tools/llvm-objdump/X86/source-interleave-missing-source.test
+++ b/llvm/test/tools/llvm-objdump/X86/source-interleave-missing-source.test
@@ -12,6 +12,6 @@
# RUN: FileCheck %s --input-file %t.e --check-prefixes=WARN
# WARN: warning: '{{.*}}': failed to find source {{.*}}source-interleave-x86_64.c
-# CHECK: 0000000000000010 main:
+# CHECK: 0000000000000010 <main>:
# SOURCE-NEXT: ; int main() {
# CHECK-NEXT: 10: 55 pushq %rbp
diff --git a/llvm/test/tools/llvm-objdump/X86/source-interleave-no-debug-info.test b/llvm/test/tools/llvm-objdump/X86/source-interleave-no-debug-info.test
index 65f8e17f8aec..25deaa00243c 100644
--- a/llvm/test/tools/llvm-objdump/X86/source-interleave-no-debug-info.test
+++ b/llvm/test/tools/llvm-objdump/X86/source-interleave-no-debug-info.test
@@ -10,6 +10,6 @@
# RUN: FileCheck %s --input-file %t2.e --check-prefixes=WARN
# WARN: warning: '{{.*}}2.o': failed to parse debug information
-# CHECK: 0000000000000010 main:
+# CHECK: 0000000000000010 <main>:
# SOURCE-NEXT: ; int main() {
# CHECK-NEXT: 10: 55 pushq %rbp
diff --git a/llvm/test/tools/llvm-objdump/X86/source-interleave-relative-paths.test b/llvm/test/tools/llvm-objdump/X86/source-interleave-relative-paths.test
index baf4ec919c00..3362b74a62ab 100644
--- a/llvm/test/tools/llvm-objdump/X86/source-interleave-relative-paths.test
+++ b/llvm/test/tools/llvm-objdump/X86/source-interleave-relative-paths.test
@@ -31,6 +31,6 @@
# RUN: llvm-objdump --source ../c.o | FileCheck %s --implicit-check-not='main()'
# RUN: llvm-objdump --source ../d.o | FileCheck %s --check-prefixes=CHECK,SOURCE
-# CHECK: 0000000000000010 main:
+# CHECK: 0000000000000010 <main>:
# SOURCE-NEXT: ; int main() {
# CHECK-NEXT: 10: 55 pushq %rbp
diff --git a/llvm/test/tools/llvm-objdump/X86/source-interleave-same-line-
diff erent-file.test b/llvm/test/tools/llvm-objdump/X86/source-interleave-same-line-
diff erent-file.test
index 71d6995c17aa..87cbd8e379a7 100644
--- a/llvm/test/tools/llvm-objdump/X86/source-interleave-same-line-
diff erent-file.test
+++ b/llvm/test/tools/llvm-objdump/X86/source-interleave-same-line-
diff erent-file.test
@@ -5,8 +5,8 @@
# RUN: llc -o %t.o -filetype=obj -mtriple=x86_64-pc-linux %t.ll
# RUN: llvm-objdump --source %t.o | FileCheck %s
-# CHECK: 0000000000000000 add1:
+# CHECK: 0000000000000000 <add1>:
# CHECK-NEXT: ; int add1(int a) { return a + 1; }
#
-# CHECK: 0000000000000010 return4:
+# CHECK: 0000000000000010 <return4>:
# CHECK-NEXT: ; int return4() { return 4; }
diff --git a/llvm/test/tools/llvm-objdump/X86/source-interleave-x86_64.test b/llvm/test/tools/llvm-objdump/X86/source-interleave-x86_64.test
index 198d4ed67df5..cbcc35cf7965 100644
--- a/llvm/test/tools/llvm-objdump/X86/source-interleave-x86_64.test
+++ b/llvm/test/tools/llvm-objdump/X86/source-interleave-x86_64.test
@@ -9,10 +9,10 @@
# RUN: FileCheck --check-prefix=LINES %s < %t0
# RUN: FileCheck --check-prefix=SOURCE --strict-whitespace %s < %t2
-# LINES: main:
+# LINES: <main>:
# LINES-NEXT: ; main():
# LINES-NEXT: ; {{[ -\(\)_A-Za-z0-9.\\/:]+}}source-interleave-x86_64.c:6
-# SOURCE: main:
+# SOURCE: <main>:
# SOURCE-NEXT: ; int main() {
# SOURCE: ; int *b = &a;
diff --git a/llvm/test/tools/llvm-objdump/X86/start-stop-address-relocatable-object.test b/llvm/test/tools/llvm-objdump/X86/start-stop-address-relocatable-object.test
index 37b522052607..14de4ec69cba 100644
--- a/llvm/test/tools/llvm-objdump/X86/start-stop-address-relocatable-object.test
+++ b/llvm/test/tools/llvm-objdump/X86/start-stop-address-relocatable-object.test
@@ -7,21 +7,21 @@
# COMMON: Disassembly of section .text:
# COMMON-EMPTY:
-# COMMON-NEXT: 0000000000000000 .text:
+# COMMON-NEXT: 0000000000000000 <.text>:
# STOP-NEXT: 0: 90 nop
# COMMON-NEXT: 1: 90 nop
# START-NEXT: 2: 90 nop
# COMMON-EMPTY:
# COMMON-NEXT: Disassembly of section .text2:
# COMMON-EMPTY:
-# COMMON-NEXT: 0000000000000000 .text2:
+# COMMON-NEXT: 0000000000000000 <.text2>:
# STOP-NEXT: 0: c3 retq
# COMMON-NEXT: 1: c3 retq
# START-NEXT: 2: c3 retq
# STOP-EMPTY:
# STOP-NEXT: Disassembly of section .text3:
# STOP-EMPTY:
-# STOP-NEXT: 0000000000000000 .text3:
+# STOP-NEXT: 0000000000000000 <.text3>:
# STOP-NEXT: 0: cc int3
# COMMON-NOT: {{.}}
diff --git a/llvm/test/tools/llvm-objdump/X86/start-stop-address.test b/llvm/test/tools/llvm-objdump/X86/start-stop-address.test
index e7b6e84beb78..6b413b05a059 100644
--- a/llvm/test/tools/llvm-objdump/X86/start-stop-address.test
+++ b/llvm/test/tools/llvm-objdump/X86/start-stop-address.test
@@ -9,7 +9,7 @@
// CHECK-NOT: Disassembly
// CHECK: Disassembly of section .anothertext:
// CHECK-EMPTY:
-// CHECK-NEXT: main:
+// CHECK-NEXT: <main>:
// CHECK-NEXT: 18: 48 8d 04 25 a8 00 00 00 leaq 168, %rax
// CHECK-NEXT: 20: c7 45 fc 00 00 00 00 movl $0, -4(%rbp)
// CHECK-NEXT: 27: 48 89 45 f0 movq %rax, -16(%rbp)
@@ -19,39 +19,39 @@
// CROSSECTION-NOT: Disassembly
// CROSSSECTION: Disassembly of section .text:
// CROSSSECTION-EMPTY:
-// CROSSSECTION-NEXT: foo:
+// CROSSSECTION-NEXT: <foo>:
// CROSSSECTION-NEXT: c: c3 retq
// CROSSSECTION-NEXT: d: 0f 1f 00 nopl (%rax)
// CROSSSECTION-EMPTY:
// CROSSSECTION-NEXT: Disassembly of section .anothertext:
// CROSSSECTION-EMPTY:
-// CROSSSECTION-NEXT: main:
+// CROSSSECTION-NEXT: <main>:
// CROSSSECTION-NEXT: 10: 55 pushq %rbp
// CROSSSECTION-NOT: {{.}}
// CROSSDATA-NOT: Disassembly
// CROSSDATA: Disassembly of section .anothertext:
-// CROSSDATA: main:
+// CROSSDATA: <main>:
// CROSSDATA: 40: 48 83 c4 20 addq $32, %rsp
// CROSSDATA: 44: 5d popq %rbp
-// CROSSDATA-DAG: somedata:
+// CROSSDATA-DAG: <somedata>:
// CROSSDATA-NEXT: 45: 74 65 te
// CROSSDATA-NOT: {{.}}
// START-NOT: Disassembly
// START: Disassembly of section .anothertext:
// START-EMPTY:
-// START-NEXT: 0000000000000010 main:
+// START-NEXT: 0000000000000010 <main>:
// START-NEXT: 40: 48 83 c4 20 addq $32, %rsp
// START-NEXT: 44: 5d popq %rbp
// START-EMPTY:
-// START-NEXT: 0000000000000045 somedata:
+// START-NEXT: 0000000000000045 <somedata>:
// START-NEXT: 45: 74 65 73 74 20 73 74 72 test str
// START-NEXT: 4d: 00 c3 ..
// STOP: Disassembly of section .text:
// STOP-EMPTY:
-// STOP-NEXT: 0000000000000000 foo:
+// STOP-NEXT: 0000000000000000 <foo>:
// STOP-NEXT: 0: 55 pushq %rbp
// STOP-NEXT: 1: 48 89 e5 movq %rsp, %rbp
// STOP-NEXT: 4: 8b 04 25 a8 00 00 00 movl 168, %eax
@@ -61,7 +61,7 @@
// STOP-EMPTY:
// STOP-NEXT: Disassembly of section .anothertext:
// STOP-EMPTY:
-// STOP-NEXT: 0000000000000010 main:
+// STOP-NEXT: 0000000000000010 <main>:
// STOP-NEXT: 10: 55 pushq %rbp
// STOP-NOT: {{.}}
diff --git a/llvm/test/tools/llvm-objdump/embedded-source.test b/llvm/test/tools/llvm-objdump/embedded-source.test
index 0d8786b7c45d..fd1ce71686c3 100644
--- a/llvm/test/tools/llvm-objdump/embedded-source.test
+++ b/llvm/test/tools/llvm-objdump/embedded-source.test
@@ -12,7 +12,7 @@
; return i;
; }
-; LINE: main:
+; LINE: <main>:
; LINE-NEXT: ; main():
; LINE-NEXT: ; {{.*}}embedded-source.c:1
; LINE-NEXT: pushq %rbp
@@ -23,7 +23,7 @@
; LINE: ; {{.*}}embedded-source.c:4
; LINE: retq
-; SOURCE: main:
+; SOURCE: <main>:
; SOURCE-NEXT: ; int main(int argc, char *argv[]) {
; SOURCE-NEXT: pushq %rbp
; SOURCE: ; int i = 2;
diff --git a/llvm/test/tools/llvm-objdump/xcoff-disassemble-all.test b/llvm/test/tools/llvm-objdump/xcoff-disassemble-all.test
index 38829f602b43..195d4f72eb65 100644
--- a/llvm/test/tools/llvm-objdump/xcoff-disassemble-all.test
+++ b/llvm/test/tools/llvm-objdump/xcoff-disassemble-all.test
@@ -15,7 +15,7 @@
; REQUIRES: powerpc-registered-target
CHECK: Inputs/xcoff-section-headers.o: file format aixcoff-rs6000
CHECK: Disassembly of section .text:
-CHECK: 00000000 .text:
+CHECK: 00000000 <.text>:
CHECK-NEXT: 0: 80 62 00 04 lwz 3, 4(2)
CHECK-NEXT: 4: 80 63 00 00 lwz 3, 0(3)
CHECK-NEXT: 8: 4e 80 00 20 blr
@@ -27,29 +27,29 @@ CHECK-NEXT: 1c: 00 04 66 75 <unknown>
CHECK-NEXT: 20: 6e 63 00 00 xoris 3, 19, 0
CHECK-NEXT: ...
CHECK: Disassembly of section .data:
-CHECK: 00000080 func:
+CHECK: 00000080 <func>:
CHECK-NEXT: 80: 00 00 00 94 <unknown>
-CHECK: 00000084 a:
+CHECK: 00000084 <a>:
CHECK-NEXT: 84: 00 00 00 a4 <unknown>
-CHECK: 00000088 b:
+CHECK: 00000088 <b>:
CHECK-NEXT: 88: 00 00 00 a0 <unknown>
-CHECK: 0000008c c:
+CHECK: 0000008c <c>:
CHECK-NEXT: 8c: 00 00 00 08 <unknown>
-CHECK: 00000090 d:
+CHECK: 00000090 <d>:
CHECK-NEXT: 90: 00 00 00 00 <unknown>
-CHECK: 00000094 func:
+CHECK: 00000094 <func>:
CHECK-NEXT: 94: 00 00 00 00 <unknown>
CHECK-NEXT: 98: 00 00 00 80 <unknown>
CHECK-NEXT: 9c: 00 00 00 00 <unknown>
-CHECK: 000000a0 b:
+CHECK: 000000a0 <b>:
CHECK-NEXT: a0: 00 00 30 39 <unknown>
CHECK: Disassembly of section .bss:
-CHECK: 000000a4 a:
+CHECK: 000000a4 <a>:
CHECK-NEXT: ...
CHECK: Disassembly of section .tdata:
-CHECK: 00000000 d:
+CHECK: 00000000 <d>:
CHECK-NEXT: 0: 40 09 21 f9 bdnzfl 9, .+8696
CHECK-NEXT: 4: f0 1b 86 6e <unknown>
CHECK: Disassembly of section .tbss:
-CHECK: 00000008 c:
+CHECK: 00000008 <c>:
CHECK-NEXT: ...
diff --git a/llvm/tools/llvm-objdump/llvm-objdump.cpp b/llvm/tools/llvm-objdump/llvm-objdump.cpp
index 4675bd529c16..1d0ec43bae03 100644
--- a/llvm/tools/llvm-objdump/llvm-objdump.cpp
+++ b/llvm/tools/llvm-objdump/llvm-objdump.cpp
@@ -1372,7 +1372,7 @@ static void disassembleObject(const Target *TheTarget, const ObjectFile *Obj,
outs() << format(Is64Bits ? "%016" PRIx64 " " : "%08" PRIx64 " ",
SectionAddr + Start + VMAAdjustment);
- outs() << SymbolName << ":\n";
+ outs() << '<' << SymbolName << ">:\n";
// Don't print raw contents of a virtual section. A virtual section
// doesn't have any contents in the file.
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