[PATCH] D75214: [MCA][WIP] Modelling CPU front-ent: Fetch stage/Instruction Byte Buffer unit/Decoder stage (PR42202)

[Roman Lebedev via Phabricator via llvm-commits]

lebedev.ri updated this revision to Diff 248407.
lebedev.ri retitled this revision from "[MCA][WIP] Decoder stage (PR42202)" to "[MCA][WIP] Modelling CPU front-ent: Fetch stage/Instruction Byte Buffer unit/Decoder stage (PR42202)".
Herald added a subscriber: javed.absar.

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D75214/new/

https://reviews.llvm.org/D75214

Files:
  llvm/include/llvm/MCA/CodeEmitter.h
  llvm/include/llvm/MCA/HardwareUnits/InstructionBuffer.h
  llvm/include/llvm/MCA/InstrBuilder.h
  llvm/include/llvm/MCA/Instruction.h
  llvm/include/llvm/MCA/Stages/DecodeStage.h
  llvm/include/llvm/MCA/Stages/EntryStage.h
  llvm/include/llvm/MCA/Stages/FetchStage.h
  llvm/lib/MCA/CMakeLists.txt
  llvm/lib/MCA/Context.cpp
  llvm/lib/MCA/HardwareUnits/InstructionBuffer.cpp
  llvm/lib/MCA/InstrBuilder.cpp
  llvm/lib/MCA/Pipeline.cpp
  llvm/lib/MCA/Stages/DecodeStage.cpp
  llvm/lib/MCA/Stages/EntryStage.cpp
  llvm/lib/MCA/Stages/FetchStage.cpp
  llvm/test/tools/llvm-mca/X86/BdVer2/add-sequence.s
  llvm/test/tools/llvm-mca/X86/BdVer2/clear-super-register-1.s
  llvm/test/tools/llvm-mca/X86/BdVer2/clear-super-register-2.s
  llvm/test/tools/llvm-mca/X86/BdVer2/clear-super-register-3.s
  llvm/test/tools/llvm-mca/X86/BdVer2/dependency-breaking-cmp.s
  llvm/test/tools/llvm-mca/X86/BdVer2/dependency-breaking-pcmpeq.s
  llvm/test/tools/llvm-mca/X86/BdVer2/dependency-breaking-pcmpgt.s
  llvm/test/tools/llvm-mca/X86/BdVer2/dependency-breaking-sbb-1.s
  llvm/test/tools/llvm-mca/X86/BdVer2/dependency-breaking-sbb-2.s
  llvm/test/tools/llvm-mca/X86/BdVer2/dependent-pmuld-paddd.s
  llvm/test/tools/llvm-mca/X86/BdVer2/dot-product.s
  llvm/test/tools/llvm-mca/X86/BdVer2/hadd-read-after-ld-1.s
  llvm/test/tools/llvm-mca/X86/BdVer2/hadd-read-after-ld-2.s
  llvm/test/tools/llvm-mca/X86/BdVer2/int-to-fpu-forwarding-1.s
  llvm/test/tools/llvm-mca/X86/BdVer2/int-to-fpu-forwarding-2.s
  llvm/test/tools/llvm-mca/X86/BdVer2/int-to-fpu-forwarding-3.s
  llvm/test/tools/llvm-mca/X86/BdVer2/load-store-alias.s
  llvm/test/tools/llvm-mca/X86/BdVer2/load-store-throughput.s
  llvm/test/tools/llvm-mca/X86/BdVer2/load-throughput.s
  llvm/test/tools/llvm-mca/X86/BdVer2/memcpy-like-test.s
  llvm/test/tools/llvm-mca/X86/BdVer2/one-idioms.s
  llvm/test/tools/llvm-mca/X86/BdVer2/partial-reg-update-2.s
  llvm/test/tools/llvm-mca/X86/BdVer2/partial-reg-update-3.s
  llvm/test/tools/llvm-mca/X86/BdVer2/partial-reg-update-4.s
  llvm/test/tools/llvm-mca/X86/BdVer2/partial-reg-update-5.s
  llvm/test/tools/llvm-mca/X86/BdVer2/partial-reg-update-6.s
  llvm/test/tools/llvm-mca/X86/BdVer2/partial-reg-update.s
  llvm/test/tools/llvm-mca/X86/BdVer2/pipes-fpu.s
  llvm/test/tools/llvm-mca/X86/BdVer2/pr37790.s
  llvm/test/tools/llvm-mca/X86/BdVer2/rank.s
  llvm/test/tools/llvm-mca/X86/BdVer2/rcu-statistics.s
  llvm/test/tools/llvm-mca/X86/BdVer2/read-advance-1.s
  llvm/test/tools/llvm-mca/X86/BdVer2/read-advance-2.s
  llvm/test/tools/llvm-mca/X86/BdVer2/read-advance-3.s
  llvm/test/tools/llvm-mca/X86/BdVer2/reg-move-elimination-1.s
  llvm/test/tools/llvm-mca/X86/BdVer2/reg-move-elimination-2.s
  llvm/test/tools/llvm-mca/X86/BdVer2/reg-move-elimination-3.s
  llvm/test/tools/llvm-mca/X86/BdVer2/reg-move-elimination-4.s
  llvm/test/tools/llvm-mca/X86/BdVer2/reg-move-elimination-5.s
  llvm/test/tools/llvm-mca/X86/BdVer2/register-files-1.s
  llvm/test/tools/llvm-mca/X86/BdVer2/register-files-2.s
  llvm/test/tools/llvm-mca/X86/BdVer2/register-files-3.s
  llvm/test/tools/llvm-mca/X86/BdVer2/register-files-4.s
  llvm/test/tools/llvm-mca/X86/BdVer2/register-files-5.s
  llvm/test/tools/llvm-mca/X86/BdVer2/scheduler-queue-usage.s
  llvm/test/tools/llvm-mca/X86/BdVer2/simple-test.s
  llvm/test/tools/llvm-mca/X86/BdVer2/store-throughput.s
  llvm/test/tools/llvm-mca/X86/BdVer2/vbroadcast-operand-latency.s
  llvm/test/tools/llvm-mca/X86/BdVer2/vec-logic-read-after-ld-1.s
  llvm/test/tools/llvm-mca/X86/BdVer2/vec-logic-read-after-ld-2.s
  llvm/test/tools/llvm-mca/X86/BdVer2/xop-super-registers-1.s
  llvm/test/tools/llvm-mca/X86/BdVer2/xop-super-registers-2.s
  llvm/test/tools/llvm-mca/X86/BdVer2/zero-idioms-avx-256.s
  llvm/test/tools/llvm-mca/X86/BdVer2/zero-idioms.s
  llvm/test/tools/llvm-mca/X86/bextr-read-after-ld.s
  llvm/test/tools/llvm-mca/X86/cpus.s
  llvm/test/tools/llvm-mca/X86/read-after-ld-1.s
  llvm/test/tools/llvm-mca/X86/scheduler-queue-usage.s
  llvm/test/tools/llvm-mca/X86/sqrt-rsqrt-rcp-memop.s
  llvm/test/tools/llvm-mca/X86/variable-blend-read-after-ld-1.s
  llvm/test/tools/llvm-mca/X86/variable-blend-read-after-ld-2.s
  llvm/tools/llvm-mca/llvm-mca.cpp

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