[PATCH] D75138: [WIP][AMDGPU] Add Scratch Wave Offset to Scratch Buffer Descriptor in entry functions

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


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Comment at: llvm/lib/Target/AMDGPU/SIFoldOperands.cpp:631-632
+    } else {
+      if (!((SOff.isReg() && SOff.getReg() == MFI->getStackPtrOffsetReg()) ||
+            (SOff.isImm() && SOff.getImm() == 0)))
+        return;
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Should demorgan this


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Comment at: llvm/lib/Target/AMDGPU/SIFrameLowering.cpp:290-292
+  // FIXME: This is just lifted from AMDGPUAsmPrinter, because I'm not
+  // sure where/if we track InReg SGPR arguments otherwise.
+  for (auto &Arg : MF.getFunction().args()) {
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This should not need to inspect the original IR. Why can't this just read it directly from MFI? They should be accounted there already?


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Comment at: llvm/lib/Target/AMDGPU/SIFrameLowering.cpp:293
+  for (auto &Arg : MF.getFunction().args()) {
+    unsigned NumRegs = (Arg.getType()->getPrimitiveSizeInBits() + 31) / 32;
+    if (Arg.hasAttribute(Attribute::InReg)) {
----------------
This will be inaccurate for any struct type, this should have been computed during lowering that knows the type split


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D75138/new/

https://reviews.llvm.org/D75138