[PATCH] D75428: [MC][ARM] add implicit immediate form for ldrsbt/ldrht/ldrsht

[Jian Cai via Phabricator via llvm-commits]

jcai19 added a comment.

You can move the new ARMAsmPseudo into AI3ldrT as @efriedma suggested as follows,

iff --git a/llvm/lib/Target/ARM/ARMInstrInfo.td b/llvm/lib/Target/ARM/ARMInstrInfo.td
index c9fc8333da8..ac078901d4d 100644

- a/llvm/lib/Target/ARM/ARMInstrInfo.td

+++ b/llvm/lib/Target/ARM/ARMInstrInfo.td
@@ -2951,6 +2951,8 @@ multiclass AI3ldrT<bits<4> op, string opc> {

    let Inst{3-0} = Rm{3-0};
    let DecoderMethod = "DecodeLDR";
  }

+  def ii : ARMAsmPseudo<!strconcat(opc, "${p} $Rt, $addr"), (ins addr_offset_none:$addr, pred:$p),
+                 (outs GPR:$Rt)>;
 }

defm LDRSBT : AI3ldrT<0b1101, "ldrsbt">;
diff --git a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
index 992b8755384..6f4525887f3 100644

- a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp

+++ b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
@@ -8241,6 +8241,26 @@ bool ARMAsmParser::processInstruction(MCInst &Inst,

    Inst = TmpInst;
    return true;
  }

+  // Alias for 'ldr{sb,h,sh}t Rt, [Rn] {, #imm}' for ommitted immediate.
+  case ARM::LDRSBTii:
+  case ARM::LDRHTii:
+  case ARM::LDRSHTii: {
+    MCInst TmpInst;
+
+    if (Inst.getOpcode() == ARM::LDRSBTii)
+      TmpInst.setOpcode(ARM::LDRSBTi);
+    else if (Inst.getOpcode() == ARM::LDRHTii)
+      TmpInst.setOpcode(ARM::LDRHTi);
+    else if (Inst.getOpcode() == ARM::LDRSHTii)
+      TmpInst.setOpcode(ARM::LDRSHTi);
+    TmpInst.addOperand(Inst.getOperand(0));
+    TmpInst.addOperand(Inst.getOperand(1));
+    TmpInst.addOperand(Inst.getOperand(1));
+    TmpInst.addOperand(MCOperand::createImm(0));
+    TmpInst.addOperand(Inst.getOperand(2));
+    Inst = TmpInst;
+    return true;
+  }

  // Alias for alternate form of 'str{,b}t Rt, [Rn], #imm' instruction.
  case ARM::STRT_POST:
  case ARM::STRBT_POST: {

This however does not solve the #-0 issue. I tried to follow @psmith 's suggestion let Inst{23}=1 but ended up with an error: error: Value 'Inst' unknown!. Did some search on LLVM source code but could not find the definition of Inst variable. I suspected it was defined in  one of the classes Instruction class derives from, which AI3ldstidxT derives. But ARMAsmPseudo also derives from Instruction. Need further investigation.


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  https://reviews.llvm.org/D75428/new/

https://reviews.llvm.org/D75428