[PATCH] D75428: [MC][ARM] add implicit immediate form for ldrsbt/ldrht/ldrsht

[Eli Friedman via Phabricator via llvm-commits]

efriedma added a comment.

How we choose to represent instructions is a case-by-case thing; often, the way the instruction manuals are written is sort of arbitrary anyway.  Ideally, we want to represent instructions in some way that's intuitive for someone who has read the manual.  That usually means one "instruction" corresponds to one instruction/encoding in the instruction manual.  But sometimes the manual's description makes the code harder to understand, so we do something different.  (For example, the ARM "pop" instruction is represented as LDMIA_UPD internally.)

One restriction we do want to maintain, though, is that there should be a unique, correct disassembly for every instruction.  Otherwise the behavior of the autogenerated decoder is, at best, difficult to follow.  So if we want LDRSBTi0, we would need to change the definition of LDRSBTi so it doesn't overlap.

We could split LDRSBTi into two instructions: one for the zero-offset case, and one for the non-zero offset cast.  But that isn't the way the manual is written, and we would need C++ code to throw away the immediate in "ldrsbt r0, [r0], #0". So it's not really an improvement, IMO.

You could save a few lines of TableGen by moving the definition of the pseudoinstructions into the multiclass "AI3ldrT".


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  https://reviews.llvm.org/D75428/new/

https://reviews.llvm.org/D75428