[PATCH] D75079: Update LSR's logic that identifies a post-increment SCEV value.

[Dave Green via Phabricator via llvm-commits]

dmgreen accepted this revision.
dmgreen added a comment.
This revision is now accepted and ready to land.

Hello. I have been looking at post-inc in LSR a little recently, trying to make it more reliable in some of the MVE kernels we have been seeing. I'm not sure the types it uses are always correct (those passed to isIndexedLoadLegal), and there are some masked load/store changes that might be useful. I haven't really come up with anything I'm super happy with though.

This change on it's own sounds sensible to me, and fixes one of the testcase I was looking at. I will add that test once this is in. LGTM.


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https://reviews.llvm.org/D75079