[PATCH] D75377: [DAGCombiner][X86] Disable narrowExtractedVectorLoad if the element type size isn't byte sized

[Craig Topper via Phabricator via llvm-commits]

craig.topper created this revision.
craig.topper added reviewers: spatel, RKSimon.
Herald added a subscriber: hiraditya.
Herald added a project: LLVM.

The address calculation for the offset assumes that you can calculate the offset by multiplying the index by the store size of the element. But that only works if the element'ss store size is exactly its real size since we store vectors tightly packed in memory. There are improvements we could make to this like special casing extracting element 0. I think we could also handle cases where the extracted VT is byte sized and the index is aligned with the extract element count.


https://reviews.llvm.org/D75377

Files:
  llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  llvm/test/CodeGen/X86/avx512-extract-subvector-load-store.ll
  llvm/test/CodeGen/X86/avx512-mask-op.ll
  llvm/test/CodeGen/X86/avx512bw-intrinsics-upgrade.ll

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