[PATCH] D75348: [DAGCombiner] recognize shuffle (shuffle X, Mask0), Mask --> splat X

[Sanjay Patel via Phabricator via llvm-commits]

spatel created this revision.
spatel added reviewers: RKSimon, craig.topper, lebedev.ri.
Herald added subscribers: hiraditya, kristof.beyls, mcrosier.
Herald added a project: LLVM.

We get the simple cases of this via demanded elements and other folds, but that doesn't work if the values have >1 use, so add a dedicated match for the pattern.

We already have this transform in IR, but it doesn't help the motivating x86 tests (based on PR42024) because the shuffles don't exist until after legalization and other combines have happened. The AArch64 test shows a minimal IR example of the problem.


https://reviews.llvm.org/D75348

Files:
  llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  llvm/test/CodeGen/AArch64/arm64-dup.ll
  llvm/test/CodeGen/X86/vector-reduce-mul.ll
  llvm/test/CodeGen/X86/x86-interleaved-access.ll

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