[PATCH] D75273: [entry values] ARM: Add a describeLoadedValue override (PR45025)

[Vedant Kumar via Phabricator via llvm-commits]

vsk created this revision.
vsk added reviewers: dstenb, djtodoro, efriedma, dmgreen.
Herald added subscribers: hiraditya, kristof.beyls.
Herald added a project: LLVM.

As a narrow stopgap for the assertion failure described in PR45025, add
a describeLoadedValue override to ARMBaseInstrInfo and use it to detect
copies in which the forwarding reg is a super/sub reg of the copy
destination. For the moment this is unsupported.

Several follow ups are possible:

1. Handle VORRq. At the moment, we do not, because isCopyInstrImpl returns early when !MI.isMoveReg().

2. In the case where forwarding reg is a super-reg of the copy destination, we should be able to describe the forwarding reg as a subreg within the copy destination. I'm not 100% sure about this, but it looks like that's what's done in AArch64InstrInfo.

3. In the case where the forwarding reg is a sub-reg of the copy destination, maybe we could describe the forwarding reg using the copy destinaion and a DW_OP_LLVM_fragment (I guess this should be possible after D75036 <https://reviews.llvm.org/D75036>).

https://bugs.llvm.org/show_bug.cgi?id=45025
rdar://59772698


https://reviews.llvm.org/D75273

Files:
  llvm/lib/CodeGen/TargetInstrInfo.cpp
  llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
  llvm/lib/Target/ARM/ARMBaseInstrInfo.h
  llvm/test/DebugInfo/MIR/ARM/call-site-info-vmovd.mir
  llvm/test/DebugInfo/MIR/ARM/call-site-info-vmovs.mir

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