[PATCH] D75267: [AMDGPU] improve fragile test for divergent branches

Sameer Sahasrabuddhe via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Feb 27 08:58:47 PST 2020


sameerds added inline comments.


================
Comment at: llvm/test/CodeGen/AMDGPU/divergent-branch-uniform-condition.ll:8
+; not its condition, so that branch is correctly emitted as divergent.
 
 target triple = "amdgcn-mesa-mesa3d"
----------------
arsenm wrote:
> I think this should include ISA generated checks, and we should probably just generate checks for all control flow tests 
I am not sure I understand what you mean. Do you want ISA checks in addition to the checks that I am proposing? Also, what is the set of "all control flow tests"?


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Comment at: llvm/test/CodeGen/AMDGPU/divergent-branch-uniform-condition.ll:38
+
+Flow2:                                            ; preds = %Flow
+  br i1 %8, label %if1, label %endloop
----------------
Note that this block does not even exist in the original test. It is generated internally by the structurizer. Any changes to the structurizer can potentially stop generating the branch that is being implied in the original test.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D75267/new/

https://reviews.llvm.org/D75267





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