[PATCH] D75252: [ARM,MVE] Add ACLE intrinsics for VQMOV[U]N family.

Simon Tatham via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Feb 27 06:56:47 PST 2020


simon_tatham created this revision.
simon_tatham added reviewers: MarkMurrayARM, dmgreen, miyuki, ostannard.
Herald added subscribers: llvm-commits, cfe-commits, hiraditya, kristof.beyls.
Herald added projects: clang, LLVM.

These instructions work like VMOVN (narrowing a vector of wide values
to half size, and overwriting every other lane of an output register
with the result), except that the narrowing conversion is saturating.
They come in three signedness flavours: signed to signed, unsigned to
unsigned, and signed to unsigned. All are represented in IR by a
target-specific intrinsic that takes two separate 'unsigned' flags.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D75252

Files:
  clang/include/clang/Basic/arm_mve.td
  clang/include/clang/Basic/arm_mve_defs.td
  clang/test/CodeGen/arm-mve-intrinsics/vqmovn.c
  llvm/include/llvm/IR/IntrinsicsARM.td
  llvm/lib/Target/ARM/ARMInstrMVE.td
  llvm/test/CodeGen/Thumb2/mve-intrinsics/vqmovn.ll

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