[PATCH] D75155: AMDGPU/GlobalISel: Don't use vector G_EXTRACT in arg lowering

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added a comment.

In D75155#1893039 <https://reviews.llvm.org/D75155#1893039>, @foad wrote:

> Looks OK to me technically, but it seems a shame if even simple cases like `%1:(<3 x s16>) = G_EXTRACT %0:(<4 x s16>), 0` don't work well.
>
> What do you mean about keeping everything in 32-bit pieces? I don't see anything in the test case diffs where we were not already doing that.


The <3 x s16> results are not even

> Also I have slight theoretical reservations about ever using `getLCMType` because of pathological cases like <17 x s32> vs <19 x s32> which would create <323 x s32>. But I suppose it's never that bad in practice.

In this context, it's only getting legal register pieces, and we break every calling convention argument into 32-bit registers. The worst case is 1 implicit_def and 1 dead def on the unmerge. I wrote it more generally to prepare for a cleanup

> Is there a helper function already in LegalizerHelper that does what `mergeVectorRegsToResultRegs` does?

No


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