[PATCH] D74349: [PowerPC][AIX] Spill and restore the non-volatile condition register bits.

Mon Feb 24 07:35:44 PST 2020

sfertile marked an inline comment as done.
sfertile added inline comments.

================
Comment at: llvm/lib/Target/PowerPC/PPCFrameLowering.cpp:929
+      MachineInstrBuilder MIB =
+          BuildMI(MBB, MBBI, dl, TII.get(PPC::MFOCRF8), TempReg);
+      MIB.addReg(MustSaveCRs[0], RegState::Kill);
----------------
cebowleratibm wrote:
> Xiangling_L wrote:
> > minor issue: inconsistency between how to get instruction `TII.get(PPC::MFOCRF8)`  and `MoveFromCondRegInst`?
> I think the current code is the preferred form.  I had asked for the IsPPC64 assertion above to clarify to the reader that it's ok to hard code MFOCRF8.
Like Chris says: `MoveFromCondRegInst` --> opcode depends on if we are targeting 32-bit or 64-bit codegen, while the hard-coded opcode is to call out explicitly that this code is 64-bit only (in conjunction with the assert).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D74349/new/

https://reviews.llvm.org/D74349