[PATCH] D74874: [mlir][spirv] Add lowering for load/store zero-rank memref from std to SPIR-V.

Han-Chung Wang via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Feb 21 11:45:46 PST 2020


This revision was automatically updated to reflect the committed changes.
Closed by commit rG29ad9d6b26ee: [mlir][spirv] Add lowering for load/store zero-rank memref from std to SPIR-V. (authored by hanchung).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D74874/new/

https://reviews.llvm.org/D74874

Files:
  mlir/lib/Dialect/SPIRV/SPIRVLowering.cpp
  mlir/test/Conversion/StandardToSPIRV/std-to-spirv.mlir
  mlir/test/Dialect/SPIRV/Serialization/memory-ops.mlir

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