[PATCH] D74928: AMDGPU/GlobalISel: Fix handling of G_ANYEXT with s1 source

[Matt Arsenault via Phabricator via llvm-commits]

arsenm marked an inline comment as done.
arsenm added inline comments.


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Comment at: llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-anyext.mir:28
     ; CHECK: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
-    ; CHECK: [[ANYEXT:%[0-9]+]]:vgpr(s64) = G_ANYEXT [[COPY]](s32)
+    ; CHECK: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY [[COPY]](s32)
+    ; CHECK: [[DEF:%[0-9]+]]:vgpr(s32) = G_IMPLICIT_DEF
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foad wrote:
> Why do we get the extra copy? Is this just more cruft that should be cleaned up by a later pass?
Since we told the generic infrastructure this needs to break into 2 32-bit pieces, it created new 32-bit registers for us which we use. We end up with a copy to use it. I think letting the generic code sometimes create the split is just more trouble than it's worth, so I'm considering ripping that out


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  https://reviews.llvm.org/D74928/new/

https://reviews.llvm.org/D74928