[PATCH] D74926: AMDGPU/GlobalISel: Fix constant bus violation with source modifiers

[Matt Arsenault via Phabricator via llvm-commits]

arsenm marked an inline comment as done.
arsenm added inline comments.


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Comment at: llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fadd.s32.mir:168-169
     ; GFX6: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr0
-    ; GFX6: [[V_ADD_F32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_F32_e64 0, [[COPY]], 1, [[COPY1]], 0, 0, implicit $exec
+    ; GFX6: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[COPY1]]
+    ; GFX6: [[V_ADD_F32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_F32_e64 0, [[COPY]], 1, [[COPY2]], 0, 0, implicit $exec
     ; GFX6: S_ENDPGM 0, implicit [[V_ADD_F32_e64_]]
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nhaehnle wrote:
> The COPY isn't needed in this case. Which pass is responsible for cleaning that up again, and how do you envision that working in the long term? Is that a GICombine thing?
SIFoldOperands, or a rewrite of it should take care of this. Right now it's too stupid to handle folding multiple operands at a time, so it does a poor job cleaning it up. In the DAG we start out with incorrect MIR and fix it, so we have more SGPR operands to begin with


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  https://reviews.llvm.org/D74926/new/

https://reviews.llvm.org/D74926