[PATCH] D74886: [X86] Add DAG combines to form CVTPH2PS/CVTPS2PH from vXf16->vXf32/vXf64 fp_extends and vXf32->vXf16 fp_round.

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Feb 20 00:03:57 PST 2020


craig.topper updated this revision to Diff 245591.
craig.topper added a comment.

Also remove vzext_movl from vcvtps2ph results if the upper bits have already been zeroed.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D74886/new/

https://reviews.llvm.org/D74886

Files:
  llvm/lib/Target/X86/X86ISelLowering.cpp
  llvm/test/CodeGen/X86/half.ll
  llvm/test/CodeGen/X86/vector-half-conversions.ll

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