[PATCH] D74632: [AArch64][SVE] Add initial backend support for FP splat_vector

Tue Feb 18 14:34:57 PST 2020

efriedma added inline comments.

================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:878
+
+    setOperationAction(ISD::ConstantFP, MVT::f16, Legal);
+
----------------
cameron.mcinally wrote:
> efriedma wrote:
> > I think `setOperationAction(ISD::ConstantFP, MVT::f16, Legal)` is going to cause a fatal error for some FP constants. Not that they would be impossible to lower appropriately, but I don't think we have the necessary patterns.
> Ah, good call. That was also from D71712, but yeah, there are probably missing f16 patterns.
> 
> Are we're ok with not folding the f16 constants for now? Or I could wait on this patch too. Any preference?
> 
> 
> 
I'm okay if we miss the optimization for now...

That said, I think making `+sve` imply `+fullfp16` solves the immediate problem you're running into, where constantfp 0.0 is getting lowered to a constant pool.

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D74632/new/

https://reviews.llvm.org/D74632