[PATCH] D74701: [PowerPC] Fix the unexpected modification caused by D62993 in LowerSELECT_CC for power9

Zhang Kang via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Feb 17 00:56:09 PST 2020


ZhangKang created this revision.
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The patch D62993 <https://reviews.llvm.org/D62993> : `[PowerPC] Emit scalar min/max instructions with unsafe fp math` has modified the functionality when `Subtarget.hasP9Vector() && (!HasNoInfs || !HasNoNaNs)`, this modification is not expected.

For below case:

  define double @test(double %a, double %b, double %c, double %d) {
  entry:
    %cmp = fcmp fast oeq double %a, %b
    %cond = select fast i1 %cmp, double %c, double %d
    ret double %cond
  }

Use the below command for pwr9 without the fast-math option,

  llc -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names test.ll -o p9.s -mcpu=pwr9 -O3

we will get below assembly, this is not right, because we haven't used the fast-math option :

  asm
  	xssubdp f0, f1, f2
  	fsel f1, f0, f3, f4
  	xsnegdp f0, f0
  	fsel f1, f0, f1, f4
  	blr

But in fact, if without the patch D62993 <https://reviews.llvm.org/D62993>, above case we will get below assembly, this is the right:

  # %bb.0:                                # %entry
  	xscmpudp cr0, f1, f2
  	beq	cr0, .LBB0_2
  # %bb.1:                                # %entry
  	fmr f3, f4
  .LBB0_2:                                # %entry
  	fmr f1, f3
  	blr




https://reviews.llvm.org/D74701

Files:
  llvm/lib/Target/PowerPC/PPCISelLowering.cpp
  llvm/test/CodeGen/PowerPC/scalar-equal.ll


Index: llvm/test/CodeGen/PowerPC/scalar-equal.ll
===================================================================
--- llvm/test/CodeGen/PowerPC/scalar-equal.ll
+++ llvm/test/CodeGen/PowerPC/scalar-equal.ll
@@ -35,10 +35,12 @@
 ;
 ; NO-FAST-P9-LABEL: testoeq:
 ; NO-FAST-P9:       # %bb.0: # %entry
-; NO-FAST-P9-NEXT:    xssubdp f0, f1, f2
-; NO-FAST-P9-NEXT:    fsel f1, f0, f3, f4
-; NO-FAST-P9-NEXT:    xsnegdp f0, f0
-; NO-FAST-P9-NEXT:    fsel f1, f0, f1, f4
+; NO-FAST-P9-NEXT:    xscmpudp cr0, f1, f2
+; NO-FAST-P9-NEXT:    beq cr0, .LBB0_2
+; NO-FAST-P9-NEXT:  # %bb.1: # %entry
+; NO-FAST-P9-NEXT:    fmr f3, f4
+; NO-FAST-P9-NEXT:  .LBB0_2: # %entry
+; NO-FAST-P9-NEXT:    fmr f1, f3
 ; NO-FAST-P9-NEXT:    blr
 ;
 ; NO-FAST-P8-LABEL: testoeq:
Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp
===================================================================
--- llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -7582,7 +7582,8 @@
     case ISD::SETLT:
       return DAG.getNode(PPCISD::XSMINCDP, dl, Op.getValueType(), LHS, RHS);
     }
-  }
+  } else if (!HasNoInfs || !HasNoNaNs)
+    return Op;
 
   // TODO: Propagate flags from the select rather than global settings.
   SDNodeFlags Flags;


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