[PATCH] D74338: [RFC][TableGen/RISCV] Support combining AssemblerPredicates with ORs

Simon Cook via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Feb 13 05:50:07 PST 2020


simoncook updated this revision to Diff 244407.
simoncook added a comment.

Incorporate feedback, add test of disassembler and assembly matching test (asmwriter test is WIP)


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D74338/new/

https://reviews.llvm.org/D74338

Files:
  llvm/include/llvm/MC/MCInstPrinter.h
  llvm/include/llvm/Target/Target.td
  llvm/lib/MC/MCInstPrinter.cpp
  llvm/lib/Target/RISCV/RISCV.td
  llvm/test/TableGen/AsmPredicateCombining.td
  llvm/utils/TableGen/AsmWriterEmitter.cpp
  llvm/utils/TableGen/FixedLenDecoderEmitter.cpp
  llvm/utils/TableGen/SubtargetFeatureInfo.cpp

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