[llvm] b413e5c - [PowerPC] Add support for intrinsics llvm.ppc.dcbfl and llvm.ppc.dcbflp

Stefan Pintilie via llvm-commits llvm-commits at lists.llvm.org
Wed Feb 12 07:19:22 PST 2020


Author: Anil Mahmud
Date: 2020-02-12T09:02:17-06:00
New Revision: b413e5c3097cb842266d9c33e9737ac6cc252903

URL: https://github.com/llvm/llvm-project/commit/b413e5c3097cb842266d9c33e9737ac6cc252903
DIFF: https://github.com/llvm/llvm-project/commit/b413e5c3097cb842266d9c33e9737ac6cc252903.diff

LOG: [PowerPC] Add support for intrinsics llvm.ppc.dcbfl and llvm.ppc.dcbflp

Added support for the intrinsic llvm.ppc.dcbfl and llvm.ppc.dcbflp.
These will be used for emitting cache control instructions dcbfl and dcbflp
which are actually mnemonics for using dcbf instruction with different
immediate arguments.

dcbfl ra, rb -> dcbf ra, rb, 1
dcbflp, ra, rb -> dcbf ra, rb, 3

Differential Revision: https://reviews.llvm.org/D68411

Added: 
    

Modified: 
    llvm/include/llvm/IR/IntrinsicsPowerPC.td
    llvm/lib/Target/PowerPC/PPCInstrInfo.td
    llvm/test/CodeGen/PowerPC/dcbf.ll

Removed: 
    


################################################################################
diff  --git a/llvm/include/llvm/IR/IntrinsicsPowerPC.td b/llvm/include/llvm/IR/IntrinsicsPowerPC.td
index f87317445753..c2fac55528fe 100644
--- a/llvm/include/llvm/IR/IntrinsicsPowerPC.td
+++ b/llvm/include/llvm/IR/IntrinsicsPowerPC.td
@@ -20,6 +20,8 @@ let TargetPrefix = "ppc" in {  // All intrinsics start with "llvm.ppc.".
   def int_ppc_dcba  : Intrinsic<[], [llvm_ptr_ty], []>;
   def int_ppc_dcbf  : GCCBuiltin<"__builtin_dcbf">,
                       Intrinsic<[], [llvm_ptr_ty], []>;
+  def int_ppc_dcbfl : Intrinsic<[], [llvm_ptr_ty], []>;
+  def int_ppc_dcbflp: Intrinsic<[], [llvm_ptr_ty], []>;
   def int_ppc_dcbi  : Intrinsic<[], [llvm_ptr_ty], []>;
   def int_ppc_dcbst : Intrinsic<[], [llvm_ptr_ty], []>;
   def int_ppc_dcbt  : Intrinsic<[], [llvm_ptr_ty],

diff  --git a/llvm/lib/Target/PowerPC/PPCInstrInfo.td b/llvm/lib/Target/PowerPC/PPCInstrInfo.td
index 4571f284f5fd..08bc6c1502a9 100644
--- a/llvm/lib/Target/PowerPC/PPCInstrInfo.td
+++ b/llvm/lib/Target/PowerPC/PPCInstrInfo.td
@@ -4469,6 +4469,11 @@ def DCBFx  : PPCAsmPseudo<"dcbf $dst", (ins memrr:$dst)>;
 def DCBFL  : PPCAsmPseudo<"dcbfl $dst", (ins memrr:$dst)>;
 def DCBFLP : PPCAsmPseudo<"dcbflp $dst", (ins memrr:$dst)>;
 
+def : Pat<(int_ppc_dcbfl xoaddr:$dst),
+          (DCBFL xoaddr:$dst)>;
+def : Pat<(int_ppc_dcbflp xoaddr:$dst),
+          (DCBFLP xoaddr:$dst)>;
+
 def : InstAlias<"crset $bx", (CREQV crbitrc:$bx, crbitrc:$bx, crbitrc:$bx)>;
 def : InstAlias<"crclr $bx", (CRXOR crbitrc:$bx, crbitrc:$bx, crbitrc:$bx)>;
 def : InstAlias<"crmove $bx, $by", (CROR crbitrc:$bx, crbitrc:$by, crbitrc:$by)>;

diff  --git a/llvm/test/CodeGen/PowerPC/dcbf.ll b/llvm/test/CodeGen/PowerPC/dcbf.ll
index 7dd0dee0ee6e..65b68453c7a8 100644
--- a/llvm/test/CodeGen/PowerPC/dcbf.ll
+++ b/llvm/test/CodeGen/PowerPC/dcbf.ll
@@ -13,3 +13,29 @@ ret void
 }
 
 declare void @llvm.ppc.dcbf(i8*)
+
+; Function Attrs: nounwind
+define void @dcbfl_test(i8* %a) {
+entry:
+  tail call void @llvm.ppc.dcbfl(i8* %a)
+; CHECK-LABEL: @dcbfl_test
+; CHECK: dcbfl 0, r3
+; CHECK-NEXT: blr
+ret void
+}
+
+declare void @llvm.ppc.dcbfl(i8*)
+
+; Function Attrs: nounwind
+define void @dcbflp_test(i8* %a) {
+entry:
+  %add.a = getelementptr inbounds i8, i8* %a, i64 3
+  tail call void @llvm.ppc.dcbflp(i8* %add.a)
+; CHECK-LABEL: @dcbflp_test
+; CHECK: addi r3, r3, 3
+; CHECK-NEXT: dcbflp 0, r3
+; CHECK-NEXT: blr
+ret void
+}
+
+declare void @llvm.ppc.dcbflp(i8*)


        


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