[PATCH] D74389: [MLIR][GPU] Disallow llvm tanh intrinsics when lowering to NVVM/ROCm.

[Alex Zinenko via Phabricator via llvm-commits]

ftynse added a comment.

This would work for me. At scale, we may need to analyze effects of such approach on compile time. The converter essentially twice the number of patterns it has to search through, and there are potential rollbacks of rewrites that generated illegal operations.

In general, I think we want to expose individual LLVM patterns anyway because several people hit the selection problem repeatedly. I haven't had time to do that yet.

For intrinsics specifically, I have a vague idea of some fallback mechanism, as in: the default Std->LLVM-intrinsic patterns are enabled unless there is a different pattern.



================
Comment at: mlir/lib/Conversion/GPUCommon/OpToFuncCallLowering.h:103
+filterIllegalLLVMIntrinsics(ArrayRef<StringRef> intrinsics, MLIRContext *ctx) {
+  llvm::SmallVector<StringRef, 4> illegalIds(intrinsics.begin(),
+                                             intrinsics.end());
----------------
Nit: SmallVector is re-exported into the `mlir` namespace, drop the `llvm::`


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https://reviews.llvm.org/D74389