[PATCH] D74311: [CodeGen] Fix the computation of the alignment of split stores.

Sanjay Patel via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Feb 10 08:16:05 PST 2020


spatel requested changes to this revision.
spatel added a comment.
This revision now requires changes to proceed.

CGP is not creating an appropriate default datalayout based on triple, so we need to specify it explicitly:

  $ opt -S splitstore.ll -mtriple=powerpc64 -data-layout="E" -force-split-store -codegenprepare
  ; ModuleID = 'splitstore.ll'
  source_filename = "splitstore.ll"
  target datalayout = "E"
  target triple = "powerpc64"
  
  define void @split_store_align8(i32 %x, i64* %p) {
    %z = zext i32 43 to i64
    %s = shl nuw nsw i64 %z, 32
    %z2 = zext i32 %x to i64
    %o = or i64 %s, %z2
    %1 = bitcast i64* %p to i32*
    %2 = getelementptr i32, i32* %1, i32 1
    store i32 %x, i32* %2, align 8
    %3 = bitcast i64* %p to i32*
    store i32 43, i32* %3, align 4
    ret void
  }



  $ opt -S splitstore.ll -mtriple=powerpc64le -data-layout="e" -force-split-store -codegenprepare
  ; ModuleID = 'splitstore.ll'
  source_filename = "splitstore.ll"
  target datalayout = "e"
  target triple = "powerpc64le"
  
  define void @split_store_align8(i32 %x, i64* %p) {
    %z = zext i32 43 to i64
    %s = shl nuw nsw i64 %z, 32
    %z2 = zext i32 %x to i64
    %o = or i64 %s, %z2
    %1 = bitcast i64* %p to i32*
    store i32 %x, i32* %1, align 8
    %2 = bitcast i64* %p to i32*
    %3 = getelementptr i32, i32* %2, i32 1
    store i32 43, i32* %3, align 4
    ret void
  }


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D74311/new/

https://reviews.llvm.org/D74311





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