[PATCH] D74322: GlobalISel: Extend narrowing to G_ASHR

Matt Arsenault via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Feb 10 08:11:11 PST 2020


arsenm marked an inline comment as done.
arsenm added inline comments.


================
Comment at: llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp:1493
+      // (G_ASHR i64:x, 63) ->
+      //   G_MERGE_VALUES (G_ASHR hi_32(x), 31), (G_ASHR hi_32(x), 31)
+      Builder.buildMerge(DstReg, { Hi, Hi });
----------------
foad wrote:
> foad wrote:
> > Why not generalize this to:
> > ```
> > (G_ASHR i64:x, 63) for C >= 32 ->
> >   G_MERGE_VALUES (G_ASHR hi_32(x), C-32), (G_ASHR hi_32(x), 31)
> > ```
> > ?
> I meant `(G_ASHR i64:x, C)` of course.
I copied this from the existing AMDGPUTargetLowering::performSrlCombine, I'm not sure why this restricts it to the one shift case


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  https://reviews.llvm.org/D74322/new/

https://reviews.llvm.org/D74322





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