[PATCH] D74165: [x86] [DAGCombine] Prefer shifts of constant widths.

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon added a reviewer: RKSimon.
RKSimon added a comment.

Is there any canonicalization happening in InstCombine for this?

Vector tests? SSE shifts by uniform constants are a lot better than the alternatives.

Would it be better to make this more generic from the start? Some mechanism that allows targets to push selects up/down the DAG.



================
Comment at: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:491
 
+    // SHL, SRA, SRL, RTOL, ROTR, but FSHL or FSHR.
+    SDValue visitShiftOrRotate(SDNode *N);
----------------
"but not FHL or FSHR"? Why shouldn't funnels shifts be included?


================
Comment at: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:7140
+      isa<ConstantSDNode>(RHS.getOperand(1)) &&
+      isa<ConstantSDNode>(RHS.getOperand(2)) &&
+      TLI.shiftOrRotateIsFasterWithConstantShiftAmount(ShiftOpcode, Level)) {
----------------
isConstantIntBuildVectorOrConstantInt ?


================
Comment at: llvm/test/CodeGen/X86/select.ll:1123
+; MCU-NEXT:  .LBB20_1:
+; MCU-NEXT:    shll $3, %eax
 ; MCU-NEXT:    retl
----------------
Regression


Repository:
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  https://reviews.llvm.org/D74165/new/

https://reviews.llvm.org/D74165