[llvm] e8c3a6c - [ARM][ASMParser] Refuse equal RdHi/RdLo for s/umlal, smlsl, s/umull, umaal

via llvm-commits llvm-commits at lists.llvm.org
Fri Feb 7 02:06:33 PST 2020


Author: Pierre van Houtryve
Date: 2020-02-07T10:05:20Z
New Revision: e8c3a6c2606abdbf4f207c8b22e0f532d6247564

URL: https://github.com/llvm/llvm-project/commit/e8c3a6c2606abdbf4f207c8b22e0f532d6247564
DIFF: https://github.com/llvm/llvm-project/commit/e8c3a6c2606abdbf4f207c8b22e0f532d6247564.diff

LOG: [ARM][ASMParser] Refuse equal RdHi/RdLo for s/umlal, smlsl, s/umull, umaal

Differential Revision: https://reviews.llvm.org/D74120

Added: 
    llvm/test/MC/ARM/equal-rdhi-rdlo-diagnostics.s

Modified: 
    llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
    llvm/test/MC/ARM/v8_IT_manual.s

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
index 15e5695c4730..8921eb7306bb 100644
--- a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
+++ b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
@@ -7947,6 +7947,40 @@ bool ARMAsmParser::validateInstruction(MCInst &Inst,
       return Error (Operands[3]->getStartLoc(), "Q-register indexes must be 2 and 0 or 3 and 1");
     break;
   }
+  case ARM::UMAAL:
+  case ARM::UMLAL:
+  case ARM::UMULL:
+  case ARM::t2UMAAL:
+  case ARM::t2UMLAL:
+  case ARM::t2UMULL:
+  case ARM::SMLAL:
+  case ARM::SMLALBB:
+  case ARM::SMLALBT:
+  case ARM::SMLALD:
+  case ARM::SMLALDX:
+  case ARM::SMLALTB:
+  case ARM::SMLALTT:
+  case ARM::SMLSLD:
+  case ARM::SMLSLDX:
+  case ARM::SMULL:
+  case ARM::t2SMLAL:
+  case ARM::t2SMLALBB:
+  case ARM::t2SMLALBT:
+  case ARM::t2SMLALD:
+  case ARM::t2SMLALDX:
+  case ARM::t2SMLALTB:
+  case ARM::t2SMLALTT:
+  case ARM::t2SMLSLD:
+  case ARM::t2SMLSLDX:
+  case ARM::t2SMULL: {
+    unsigned RdHi = Inst.getOperand(0).getReg();
+    unsigned RdLo = Inst.getOperand(1).getReg();
+    if(RdHi == RdLo) {
+      return Error(Loc,
+                   "unpredictable instruction, RdHi and RdLo must be 
diff erent");
+    }
+    break;
+  }
   }
 
   return false;

diff  --git a/llvm/test/MC/ARM/equal-rdhi-rdlo-diagnostics.s b/llvm/test/MC/ARM/equal-rdhi-rdlo-diagnostics.s
new file mode 100644
index 000000000000..474503f2dd04
--- /dev/null
+++ b/llvm/test/MC/ARM/equal-rdhi-rdlo-diagnostics.s
@@ -0,0 +1,29 @@
+@ RUN: not llvm-mc -triple thumbv7m-eabi -mattr=+dsp < %s 2>&1 | FileCheck %s
+@ RUN: not llvm-mc -triple armv8 -mattr=+dsp < %s 2>&1 | FileCheck %s
+
+  smlal   r1, r1, r3, r4
+@ CHECK: [[@LINE-1]]:{{[0-9]+}}: error: unpredictable instruction, RdHi and RdLo must be 
diff erent
+  smlalbb   r1, r1, r3, r4
+@ CHECK: [[@LINE-1]]:{{[0-9]+}}: error: unpredictable instruction, RdHi and RdLo must be 
diff erent
+  smlalbt   r1, r1, r3, r4
+@ CHECK: [[@LINE-1]]:{{[0-9]+}}: error: unpredictable instruction, RdHi and RdLo must be 
diff erent
+  smlaltb   r1, r1, r3, r4
+@ CHECK: [[@LINE-1]]:{{[0-9]+}}: error: unpredictable instruction, RdHi and RdLo must be 
diff erent
+  smlaltt   r1, r1, r3, r4
+@ CHECK: [[@LINE-1]]:{{[0-9]+}}: error: unpredictable instruction, RdHi and RdLo must be 
diff erent
+  smlald   r1, r1, r3, r4
+@ CHECK: [[@LINE-1]]:{{[0-9]+}}: error: unpredictable instruction, RdHi and RdLo must be 
diff erent
+  smlaldx   r1, r1, r3, r4
+@ CHECK: [[@LINE-1]]:{{[0-9]+}}: error: unpredictable instruction, RdHi and RdLo must be 
diff erent
+  smlsld  r1, r1, r3, r4
+@ CHECK: [[@LINE-1]]:{{[0-9]+}}: error: unpredictable instruction, RdHi and RdLo must be 
diff erent
+  smlsldx  r1, r1, r3, r4
+@ CHECK: [[@LINE-1]]:{{[0-9]+}}: error: unpredictable instruction, RdHi and RdLo must be 
diff erent
+  smull   r1, r1, r2, r3
+@ CHECK: [[@LINE-1]]:{{[0-9]+}}: error: unpredictable instruction, RdHi and RdLo must be 
diff erent
+  umull   r1, r1, r2, r3
+@ CHECK: [[@LINE-1]]:{{[0-9]+}}: error: unpredictable instruction, RdHi and RdLo must be 
diff erent
+  umlal   r1, r1, r2, r3
+@ CHECK: [[@LINE-1]]:{{[0-9]+}}: error: unpredictable instruction, RdHi and RdLo must be 
diff erent
+  umaal   r1, r1, r2, r3
+@ CHECK: [[@LINE-1]]:{{[0-9]+}}: error: unpredictable instruction, RdHi and RdLo must be 
diff erent

diff  --git a/llvm/test/MC/ARM/v8_IT_manual.s b/llvm/test/MC/ARM/v8_IT_manual.s
index b082002f4ffa..608f703e8501 100644
--- a/llvm/test/MC/ARM/v8_IT_manual.s
+++ b/llvm/test/MC/ARM/v8_IT_manual.s
@@ -6557,169 +6557,169 @@ it ge
 mlage r0, lr, r0, r0
 @ CHECK: :[[@LINE+2]]:1: warning: deprecated instruction in IT block
 it ge
-smullge r0, r0, r0, r0
+smullge r0, r1, r0, r0
 @ CHECK: :[[@LINE+2]]:1: warning: deprecated instruction in IT block
 it ge
-smullge r0, r0, r1, r0
+smullge r0, r1, r1, r0
 @ CHECK: :[[@LINE+2]]:1: warning: deprecated instruction in IT block
 it ge
-smullge r0, r0, r2, r0
+smullge r0, r1, r2, r0
 @ CHECK: :[[@LINE+2]]:1: warning: deprecated instruction in IT block
 it ge
-smullge r0, r0, r3, r0
+smullge r0, r1, r3, r0
 @ CHECK: :[[@LINE+2]]:1: warning: deprecated instruction in IT block
 it ge
-smullge r0, r0, r4, r0
+smullge r0, r1, r4, r0
 @ CHECK: :[[@LINE+2]]:1: warning: deprecated instruction in IT block
 it ge
-smullge r0, r0, r5, r0
+smullge r0, r1, r5, r0
 @ CHECK: :[[@LINE+2]]:1: warning: deprecated instruction in IT block
 it ge
-smullge r0, r0, r6, r0
+smullge r0, r1, r6, r0
 @ CHECK: :[[@LINE+2]]:1: warning: deprecated instruction in IT block
 it ge
-smullge r0, r0, r7, r0
+smullge r0, r1, r7, r0
 @ CHECK: :[[@LINE+2]]:1: warning: deprecated instruction in IT block
 it ge
-smullge r0, r0, r8, r0
+smullge r0, r1, r8, r0
 @ CHECK: :[[@LINE+2]]:1: warning: deprecated instruction in IT block
 it ge
-smullge r0, r0, r9, r0
+smullge r0, r1, r9, r0
 @ CHECK: :[[@LINE+2]]:1: warning: deprecated instruction in IT block
 it ge
-smullge r0, r0, r10, r0
+smullge r0, r1, r10, r0
 @ CHECK: :[[@LINE+2]]:1: warning: deprecated instruction in IT block
 it ge
-smullge r0, r0, r11, r0
+smullge r0, r1, r11, r0
 @ CHECK: :[[@LINE+2]]:1: warning: deprecated instruction in IT block
 it ge
-smullge r0, r0, r12, r0
+smullge r0, r1, r12, r0
 @ CHECK: :[[@LINE+2]]:1: warning: deprecated instruction in IT block
 it ge
-smullge r0, r0, lr, r0
+smullge r0, r1, lr, r0
 @ CHECK: :[[@LINE+2]]:1: warning: deprecated instruction in IT block
 it ge
-umullge r0, r0, r0, r0
+umullge r0, r1, r0, r0
 @ CHECK: :[[@LINE+2]]:1: warning: deprecated instruction in IT block
 it ge
-umullge r0, r0, r1, r0
+umullge r0, r1, r1, r0
 @ CHECK: :[[@LINE+2]]:1: warning: deprecated instruction in IT block
 it ge
-umullge r0, r0, r2, r0
+umullge r0, r1, r2, r0
 @ CHECK: :[[@LINE+2]]:1: warning: deprecated instruction in IT block
 it ge
-umullge r0, r0, r3, r0
+umullge r0, r1, r3, r0
 @ CHECK: :[[@LINE+2]]:1: warning: deprecated instruction in IT block
 it ge
-umullge r0, r0, r4, r0
+umullge r0, r1, r4, r0
 @ CHECK: :[[@LINE+2]]:1: warning: deprecated instruction in IT block
 it ge
-umullge r0, r0, r5, r0
+umullge r0, r1, r5, r0
 @ CHECK: :[[@LINE+2]]:1: warning: deprecated instruction in IT block
 it ge
-umullge r0, r0, r6, r0
+umullge r0, r1, r6, r0
 @ CHECK: :[[@LINE+2]]:1: warning: deprecated instruction in IT block
 it ge
-umullge r0, r0, r7, r0
+umullge r0, r1, r7, r0
 @ CHECK: :[[@LINE+2]]:1: warning: deprecated instruction in IT block
 it ge
-umullge r0, r0, r8, r0
+umullge r0, r1, r8, r0
 @ CHECK: :[[@LINE+2]]:1: warning: deprecated instruction in IT block
 it ge
-umullge r0, r0, r9, r0
+umullge r0, r1, r9, r0
 @ CHECK: :[[@LINE+2]]:1: warning: deprecated instruction in IT block
 it ge
-umullge r0, r0, r10, r0
+umullge r0, r1, r10, r0
 @ CHECK: :[[@LINE+2]]:1: warning: deprecated instruction in IT block
 it ge
-umullge r0, r0, r11, r0
+umullge r0, r1, r11, r0
 @ CHECK: :[[@LINE+2]]:1: warning: deprecated instruction in IT block
 it ge
-umullge r0, r0, r12, r0
+umullge r0, r1, r12, r0
 @ CHECK: :[[@LINE+2]]:1: warning: deprecated instruction in IT block
 it ge
-umullge r0, r0, lr, r0
+umullge r0, r1, lr, r0
 @ CHECK: :[[@LINE+2]]:1: warning: deprecated instruction in IT block
 it ge
-smlalge r0, r0, r0, r0
+smlalge r0, r1, r0, r0
 @ CHECK: :[[@LINE+2]]:1: warning: deprecated instruction in IT block
 it ge
-smlalge r0, r0, r1, r0
+smlalge r0, r1, r1, r0
 @ CHECK: :[[@LINE+2]]:1: warning: deprecated instruction in IT block
 it ge
-smlalge r0, r0, r2, r0
+smlalge r0, r1, r2, r0
 @ CHECK: :[[@LINE+2]]:1: warning: deprecated instruction in IT block
 it ge
-smlalge r0, r0, r3, r0
+smlalge r0, r1, r3, r0
 @ CHECK: :[[@LINE+2]]:1: warning: deprecated instruction in IT block
 it ge
-smlalge r0, r0, r4, r0
+smlalge r0, r1, r4, r0
 @ CHECK: :[[@LINE+2]]:1: warning: deprecated instruction in IT block
 it ge
-smlalge r0, r0, r5, r0
+smlalge r0, r1, r5, r0
 @ CHECK: :[[@LINE+2]]:1: warning: deprecated instruction in IT block
 it ge
-smlalge r0, r0, r6, r0
+smlalge r0, r1, r6, r0
 @ CHECK: :[[@LINE+2]]:1: warning: deprecated instruction in IT block
 it ge
-smlalge r0, r0, r7, r0
+smlalge r0, r1, r7, r0
 @ CHECK: :[[@LINE+2]]:1: warning: deprecated instruction in IT block
 it ge
-smlalge r0, r0, r8, r0
+smlalge r0, r1, r8, r0
 @ CHECK: :[[@LINE+2]]:1: warning: deprecated instruction in IT block
 it ge
-smlalge r0, r0, r9, r0
+smlalge r0, r1, r9, r0
 @ CHECK: :[[@LINE+2]]:1: warning: deprecated instruction in IT block
 it ge
-smlalge r0, r0, r10, r0
+smlalge r0, r1, r10, r0
 @ CHECK: :[[@LINE+2]]:1: warning: deprecated instruction in IT block
 it ge
-smlalge r0, r0, r11, r0
+smlalge r0, r1, r11, r0
 @ CHECK: :[[@LINE+2]]:1: warning: deprecated instruction in IT block
 it ge
-smlalge r0, r0, r12, r0
+smlalge r0, r1, r12, r0
 @ CHECK: :[[@LINE+2]]:1: warning: deprecated instruction in IT block
 it ge
-smlalge r0, r0, lr, r0
+smlalge r0, r1, lr, r0
 @ CHECK: :[[@LINE+2]]:1: warning: deprecated instruction in IT block
 it ge
-umlalge r0, r0, r0, r0
+umlalge r0, r1, r0, r0
 @ CHECK: :[[@LINE+2]]:1: warning: deprecated instruction in IT block
 it ge
-umlalge r0, r0, r1, r0
+umlalge r0, r1, r1, r0
 @ CHECK: :[[@LINE+2]]:1: warning: deprecated instruction in IT block
 it ge
-umlalge r0, r0, r2, r0
+umlalge r0, r1, r2, r0
 @ CHECK: :[[@LINE+2]]:1: warning: deprecated instruction in IT block
 it ge
-umlalge r0, r0, r3, r0
+umlalge r0, r1, r3, r0
 @ CHECK: :[[@LINE+2]]:1: warning: deprecated instruction in IT block
 it ge
-umlalge r0, r0, r4, r0
+umlalge r0, r1, r4, r0
 @ CHECK: :[[@LINE+2]]:1: warning: deprecated instruction in IT block
 it ge
-umlalge r0, r0, r5, r0
+umlalge r0, r1, r5, r0
 @ CHECK: :[[@LINE+2]]:1: warning: deprecated instruction in IT block
 it ge
-umlalge r0, r0, r6, r0
+umlalge r0, r1, r6, r0
 @ CHECK: :[[@LINE+2]]:1: warning: deprecated instruction in IT block
 it ge
-umlalge r0, r0, r7, r0
+umlalge r0, r1, r7, r0
 @ CHECK: :[[@LINE+2]]:1: warning: deprecated instruction in IT block
 it ge
-umlalge r0, r0, r8, r0
+umlalge r0, r1, r8, r0
 @ CHECK: :[[@LINE+2]]:1: warning: deprecated instruction in IT block
 it ge
-umlalge r0, r0, r9, r0
+umlalge r0, r1, r9, r0
 @ CHECK: :[[@LINE+2]]:1: warning: deprecated instruction in IT block
 it ge
-umlalge r0, r0, r10, r0
+umlalge r0, r1, r10, r0
 @ CHECK: :[[@LINE+2]]:1: warning: deprecated instruction in IT block
 it ge
-umlalge r0, r0, r11, r0
+umlalge r0, r1, r11, r0
 @ CHECK: :[[@LINE+2]]:1: warning: deprecated instruction in IT block
 it ge
-umlalge r0, r0, r12, r0
+umlalge r0, r1, r12, r0
 @ CHECK: :[[@LINE+2]]:1: warning: deprecated instruction in IT block
 it ge
-umlalge r0, r0, lr, r0
+umlalge r0, r1, lr, r0


        


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