[PATCH] D74101: [BPF] implement isTruncateFree in BPFTargetLowering

[Yonghong Song via Phabricator via llvm-commits]

yonghong-song created this revision.
yonghong-song added reviewers: ast, jrfastab.
Herald added subscribers: llvm-commits, kosarev, hiraditya.
Herald added a project: LLVM.

Currently, isTruncateFree() callback is false as not implemented
in BPF backend. So if the load in the context of zero extension
has more than one use, the pattern zextload{i8,i16,i32} will
not be generated. Rather, the load will be matched first and 
then the result is zero extended.

For example, in the test together with this commit, we have

  I1: %0 = load i32, i32* %data_end1, align 4, !tbaa !2
  I2: %conv = zext i32 %0 to i64 
  ... 
  I3: %2 = load i32, i32* %data, align 4, !tbaa !7
  I4: %conv2 = zext i32 %2 to i64 
  ... 
  I5: %4 = trunc i64 %sub.ptr.lhs.cast to i32 
  I6: %conv13 = sub i32 %4, %2
  ... 

The I1 and I2 will match to one zextloadi32 DAG node, where SUBREG_TO_REG is
used to convert a 32bit register to 64bit one. During code generation,
SUBREG_TO_REG is a noop.

The %2 in I3 is used in both I4 and I6. If isTruncateFree() is false,
the current implementation will generate a SLL_ri and SRL_ri
for the zext part, which mostly like will be optimized away later on.

With https://reviews.llvm.org/D73985, the zext is changed to
MOV_32_64 which will produce an ALU MOV instruction.

In networking programs,

  https://github.com/torvalds/linux/blob/master/include/uapi/linux/bpf.h

we have fields data/data_end in struct __sk_buff and xdp_md, which
is encoded as 32bit value but will hold 64bit pointer during program
execution. The test case in this commit illustrates its usage.

Any kind of lshift/rshift or MOV_32_64 will clean upper 32bits and 
verifier will reject the program.

This patch implement isTruncateFree() in the BPF backend, so for the 
above example, I3 and I4 will generate a zextloadi32 DAG node with
SUBREG_TO_REG is generated during lowering to Machine IR.

This patch also enables the change in https://reviews.llvm.org/D73985
since it won't kick in generates MOV_32_64 machine instruction.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D74101

Files:
  llvm/lib/Target/BPF/BPFISelLowering.cpp
  llvm/lib/Target/BPF/BPFISelLowering.h
  llvm/test/CodeGen/BPF/CORE/offset-reloc-fieldinfo-1.ll
  llvm/test/CodeGen/BPF/CORE/offset-reloc-fieldinfo-2.ll
  llvm/test/CodeGen/BPF/is_trunc_free.ll

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