[PATCH] D74040: [ARM] Correct syntax of the CLRM insn

[Momchil Velikov via Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rGa328536c6d7a: [ARM] Correct syntax of the CLRM insn (authored by chill).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D74040/new/

https://reviews.llvm.org/D74040

Files:
  llvm/lib/Target/ARM/ARMInstrThumb2.td
  llvm/test/MC/Disassembler/ARM/clrm.txt


Index: llvm/test/MC/Disassembler/ARM/clrm.txt
===================================================================
--- llvm/test/MC/Disassembler/ARM/clrm.txt
+++ llvm/test/MC/Disassembler/ARM/clrm.txt
@@ -16,5 +16,10 @@
 [0x9f,0xe8,0x00,0x80]
 # CHECK: clrm {apsr} @ encoding: [0x9f,0xe8,0x00,0x80]
 
+[0x04,0xbf]
+[0x9f,0xe8,0x0f,0x00]
+# CHECK: itt    eq
+# CHECK: clrmeq {r0, r1, r2, r3}
+
 [0x9f,0xe8,0x00,0x00]
 # ERROR: [[@LINE-1]]:2: warning: invalid instruction encoding
Index: llvm/lib/Target/ARM/ARMInstrThumb2.td
===================================================================
--- llvm/lib/Target/ARM/ARMInstrThumb2.td
+++ llvm/lib/Target/ARM/ARMInstrThumb2.td
@@ -5207,7 +5207,7 @@
 
 def t2CLRM : V8_1MI<(outs),
                     (ins pred:$p, reglist_with_apsr:$regs, variable_ops),
-                    AddrModeNone, NoItinerary, "clrm", "${p}\t$regs", "", []> {
+                    AddrModeNone, NoItinerary, "clrm${p}", "$regs", "", []> {
   bits<16> regs;
 
   let Inst{31-16} = 0b1110100010011111;


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