[PATCH] D73209: [AIX] Implement caller arguments passed in stack memory

[Sean Fertile via Phabricator via llvm-commits]

sfertile added a comment.

Code changes look good. I 'll start on reviewing the tests now.



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Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:6990
+      // register.
+      if ((ValVT == MVT::f32 || ValVT == MVT::f64) && I != E &&
+          ArgLocs[I].isMemLoc() && ArgLocs[I].getValNo() == VA.getValNo())
----------------
Moving the increment of the index into the loop makes this a lot more complicated even though its a small change to the code. If we have to peek the next memloc then its unavoidable, but did we consider marking the memloc we want to skip as custom and having the normal memloc handling skip it?


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Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:7141
           GPR1.getLocReg(), DAG.getZExtOrTrunc(MSWAsI64, dl, MVT::i32)));
-      assert(I != E && "A second custom GPR is expected!");
-      CCValAssign &GPR2 = ArgLocs[I++];
-      assert(GPR2.isRegLoc() && GPR2.getValNo() == GPR1.getValNo() &&
-             GPR2.needsCustom() && "A second custom GPR is expected!");
-      RegsToPass.push_back(std::make_pair(
-          GPR2.getLocReg(), DAG.getZExtOrTrunc(ArgAsInt, dl, MVT::i32)));
+      
+      if (I != E) {
----------------
Really minor nit: there is  a bunch of extra spaces on this blank line. 


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Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:7145
+        CCValAssign &PeekArg = ArgLocs[I];
+        if (PeekArg.isRegLoc() && PeekArg.getValNo() == PeekArg.getValNo()) {          
+          assert(PeekArg.needsCustom() && "A second custom GPR is expected.");
----------------
Really minor nit: Same thing here, a bunch of spaces or a tab after the '{'.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D73209/new/

https://reviews.llvm.org/D73209