[PATCH] D73947: [ARM][MVE] LowOverheadLoops: DCE on the iteration count setup expression

[Sam Parker via Phabricator via llvm-commits]

samparker added a comment.

Would you mind adding a couple of other tests, both for IT blocks with multiple instructions:

1. insert another instruction in the chain before LSL, so we have a larger predicated block.
2. with an instruction not in the iteration count use-def chain, but still in the same IT, something like: IT, LSL, SOME_RANDOM_INST



================
Comment at: llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp:853
+
+  SmallVector<MachineInstr*, 4> Killed;
+  SmallVector<MachineInstr*, 4> Dead;
----------------
Could you remove these now, they've been laying around dead for a while.


================
Comment at: llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp:893
+          // at all.
+          Remove.clear();
+          return;
----------------
just returning is fine.


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