[PATCH] D73496: [IRCE] Use SCEVExpander to modify loop bound

[Denis Antrushin via Phabricator via llvm-commits]

dantrushin marked 2 inline comments as done.
dantrushin added a comment.

In D73496#1848948 <https://reviews.llvm.org/D73496#1848948>, @mkazantsev wrote:

> I am a bit worried about that. As far as I remember RightValue needs to be in preheader because it is used in checks that decide whether or not we should go to pre/postloops. Does your case generate them? If yes, please add checks to make it explicit. If not, please construct a similar test with pre/postloop and make sure it passes with the fix. If it doesn't, it means that IRCE is illegal in this situation, or that we need some advanced hoisting for these conditions.


This is exactly a purpose of this patch - ensure that RightValue is instantiated in preheader.
I added one more check to handle a case when we do not need to increment/decrement it.


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https://reviews.llvm.org/D73496