[PATCH] D73660: [AArch64][GlobalISel] Fix TBNZ/TBZ opcode selection

[Jessica Paquette via Phabricator via llvm-commits]

paquette created this revision.
paquette added a reviewer: aemerson.
Herald added subscribers: Petar.Avramovic, hiraditya, kristof.beyls, rovka.
Herald added a project: LLVM.

When the bit is <= 32, we have to use the W register variant for TB(N)Z.

This is because of the way the instruction is encoded.


https://reviews.llvm.org/D73660

Files:
  llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp
  llvm/test/CodeGen/AArch64/GlobalISel/opt-and-tbnz-tbz.mir

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